Full Transcript
Loading transcript…
S1-E2 Packaging Design Rules
Watch with subtitles, summary & AI chat
Add the free Subkun extension — works directly on YouTube.
- Watch
- Subtitles
- Summary
- Ask AI
https://www.youtube.com/watch?v=G38PlJ2wAqo
Summary
TL;DR — This webinar focuses on the essential packaging design rules for advanced photonics, building upon the previous episode's introduction to the field. It details best practices and common pitfalls to ensure photonic integrated circuits are compatible with packaging procedures and equipment, emphasizing optical and electrical connection guidelines.
Key points
- The webinar introduces fundamental packaging design rules crucial for the compatibility of photonic integrated circuits (PICs) with laboratory procedures and machinery.
- Design rules are available online via the Europe practice website, covering aspects like grating coupler placement, fiber bond availability, and optical connection geometries.
- A coordinate system (North, South, East, West) is used to define areas on the PIC for specific connections: electrical on North/South, optical on East/West, with specific considerations for wire bonding and flip-chip.
- Optical interfaces utilize an 'optical shunt' for aligning fiber arrays with grating couplers, ensuring precise alignment of multiple couplers by focusing on the first and last.
- Epoxy is used for securing fibers and protecting components, but careful consideration is needed to avoid hindering performance, especially with heat-generating elements.
- Electrical connection rules emphasize pad placement, spacing (at least 150 microns between pads), and distance from the PIC edge (50-500 microns) to ensure proper soldering and access.
- Both edge coupling (using standard SMF or polarization-maintaining PM fibers) and grating couplers (TE/TM sensitive) are discussed as methods for optical interfacing, with different mechanical and performance characteristics.
Takeaway — Adhering to established packaging design rules is critical for successful integration and reliable performance of photonic integrated circuits, ensuring compatibility with manufacturing processes and optimizing optical and electrical interconnections.