Specialty Foundry Technology Platforms and Design Enablement

Full Transcript

https://www.youtube.com/watch?v=dIPW48qdycw

[00:11] Okay, okay, let's start.
[00:15] Hello everyone.
[00:18] My name is AJ Jacob.
[00:18] I am the director of projects at the California Dreams Hub.
[00:22] It's my pleasure to invite Dr. Dr. Samuel Chowri from Tawo Semiconductor to give this invited talk.
[00:29] Uh Dr. Chowri leads the design enablement group at TA Semiconductor that are responsible for PDK modeling, IP design services, design support, tape out and reliability.
[00:43] Prior to this, he led the spice modeling group at Jazz Semiconductor.
[00:48] His research interests include RFCOS, photonic and statistical modeling.
[00:53] He has worked with the compact modeling council in developing industry standard compact models for circuit simulations.
[01:00] Prior to joining JAS, he was a distinguished member of technical staff with the Bell Labs where he worked on technology CAD and device modeling for scale silicon technologies.
[01:12] scale silicon technologies.
[01:13] He has authored over 25 journal publications and has 30 patents in the field of silicon technology.
[01:18] It's my pleasure to invite Dr. Chowri again to give this talk on specialty foundry technology platforms and design enablement.
[01:25] Thank you Dr. Chowri.
[01:27] The stage is yours.
[01:29] Hi everyone.
[01:32] Thanks for thanks for joining.
[01:34] Before I begin, I'd like to sincerely thank AJ and the uh California Dreams team at USC for this invitation and for organizing the seminar.
[01:43] It really is a pleasure to be here and the opportunity to share this work with uh with uh such a knowledgeable and engaged audience.
[01:51] Um I'd like to start with a simple observation.
[01:53] You know most headlines today in in semiconductors focus on digital scaling uh GPUs CPUs but many of the biggest system level breakthroughs today are actually being driven by analog RF and photonix innovation.
[02:07] Uh this is where specialty foundaries
[02:13] Uh, this is where specialty foundries come in.
[02:16] So the talk is really about specialty technologies combined with strong design enablement, which I believe are helping solve real problems.
[02:25] Moving more data through data centers, improving power efficiency, uh, enabling sensing, uh, ultimately supporting things like AI in a more connected sustainable world.
[02:40] So I'll first start with contrasting specialty and digital foundries, then walk through some of the key platforms and applications that specialty foundries focus on.
[02:52] And while doing so, I'll try to tie it with design enablement, which is my own specialty, and I'm strongly biased towards it, which I think makes all these technologies practical, scalable, and usable.
[03:07] So let's start with what is a specialty foundry.
[03:14] So, you know, typically we we try to split the foundry world into two.
[03:18] split the foundry world into two, digital versus specialty, and they're not really competing.
[03:21] They're complimentary.
[03:23] In fact, a digital foundry can also be a specialty foundry like TSMC does both.
[03:31] Uh uh so it's it's as I said, it's not a competition.
[03:35] It it really is how we can help each other.
[03:37] Um so if you look at the value positioning of a digital versus a specialty foundry what you will see see is a a normal comparison starts with what an IDM does.
[03:48] Now if you go back 30 years many of the companies were vertically integrated that they did the design as well as u uh manufacturing themselves and they would have a lot of customized technologies.
[04:00] They would have customized PDKs and models that were specific to that company.
[04:03] They would develop their own IP.
[04:05] They would do their own design.
[04:08] And IDMs got really good at that.
[04:10] And this would be IBM in the 80s and 90s.
[04:13] Uh Motorola, AT&T, Bell Labs where where I
[04:16] Motorola, AT&T, Bell Labs where where I started off my career with.
[04:20] Um now one of the things that happened was that specialty foundaries emerged from these IDM in many cases.
[04:24] For instance, Tower Semiconductor came from National and from Rockwell Conexent.
[04:29] The Tower Jazz uh lineage.
[04:33] And so when they when they were when they were spun off or they developed they they came with a lot of the capabilities that were inherent to IDMs.
[04:43] Um in parallel digital foundaries were coming up like TSMC and UMC in Taiwan and they brought in uh a lot of capabilities like cost advantages, ability to to source multiple from multiple fabs, flexibility of capacity.
[04:58] So for instance, if you had a a full fab that was not utilized by one particular company, you could split that between many different customers um improved a lot on quality and focused on on customer services.
[05:10] So as specialty foundaries emerged from IDM, they also
[05:17] Foundries emerged from IDM, they also uh you know took advantage of you know being pure play foundries.
[05:22] So I I truly believe that specialty foundries span um you know have the best of what IDM used to provide 30 40 years ago versus what digital pure play foundries provide today.
[05:35] Uh here's a little bit of a technology focus.
[05:38] So if you look at uh you know digital scaling it's progressed in the last three or four decades from 180 nanometer technologies down to 2 nanometers and absolutely this is the workhorse of the foundry industry.
[05:53] You could not have any of the innovation without uh being ability to scale transistors down uh an absolute uh mustave.
[06:00] However there's also analog scaling going on at more mature nodes.
[06:07] So if you look at BCD technologies uh you know they're primarily at the 180 to 55 nanometer nodes today uh high-speed silicon germananium silicon
[06:18] high-speed silicon germananium silicon fatonics are going down to 4540.
[06:21] fatonics are going down to 4540 nanometer sensors go down to 28.
[06:24] nanometer sensors go down to 28 nanometers high performance technologies.
[06:27] nanometers high performance technologies like RFSOI are even going down to 22.
[06:30] like RFSOI are even going down to 22 nanometers but so if you look at green.
[06:33] nanometers but so if you look at green as kind of analog scaling and red as.
[06:35] as kind of analog scaling and red as digital scaling You can see that.
[06:38] digital scaling You can see that specialty foundaries are occupying the.
[06:40] specialty foundaries are occupying the top left quadrant uh in terms of.
[06:44] top left quadrant uh in terms of innovating and specializing while the.
[06:46] innovating and specializing while the digital foundaries in the darker red are.
[06:48] digital foundaries in the darker red are focusing on the on the bottom right.
[06:50] focusing on the on the bottom right quadrant of this of this graph.
[06:54] quadrant of this of this graph. So the tagline from this slide that value comes.
[06:56] tagline from this slide that value comes from function not just geometry.
[07:02] So the I work for tower semiconductor.
[07:05] So the I work for tower semiconductor. There's several uh specialty foundaries.
[07:07] There's several uh specialty foundaries out there.
[07:09] out there. You'll you know you'll see me refer to throughout the talk but I tried.
[07:12] refer to throughout the talk but I tried to make the talk as generic as possible.
[07:14] to make the talk as generic as possible but using tower as an example when when.
[07:17] but using tower as an example when when I could. So we we are headquartered in
[07:20] I could.
[07:20] So we we are headquartered in Israel.
[07:20] Uh we have uh 8 inch fab there.
[07:24] Israel.
[07:24] Uh we have uh 8 inch fab there.
[07:24] uh we have uh fabs in the US uh in right here where I'm talking from in Newport Beach, California today in Texas uh we have a partnership with ST in Ara and then our uh some of our more advanced fams in Japan uh uh in Tonami and Wazu and then service and support centers all over the world.
[07:28] uh we have uh fabs in the US uh in right here where I'm talking from in Newport Beach, California today in Texas uh we
[07:29] here where I'm talking from in Newport Beach, California today in Texas uh we
[07:33] Beach, California today in Texas uh we have a partnership with ST in Ara and
[07:36] have a partnership with ST in Ara and then our uh some of our more advanced fams in Japan uh uh in Tonami and Wazu and then service and support centers all over the world.
[07:38] then our uh some of our more advanced fams in Japan uh uh in Tonami and Wazu
[07:43] fams in Japan uh uh in Tonami and Wazu and then service and support centers all over the world.
[07:45] and then service and support centers all over the world.
[07:45] Uh so you know truly a a global uh footprint and serving customers worldwide.
[07:48] over the world. Uh so you know truly a a global uh footprint and serving customers worldwide.
[07:51] global uh footprint and serving customers worldwide.
[07:53] customers worldwide.
[07:53] This is a little bit more of a deeper dive into uh our capabilities.
[07:55] This is a little bit more of a deeper dive into uh our capabilities.
[07:58] dive into uh our capabilities.
[07:58] As I said, we have factories uh in uh Israel in Newport Beach in Texas and then our Japan and uh Italian factory in Agraate.
[08:01] said, we have factories uh in uh Israel in Newport Beach in Texas and then our Japan and uh Italian factory in Agraate.
[08:04] in Newport Beach in Texas and then our Japan and uh Italian factory in Agraate.
[08:09] Japan and uh Italian factory in Agraate.
[08:09] So the message here is just like digital foundaries, we must enable multiflap uh crossqualifications.
[08:12] So the message here is just like digital foundaries, we must enable multiflap uh crossqualifications.
[08:15] foundaries, we must enable multiflap uh crossqualifications.
[08:15] So you get you know you're not uh restricted to one geographic node particularly with the
[08:17] crossqualifications.
[08:17] So you get you know you're not uh restricted to one geographic node particularly with the
[08:19] you're not uh restricted to one geographic node particularly with the
[08:21] geographic node particularly with the geopolitical concerns and supply chain.
[08:24] geopolitical concerns and supply chain.
[08:24] We do want to serve our customers worldwide.
[08:27] worldwide.
[08:27] Um so tower as an example has crossqualified our platforms enableing maximum utilization also meeting customer expectations of having diversified supply chains.
[08:43] Um.
[08:45] Um this is the core of my presentation.
[08:46] this is the core of my presentation.
[08:46] I'll talk about technology applications and design enablement with a focus on specialty foundry.
[08:55] specialty foundry.
[08:55] So the way I like to present or our company likes to present is that we are providing analog technology to better our world.
[09:01] our world.
[09:01] uh whether it's uh accelerating global productivity through AI uh making it a greener planet uh through power efficient uh uh technologies or bringing the world together.
[09:15] power efficient uh uh technologies or bringing the world together.
[09:18] It's it's it truly when we come into work that is our goal.
[09:20] are we are we making
[09:22] that is our goal.
[09:22] are we are we making you know of course the end goal is to make money for for our shareholders but
[09:26] truly it is a great feeling to to know that you're contributing to what we consider a better world
[09:35] so let me start with you know something that's everybody's talking about these days is uh is AI right and this is where specialty foundaries are doing so if you look at our technologies today like silicon germananium and silicon photonics which I'll go into detail a little bit later.
[09:51] They're enabling very high data rates 1.6 terabyts per second.
[09:57] So, and a lot of this is required within the data center.
[10:01] So, our our technology is being used by our customers to make uh photonic integrated circuits and electronic integrated circuits that are going into the interface u of of the data rack.
[10:15] So the data going in and coming out has to pass through chips made by specialty foundaries.
[10:20] And then
[10:23] made by specialty foundries.
[10:25] And then of course a nice picture of the data center.
[10:28] Uh everything that we are uh posting these days resides some data center somewhere and is going through uh analog innovation done by specialty foundries.
[10:36] So the tagline from this slide compute scaling absolutely great work done by Nvidia's of the world but it does require innovation in the interconnect and how how these GPUs and CPUs talk to the outside world.
[10:56] So what what where do our technologies come in?
[10:58] So if you look at uh uh if I go back here right here, this is a transceiver and there's an optical fiber that's connecting either uh data racks in the same data center or within the data rack itself you're connecting different racks uh or different GPUs to scale up or scale out.
[11:21] uh the light's coming through a fiber and on the
[11:23] coming through a fiber and on the receive side and it's sensed by a photo.
[11:26] receive side and it's sensed by a photo diode which is a silicon photonics chip.
[11:28] diode which is a silicon photonics chip or becoming uh rapidly integrated into a.
[11:31] or becoming uh rapidly integrated into a photonic integrated circuit.
[11:33] photonic integrated circuit. Uh the signal is fairly weak here and it gets.
[11:36] signal is fairly weak here and it gets amplified by a trans impedance amplifier.
[11:39] amplified by a trans impedance amplifier which is served by a silicon geranium.
[11:41] which is served by a silicon geranium technology uh from a specialty foundry.
[11:43] technology uh from a specialty foundry and then depending on the topology uh.
[11:46] and then depending on the topology uh you need a clock data recovery circuit.
[11:47] you need a clock data recovery circuit which is also an analog circuit and and.
[11:49] which is also an analog circuit and and in many cases a silicon germanmanium.
[11:52] in many cases a silicon germanmanium electronic integrated circuit and then.
[11:55] electronic integrated circuit and then um on the transmit side uh you have.
[11:58] um on the transmit side uh you have again a equalizer that converts ser you.
[12:01] again a equalizer that converts ser you know uh sis type chip uh goes to a laser.
[12:05] know uh sis type chip uh goes to a laser driver which is again a silicon geranium.
[12:07] driver which is again a silicon geranium uh HPT based uh integrated circuit which.
[12:11] uh HPT based uh integrated circuit which drives a laser modulator uh.
[12:13] drives a laser modulator uh capabilities. So this is where electrons.
[12:15] capabilities. So this is where electrons are being now modulated into photons and.
[12:18] are being now modulated into photons and they go back into the fiber uh outside.
[12:22] they go back into the fiber uh outside. So you can see right here uh in the.
[12:24] So you can see right here uh in the interconnect the the interface to the interconnect the the interface to the outside world uh it's not digital.
[12:29] It's a lot of it is analog and served by silicon geranium and silicon photonics technologies which is a huge growth engine for specialty foundaries today.
[12:40] So I'll again uh give some examples of the technologies that is that are serving these markets.
[12:46] They need high speed uh high GM high power gain technologies and you can see uh you know how to technologies over the last decade have gone from about 250 GHz and FT to approaching 400 and in uh in terms of FMAX going from about 300 GHz to now approaching more than half a terraertz u you know capabilities.
[13:14] and this is a tabular represent presentation of that and and couple of things to point out here that as as the speeds are increasing we're able to keep the breakdown voltage of these transistors uh fairly uh fairly stable.
[13:27] transistors uh fairly uh fairly stable.
[13:29] So in fact from our fifth to sixth generation technology we've increased
[13:32] the breakdown voltage of the transistor while rapidly increasing the speed of the transistors.
[13:36] Uh and these technologies as I said served at mature nodes but as we are coming to our sixth generation we are now enabling this in 65 nanometer 300 mm technology.
[13:48] It's what many people would called an ancient CMOS node but you don't need advanced CMOS.
[13:54] you want cost effective solutions that you can cycle uh with low cycle times in a factory.
[14:00] But the 65 nanometer gives you an option if you do want to put significant digital content at a reasonable speed or a higher drive CMOS.
[14:09] you have the option now to use kind of 300 mm capabilities uh from specialty foundaries and now not resting on our road maps you know rapidly approaching uh you know 6 700 GHz in terms of uh FTF max performances
[14:27] GHz in terms of uh FTF max performances right.
[14:30] Uh and for technology I'll you'll see me.
[14:32] Uh and for technology I'll you'll see me rapidly tie it to design enablement.
[14:34] Rapidly tie it to design enablement which is near and dear to my heart.
[14:38] Which is near and dear to my heart the PDKs coming from specialty.
[14:40] The PDKs coming from specialty foundaries have to be accurate.
[14:42] Foundaries have to be accurate.
[14:43] That means when you design in it, you simulate it.
[14:46] That's exactly what you'll get.
[14:47] So, you know, foundaries use advanced models such as Hikum.
[14:51] Uh that capture this is the ICBCE curve of a transistor.
[14:53] Uh you know, you can see the measured data in in blue, the the simula the model data in red.
[14:56] We capturing the quasi saturation regime, the high early voltage, and even the breakdown of the transistor.
[14:59] So as the transistor is amplifying its load line the lot signal load line is moving along these curves.
[15:01] And the lot signal models of the transistor are capping it accurately not just DC but we are also capturing uh the RF performance.
[15:03] This is showing FD versus IC across temperature uh between the discrete data measured versus modeled extremely high levels of.
[15:28] Modeled extremely high levels of accuracy now that the specialty foundries are delivering with the goal of ensuring first time success.
[15:35] What you simulate in your in your design tools is what you will get in silicon.
[15:41] It's not only the active devices but a lot of effort has has gone on to uh develop accurate models and EM simulation uh stackups uh with our vendor partners whether it's cadence or keysite ads or emx whatever it might be we silicon validate these flows and provide uh stackups that our customers can then use uh to confidently design their inductors or transmission lines which are needed in these in these circuits.
[16:10] Not only that, we also provide reference flows.
[16:13] So we do a full we don't compete with our customers.
[16:14] We don't make products.
[16:16] We sell wafers at the end of the day, but we do make integrated circuits to demonstrate the capabilities of our technology and to show our customers that our PDKs are accurate.
[16:24] So this is showing a a multi-stage LNA uh for 5G.
[16:30] showing a a multi-stage LNA uh for 5G millimeter wave 28 GHz that is silicon.
[16:33] millimeter wave 28 GHz that is silicon validated uh through our PDKs giving confidence uh you know as as somebody.
[16:39] once said trust but verify right.
[16:44] uh tower silicon phetonics I showed you the silicon germanium technologies that are going into to optical interconnects.
[16:53] but our silicon fatonics this is where tower is truly a leader uh is pro as a as a foundry leader uh enabling both 200 mm uh 180 nanometer for lowcost fast cycle time uh quick uh development of of technologies as well as our 300 mm more advanced 45 nanometer technologies for C and O band optical transceiver applications that are now serving uh you know uh 400 800 GB up to 1.6 6 terab uh uh speeds with up to 200 Gbit per lane kind of applications.
[17:28] Uh we also have options to provide low
[17:31] Uh we also have options to provide low loss nitrides which I'll talk in the next slide.
[17:35] And then also heterogeneous introduc.
[17:37] So let me just walk you through this table.
[17:40] So our base platform is you know a simple PH18 we call it PH18M.
[17:43] PH for uh fatonix 18 for 180 nanometer.
[17:47] Uh it's a thin silicon on box.
[17:49] We use bed oxide because to conduct light you need silicon to be covered by oxide on all four sides.
[17:54] Uh we have silicon waveguides and half edge waveguides for strip waveguides.
[18:00] Silicon nitride waveguides are needed for edge coupling.
[18:03] Uh they're more much more efficient.
[18:05] Silicon waveguides just the refractive index is not so good when you bring in light from the from the edge of the chip.
[18:13] And then a more cos traditional CMOS back end including copper.
[18:16] Uh heaters are provided for kind of trimming your modulators.
[18:18] Uh we provide optical coupling.
[18:22] This is the equivalent of an IO through either uh you know a vertical top- down grating
[18:32] you know a vertical top- down grating coupler or nitride based edge couplers.
[18:35] coupler or nitride based edge couplers uh modulators uh MCMS photo detectors.
[18:39] uh modulators uh MCMS photo detectors based out of germananium.
[18:41] This platform does not have a gain stage.
[18:44] For our gain stage, we have partnered with open light uh and they have developed 35 capabilities that give higher speed modulators.
[18:52] uh uh as well as a gain element which is a 1310 nanometer uh laser.
[18:59] So options depending on how much you want to integrate are available from a foundry.
[19:03] And uh you know talking about you know trust but verify here's a press release that we just did a couple of days ago as our earnings report came out.
[19:10] Uh we talked about uh you know uh a $1.3 billion in uh in contracts that we've signed for 2027.
[19:22] Uh this is not the the photonix business we expect to do.
[19:25] This is just the contractual agreements we've signed with our customers.
[19:28] So it's speaking to just
[19:33] our customers.
[19:34] So it's speaking to just the importance of uh specialty foundaries such as Tower that are playing a big role in the AI revolution or AI buildup.
[19:43] There's other emerging applications beyond data centers.
[19:45] There's quantum computing where our technologies is providing low-loss wave guides that basically at the end of the day helps with uh quantum operations uh high precision phase shifters basically having very efficient cubit uh uh propagation uh in quantum computing.
[20:07] We'd also c have customers using us for lidars.
[20:09] This is typically for automotive uh where you need precise optical control, you need coherence, uh the onchip interferometers are required, pace shifters, optical.
[20:22] So all the components that I mentioned that are needed for data centers in the previous slide most with almost no modification are being used for LAR.
[20:28] So it's great for us.
[20:30] the same technology,
[20:33] it's great for us. the same technology, you know, being used for many different
[20:34] you know, being used for many different applications. And this is the beauty of
[20:36] applications. And this is the beauty of working with a foundry is like you're
[20:38] working with a foundry is like you're not c you're not so customized the the
[20:41] not c you're not so customized the the cost is amortized over many different
[20:42] cost is amortized over many different applications.
[20:44] applications. We also have customers using us for bio
[20:46] We also have customers using us for bio sensors. So it's uh uh it's if you have
[20:50] sensors. So it's uh uh it's if you have some like you can design ring resonators
[20:53] some like you can design ring resonators in silicon photonics technologies. So as
[20:56] in silicon photonics technologies. So as the light is propagating along a circle,
[20:58] the light is propagating along a circle, it allows for precise phase detection.
[21:01] it allows for precise phase detection. Uh minor changes in the environment can
[21:04] Uh minor changes in the environment can be very accurately detected by these
[21:06] be very accurately detected by these ringators as a change in refractive
[21:08] ringators as a change in refractive index.
[21:10] index. Uh gyroscopes, believe it or not, you
[21:13] Uh gyroscopes, believe it or not, you need to sense way of you know handheld
[21:15] need to sense way of you know handheld device or other device where it's
[21:17] device or other device where it's pointing at. Uh again ultra lows
[21:20] pointing at. Uh again ultra lows waveguides. I talked about a process uh
[21:23] waveguides. I talked about a process uh where we have very low loss nitride
[21:25] where we have very low loss nitride waveguides which are orders of magnitude
[21:27] waveguides which are orders of magnitude lower loss than you would get in a
[21:28] lower loss than you would get in a traditional photonix process. This we
[21:31] traditional photonix process. This we have custom developed. Again by having
[21:33] have custom developed. Again by having such low losses they're extremely
[21:35] such low losses they're extremely sensitive to motion. So as you change
[21:37] sensitive to motion. So as you change the motion the signal going through that
[21:41] the motion the signal going through that waveguide can be can be picked up. Any
[21:43] waveguide can be can be picked up. Any small changes in modulation or amplitude
[21:46] small changes in modulation or amplitude can be picked up through that waveguide.
[21:49] can be picked up through that waveguide. But for that to happen you need
[21:50] But for that to happen you need extremely low loss wave guides as the
[21:52] extremely low loss wave guides as the light is passing through it. So not just
[21:55] light is passing through it. So not just data centers but many different
[21:57] data centers but many different applications where specialty foundaries
[21:59] applications where specialty foundaries are playing a role
[22:02] back to design enablement uh you you can
[22:05] back to design enablement uh you you can have all the technology but how most all
[22:08] have all the technology but how most all designs are done on the computer you
[22:09] designs are done on the computer you need to have accurate PDKs. So here uh
[22:13] need to have accurate PDKs. So here uh we have partnered with our EDA partners
[22:15] we have partnered with our EDA partners whether it's cadence synopsis uh
[22:17] whether it's cadence synopsis uh seammens IP providers such as open light
[22:20] seammens IP providers such as open light we don't claim to do no do all the
[22:22] we don't claim to do no do all the design ourselves we we must rely on our
[22:24] design ourselves we we must rely on our partners so for example with cadence for
[22:27] partners so for example with cadence for we have developed capabilities to do
[22:29] we have developed capabilities to do photonic verog models so what this
[22:32] photonic verog models so what this allows is you can completely do photonic
[22:34] allows is you can completely do photonic simulations electrooptic simulations
[22:36] simulations electrooptic simulations without going to a photonic simulator
[22:38] without going to a photonic simulator but you can do it in a spice-like
[22:39] but you can do it in a spice-like simulator
[22:42] uh with synopsis we have done uh
[22:45] uh with synopsis we have done uh capabilities in their you know built
[22:46] capabilities in their you know built PDKs in their opto compiler platform
[22:49] PDKs in their opto compiler platform which is a you know end to end uh
[22:51] which is a you know end to end uh photonic integrated circuit design tool.
[22:55] photonic integrated circuit design tool. uh here using the same synopsis PDK we
[22:58] uh here using the same synopsis PDK we we're actually simulating uh integrated
[23:01] we're actually simulating uh integrated lasers like 35 components you know
[23:03] lasers like 35 components you know showing multi- multi-lane
[23:06] showing multi- multi-lane uh eye diagrams that can be simulated
[23:09] uh eye diagrams that can be simulated and then finally we've partnered with
[23:11] and then finally we've partnered with seammens uh to do DRC checks now if you
[23:15] seammens uh to do DRC checks now if you look at normal DRC verification it is uh
[23:19] look at normal DRC verification it is uh done with uh you know Manhattan
[23:21] done with uh you know Manhattan geometries and it is uh uh what is a
[23:25] geometries and it is uh uh what is a line and what is a space when you have
[23:27] line and what is a space when you have curved structures such as rings how do
[23:29] curved structures such as rings how do you define a line and space so there's
[23:31] you define a line and space so there's equation based DRC techniques that we've
[23:33] equation based DRC techniques that we've collaborate with seammens and
[23:34] collaborate with seammens and implemented for uh running your GDS
[23:37] implemented for uh running your GDS before you did tape out so the goal here
[23:39] before you did tape out so the goal here is let let product designers choose EDA
[23:42] is let let product designers choose EDA tools not the foundry
[23:44] tools not the foundry here's some more examples of our
[23:46] here's some more examples of our collaboration you know we worked with
[23:48] collaboration you know we worked with Elion uh in Spain to develop fabrication
[23:51] Elion uh in Spain to develop fabrication tolerant techniques there are a lot of
[23:53] tolerant techniques there are a lot of EDA vendors
[23:54] EDA vendors startups that have come up in the last
[23:56] startups that have come up in the last three four years whether it's latitude
[23:57] three four years whether it's latitude lucida spark photonix that have come up
[24:00] lucida spark photonix that have come up with very unique photonic uh electronic
[24:03] with very unique photonic uh electronic design automation capabilities that
[24:05] design automation capabilities that we're partnering with again we want as a
[24:07] we're partnering with again we want as a foundry to to bring all the capabilities
[24:09] foundry to to bring all the capabilities to our customers and then they can
[24:11] to our customers and then they can choose the EDA tool that works best for
[24:14] choose the EDA tool that works best for them
[24:16] them uh another thing that you might have
[24:17] uh another thing that you might have heard of is copackage optics where uh
[24:20] heard of is copackage optics where uh you are now specialty foundaries are now
[24:23] you are now specialty foundaries are now entering uh little bit of the OSAD
[24:26] entering uh little bit of the OSAD domain. We're not trying to that but
[24:29] domain. We're not trying to that but this is where we can bond two wafers.
[24:31] this is where we can bond two wafers. For example, you have an EIC like in a
[24:34] For example, you have an EIC like in a modulator driver circuit. The modulator
[24:36] modulator driver circuit. The modulator is sitting on a photonix integrated
[24:38] is sitting on a photonix integrated circuits. The driver is in a silicon
[24:40] circuits. The driver is in a silicon gummanium. We we made the two to have
[24:43] gummanium. We we made the two to have best of breed solutions. So we flip it
[24:45] best of breed solutions. So we flip it and bond it. And when the our customers
[24:47] and bond it. And when the our customers get this, they get essentially what it
[24:50] get this, they get essentially what it looks like, a single wafer, but it's got
[24:52] looks like, a single wafer, but it's got two chips in a 3D IC configuration. And
[24:55] two chips in a 3D IC configuration. And to go with that, you need to co-optimize
[24:57] to go with that, you need to co-optimize two different PDKs, two different flows.
[25:00] two different PDKs, two different flows. And we have partnered again with Cadence
[25:01] And we have partnered again with Cadence here to come up with a 3DIC flow where
[25:04] here to come up with a 3DIC flow where you're co-em simulating, co-verifying
[25:07] you're co-em simulating, co-verifying two different wafers, clipped one on top
[25:10] two different wafers, clipped one on top of the other and and taping out and
[25:12] of the other and and taping out and verifying it all together. So these are
[25:15] verifying it all together. So these are innovations that very recently that
[25:17] innovations that very recently that specialty foundaries such as tower are
[25:19] specialty foundaries such as tower are having to enable so customers can make
[25:22] having to enable so customers can make most of their designs.
[25:24] most of their designs. I'll talk a little bit about our power
[25:26] I'll talk a little bit about our power management BCD technologies green energy
[25:30] management BCD technologies green energy uh this is where if you look at data
[25:32] uh this is where if you look at data center power consumption it's moving
[25:35] center power consumption it's moving from about 2% in 22 to 7% of the global
[25:38] from about 2% in 22 to 7% of the global electricity consumption. uh you all
[25:41] electricity consumption. uh you all heard heard about how data centers are
[25:44] heard heard about how data centers are are going to sap our grids and this is
[25:46] are going to sap our grids and this is really happening. One of the ways
[25:48] really happening. One of the ways specialty foundaries can help is
[25:51] specialty foundaries can help is minimize the losses. So how how does how
[25:53] minimize the losses. So how how does how do data centers get their power? Uh you
[25:56] do data centers get their power? Uh you have you know kilovolts of uh
[25:59] have you know kilovolts of uh electricity very high voltages coming on
[26:02] electricity very high voltages coming on the power lines and the GPUs operate at
[26:04] the power lines and the GPUs operate at 1.2 volts. So you have to take very high
[26:06] 1.2 volts. So you have to take very high voltages and convert them to very low
[26:08] voltages and convert them to very low voltages. Now if you convert them very
[26:10] voltages. Now if you convert them very far away from the GPUs there's a lot of
[26:13] far away from the GPUs there's a lot of loss because the the loss is voltage
[26:16] loss because the the loss is voltage times current like and if the voltage is
[26:18] times current like and if the voltage is small the current has to be high. If the
[26:21] small the current has to be high. If the current is high the resistive losses are
[26:23] current is high the resistive losses are high. So what you want to do bring is
[26:25] high. So what you want to do bring is the highest voltage as close as possible
[26:26] the highest voltage as close as possible to the GPU and at the last second last
[26:30] to the GPU and at the last second last millimeter converted to a lower voltage
[26:32] millimeter converted to a lower voltage and this is done by DC toDC converters
[26:35] and this is done by DC toDC converters and this is DC2DC converters are are the
[26:37] and this is DC2DC converters are are the bread and butter of of specialty foundry
[26:39] bread and butter of of specialty foundry BCD technologies and what they require
[26:42] BCD technologies and what they require is basically uh uh three things they
[26:46] is basically uh uh three things they require reliability so the HCI is a big
[26:49] require reliability so the HCI is a big problem in high voltage devices they
[26:50] problem in high voltage devices they reduce low RDS on the when they're on
[26:54] reduce low RDS on the when they're on the on resistance of these transistors
[26:56] the on resistance of these transistors should be as low as possible. So the
[26:58] should be as low as possible. So the omic losses are less in the end helping
[27:01] omic losses are less in the end helping with the greener planet the efficiency
[27:02] with the greener planet the efficiency is higher and then when they're
[27:04] is higher and then when they're switching they charge and discharge very
[27:06] switching they charge and discharge very quickly. So the gate charge QG is a
[27:08] quickly. So the gate charge QG is a figure marriage. So QG and Ron are
[27:10] figure marriage. So QG and Ron are figures of merit that that B that buck
[27:13] figures of merit that that B that buck converter designers always worry about
[27:15] converter designers always worry about and foundry specialty foundaries try to
[27:18] and foundry specialty foundaries try to deliver as good devices as possible. So
[27:22] deliver as good devices as possible. So low QG and low R. The key message from
[27:25] low QG and low R. The key message from this slide is that a single platform
[27:27] this slide is that a single platform doesn't work for all. What you develop
[27:29] doesn't work for all. What you develop for AI data centers in terms of high
[27:31] for AI data centers in terms of high current DC2DC converters uh low RDS on
[27:34] current DC2DC converters uh low RDS on high voltage transistors uh doesn't work
[27:37] high voltage transistors uh doesn't work for automotive. What their need is a
[27:39] for automotive. What their need is a higher voltages. Uh they also have DCDC
[27:42] higher voltages. Uh they also have DCDC converters uh bringing high voltages
[27:44] converters uh bringing high voltages from the periphery of the car to the
[27:46] from the periphery of the car to the internal elements. Uh likewise on
[27:50] internal elements. Uh likewise on handheld phones where you have power you
[27:52] handheld phones where you have power you know battery charging uh IC's you have
[27:54] know battery charging uh IC's you have different requirements. So a specialty
[27:56] different requirements. So a specialty foundry must then enable platforms that
[27:58] foundry must then enable platforms that are optimized for each of these
[28:00] are optimized for each of these applications. Ideally we'd like one
[28:02] applications. Ideally we'd like one platform to serve all. That doesn't
[28:04] platform to serve all. That doesn't happen. We need to actually build
[28:06] happen. We need to actually build multiple platforms that serve uh
[28:09] multiple platforms that serve uh multiple applications.
[28:11] multiple applications. Again on design enablement there's lots
[28:13] Again on design enablement there's lots of effects that we worry about. For
[28:15] of effects that we worry about. For example, as these uh LDMOS transistors
[28:18] example, as these uh LDMOS transistors charge up, uh they tend to conduct a lot
[28:21] charge up, uh they tend to conduct a lot of current through parasitic BJTs into
[28:23] of current through parasitic BJTs into the substrate. Uh so we need to have
[28:25] the substrate. Uh so we need to have advanced models for parasitic BJTs,
[28:28] advanced models for parasitic BJTs, especially as this buck converters
[28:29] especially as this buck converters forward bias, the the isolated drain of
[28:31] forward bias, the the isolated drain of these transistors. And when you turn
[28:34] these transistors. And when you turn these transistors off, uh go from
[28:36] these transistors off, uh go from forward bias to reverse bias, they stop,
[28:38] forward bias to reverse bias, they stop, they don't stop immediately conducting.
[28:40] they don't stop immediately conducting. There's a phenomena called reverse
[28:41] There's a phenomena called reverse recovery. So foundaries such as Tower
[28:43] recovery. So foundaries such as Tower have developed proprietary models to
[28:45] have developed proprietary models to capture this reverse recovery. So our
[28:47] capture this reverse recovery. So our customers can simulate the efficiency of
[28:49] customers can simulate the efficiency of their buck converters very accurately.
[28:51] their buck converters very accurately. As I talked about QG earlier, we have
[28:54] As I talked about QG earlier, we have options in our technology to do very
[28:56] options in our technology to do very fast switching and the models advanced
[28:59] fast switching and the models advanced models have to capture that that
[29:01] models have to capture that that behavior accurately.
[29:04] behavior accurately. Another thing that is very important for
[29:06] Another thing that is very important for infrastructure IC's is is the is the
[29:08] infrastructure IC's is is the is the transistor going to uh work as well as
[29:11] transistor going to uh work as well as it does at time equal to zero versus
[29:14] it does at time equal to zero versus seven or eight years into the into the
[29:16] seven or eight years into the into the operation lifetime operation of the
[29:18] operation lifetime operation of the device. So aging models is something
[29:20] device. So aging models is something again that that uh tower semiconductor
[29:24] again that that uh tower semiconductor has invested a lot of this takes months
[29:26] has invested a lot of this takes months and months of measurements. Basically
[29:27] and months of measurements. Basically hot carrier injection as a transistor is
[29:30] hot carrier injection as a transistor is being used in a data center or in or in
[29:32] being used in a data center or in or in an auto automobile. Uh it degrades its
[29:36] an auto automobile. Uh it degrades its RON increases. No foundry can deliver a
[29:40] RON increases. No foundry can deliver a trans transistor that does not degrade.
[29:41] trans transistor that does not degrade. The goal is to minimize that degrade but
[29:43] The goal is to minimize that degrade but also to be able to simulate it. And
[29:45] also to be able to simulate it. And you'd ask why do you want to simulate
[29:47] you'd ask why do you want to simulate it? First you want to know if the device
[29:49] it? First you want to know if the device is going to have a 10 15 year lifetime
[29:51] is going to have a 10 15 year lifetime whatever the spec might be. But the
[29:53] whatever the spec might be. But the other one is optimization. And this is
[29:55] other one is optimization. And this is for example a buck converter. uh which
[29:57] for example a buck converter. uh which has got a high-side and a low side
[29:58] has got a high-side and a low side device and it's it's the high-side
[30:01] device and it's it's the high-side device is sees hard switching. So it
[30:04] device is sees hard switching. So it operates in a regime where the
[30:05] operates in a regime where the transistor has high hard carrier aging.
[30:07] transistor has high hard carrier aging. On the low side it's soft switching. So
[30:09] On the low side it's soft switching. So it's operating in an offstate region
[30:10] it's operating in an offstate region where the switching is is is is less. So
[30:14] where the switching is is is is less. So uh so you can have uh hard and soft
[30:18] uh so you can have uh hard and soft switching and if you have models you're
[30:20] switching and if you have models you're not overdesigning for hard switching.
[30:22] not overdesigning for hard switching. You're not overdesigning for the worst
[30:24] You're not overdesigning for the worst case condition. you're actually taking
[30:26] case condition. you're actually taking advantage of the fact the transistor's
[30:27] advantage of the fact the transistor's mission profile is actually going to
[30:29] mission profile is actually going to allow it to degrade much less. So then
[30:32] allow it to degrade much less. So then you can use the transistor which is
[30:34] you can use the transistor which is smaller and not have to overd design. So
[30:36] smaller and not have to overd design. So the aging models not only are sign off
[30:39] the aging models not only are sign off for application that it you know for
[30:42] for application that it you know for product uh lifetime requirements but
[30:44] product uh lifetime requirements but also you can optimize the performance of
[30:47] also you can optimize the performance of the device the die size uh by taking
[30:49] the device the die size uh by taking advantage of these aging models. A lot
[30:51] advantage of these aging models. A lot of work for the foundry teams but really
[30:53] of work for the foundry teams but really really a huge huge uh benefit to product
[30:57] really a huge huge uh benefit to product designers if if they want to use these
[30:59] designers if if they want to use these models to optimize their divines.
[31:03] I want to move to connect connecting the
[31:05] I want to move to connect connecting the planet. This is another area where
[31:07] planet. This is another area where specialty foundaries such as tower are
[31:09] specialty foundaries such as tower are are doing. So if you look at the front
[31:10] are doing. So if you look at the front end module of a that's this is the first
[31:14] end module of a that's this is the first thing that after the antenna that that
[31:16] thing that after the antenna that that your signal sees that comes inside the
[31:17] your signal sees that comes inside the phone and whether it's a Wi-Fi router or
[31:21] phone and whether it's a Wi-Fi router or a phone or a Wi-Fi receive module
[31:23] a phone or a Wi-Fi receive module there's something called a front-end
[31:24] there's something called a front-end module because it's the front end right
[31:26] module because it's the front end right after the antenna. So the antenna is
[31:28] after the antenna. So the antenna is here on the receive side. Um it it's
[31:32] here on the receive side. Um it it's it's you need a SY or an SOI LNA. And
[31:36] it's you need a SY or an SOI LNA. And then the there's a RF switch out here
[31:38] then the there's a RF switch out here that switchs between transmit and
[31:39] that switchs between transmit and receive mode. Remember the same antenna
[31:41] receive mode. Remember the same antenna is being used for both transmit and
[31:42] is being used for both transmit and receive. And when it's in the transmit
[31:44] receive. And when it's in the transmit mode, you have uh power amplifiers that
[31:47] mode, you have uh power amplifiers that amplify your signal to get to the
[31:49] amplify your signal to get to the bassband. Uh and these need controllers.
[31:52] bassband. Uh and these need controllers. And if if you look at the front end
[31:53] And if if you look at the front end module, I'd say 90% of those chips are
[31:56] module, I'd say 90% of those chips are served by the uh by the specialty
[31:58] served by the uh by the specialty foundaries. 90% if not 100%. I might be
[32:01] foundaries. 90% if not 100%. I might be missing something, but this is another
[32:03] missing something, but this is another huge area that's served by specialty
[32:05] huge area that's served by specialty foundaries such as tower. And our
[32:07] foundaries such as tower. And our technologies need to be high
[32:09] technologies need to be high performance. They need to be high
[32:10] performance. They need to be high efficiency uh to serve these these
[32:13] efficiency uh to serve these these markets. So I just took some of the
[32:16] markets. So I just took some of the capabilities that we put together. So
[32:18] capabilities that we put together. So the foundry IP is something that can
[32:21] the foundry IP is something that can really help you hit the ground running.
[32:22] really help you hit the ground running. So if you look at the switch on the LNA
[32:24] So if you look at the switch on the LNA side, we put together uh reference
[32:26] side, we put together uh reference designs again not competing with the
[32:28] designs again not competing with the product but giving it uh as references
[32:31] product but giving it uh as references to our customers who can who likely
[32:33] to our customers who can who likely won't use it as is. They'll modify it
[32:35] won't use it as is. They'll modify it heavily but it gives them confidence
[32:37] heavily but it gives them confidence that this has been silicon verified. So
[32:39] that this has been silicon verified. So applications such as satcom, Wi-Fi,
[32:41] applications such as satcom, Wi-Fi, cellular, uh this this also drives us to
[32:44] cellular, uh this this also drives us to improve our technology because we're
[32:46] improve our technology because we're getting good feedback from our own IP
[32:48] getting good feedback from our own IP designers on how to improve our
[32:50] designers on how to improve our technology before it gets to our
[32:52] technology before it gets to our customers. Likewise for the PA switch uh
[32:57] customers. Likewise for the PA switch uh and leading all the way to tunable
[32:58] and leading all the way to tunable filters with advanced switch
[33:00] filters with advanced switch technologies.
[33:03] technologies. A figure of merit if you go back to uh
[33:06] A figure of merit if you go back to uh this switch is again just like the LDMOS
[33:08] this switch is again just like the LDMOS devices you need the switches to have
[33:11] devices you need the switches to have low on resistance and low off
[33:13] low on resistance and low off capacitance. So you can have I typically
[33:15] capacitance. So you can have I typically you can make the transistor bigger to
[33:17] you can make the transistor bigger to reduce the on resistance but the off
[33:19] reduce the on resistance but the off capacitance goes up. So this is an area
[33:22] capacitance goes up. So this is an area where you know all all many specialty
[33:25] where you know all all many specialty foundaries are are working very hard not
[33:28] foundaries are are working very hard not only to improve our own seoff of the
[33:30] only to improve our own seoff of the transistor u as you go generationally
[33:33] transistor u as you go generationally but also improving the capabilities by
[33:36] but also improving the capabilities by shrinking the design rules so that these
[33:38] shrinking the design rules so that these big transistors don't occupy too much
[33:39] big transistors don't occupy too much space. So as you shrink the device the
[33:42] space. So as you shrink the device the off capacitance increases is minimized.
[33:45] off capacitance increases is minimized. Uh so not just intrinsic improvement in
[33:48] Uh so not just intrinsic improvement in performance but intrinsic improvement
[33:50] performance but intrinsic improvement with shrunk design rules is kind of the
[33:52] with shrunk design rules is kind of the tagline from the slide line.
[33:56] tagline from the slide line. One of the issues with uh these switches
[33:58] One of the issues with uh these switches is that they have a lot of interaction
[34:00] is that they have a lot of interaction between die and package. So if you look
[34:02] between die and package. So if you look at a typical die, it's flipped. Uh we're
[34:05] at a typical die, it's flipped. Uh we're using flip chip. You have bumps and then
[34:07] using flip chip. You have bumps and then it's put inside a package. You would
[34:09] it's put inside a package. You would think that the die operates on its own,
[34:11] think that the die operates on its own, but this capacitance out here is several
[34:14] but this capacitance out here is several phentoarads. And if you're talking about
[34:16] phentoarads. And if you're talking about 30 40 50 ftoarad off capacitance uh uh
[34:20] 30 40 50 ftoarad off capacitance uh uh switches uh then this this series this
[34:24] switches uh then this this series this shunt capacitance a few phentoarads can
[34:26] shunt capacitance a few phentoarads can be a killer uh for especially if you
[34:28] be a killer uh for especially if you have large uh stacks of devices. So we
[34:31] have large uh stacks of devices. So we have come up with capabilities using
[34:33] have come up with capabilities using standard extraction techniques uh to
[34:36] standard extraction techniques uh to basically add the PCB into your uh chip
[34:39] basically add the PCB into your uh chip design. So without having to do 3D EM
[34:41] design. So without having to do 3D EM simulations, you can get accurate
[34:43] simulations, you can get accurate modeling of not only these stack of
[34:46] modeling of not only these stack of switches. So this is transistor one,
[34:47] switches. So this is transistor one, transistor 2, like a two stack. In
[34:50] transistor 2, like a two stack. In reality, there's typical 15 20 stacks in
[34:52] reality, there's typical 15 20 stacks in a in a switch design to handle the
[34:54] a in a switch design to handle the voltage. But you can all model all the
[34:56] voltage. But you can all model all the interaction between transistors and the
[34:58] interaction between transistors and the package simultaneously using uh
[35:01] package simultaneously using uh traditional extraction techniques such
[35:02] traditional extraction techniques such as caliber XRC or Quantas QRC.
[35:08] We've also enabled capabilities. Here's
[35:10] We've also enabled capabilities. Here's a press release with Broadcom where we
[35:12] a press release with Broadcom where we did a FEIC like a switch LNAP on a
[35:15] did a FEIC like a switch LNAP on a single chip. So, traditionally they are
[35:16] single chip. So, traditionally they are separate chips, but there's the
[35:18] separate chips, but there's the advantages of integrating that. We've
[35:20] advantages of integrating that. We've developed LDMOS power amplifier uh on
[35:23] developed LDMOS power amplifier uh on SOI. Uh we're using an NFT LNA and an
[35:26] SOI. Uh we're using an NFT LNA and an RFSOI switch all bundled into a single
[35:29] RFSOI switch all bundled into a single uh single die. So the chip ends up being
[35:32] uh single die. So the chip ends up being a little bit bigger but the losses
[35:34] a little bit bigger but the losses between those components get get to be
[35:37] between those components get get to be lower. So if you go back essentially we
[35:39] lower. So if you go back essentially we put most of this front-end module on a
[35:41] put most of this front-end module on a single chip with specialty foundry uh
[35:44] single chip with specialty foundry uh innovation.
[35:49] Another way we connect the world is our
[35:52] Another way we connect the world is our sensor technologies. So it is connecting
[35:55] sensor technologies. So it is connecting in this is connecting the rail and
[35:57] in this is connecting the rail and digital world. So traditional
[35:58] digital world. So traditional technologies where Tower has been strong
[36:00] technologies where Tower has been strong in is medical and dental X-ray. Uh
[36:03] in is medical and dental X-ray. Uh high-end photography. Some of the most
[36:05] high-end photography. Some of the most famous movies have been shot. Uh I don't
[36:09] famous movies have been shot. Uh I don't know if you guys, it's been a while, but
[36:11] know if you guys, it's been a while, but The Life of Pi, one of my favorite
[36:12] The Life of Pi, one of my favorite movies was shot with uh with the
[36:15] movies was shot with uh with the technology, the sensor technology built
[36:17] technology, the sensor technology built at tower. Uh there's broadcasting um c
[36:22] at tower. Uh there's broadcasting um c uh for for broadcasting capabilities,
[36:25] uh for for broadcasting capabilities, DSLR cameras, uh barcodes, not so sexy
[36:30] DSLR cameras, uh barcodes, not so sexy applications, but you know, you you can
[36:32] applications, but you know, you you can see where specialty technologies are
[36:33] see where specialty technologies are going in. But two areas where I want to
[36:35] going in. But two areas where I want to highlight is is where we seeing a lot of
[36:37] highlight is is where we seeing a lot of growth is um micro displays for AR, VR,
[36:42] growth is um micro displays for AR, VR, augmented reality, virtual reality.
[36:44] augmented reality, virtual reality. These need very specialized uh OLED
[36:47] These need very specialized uh OLED displays. Uh and our technologies uh
[36:51] displays. Uh and our technologies uh have been customized which I'll show in
[36:53] have been customized which I'll show in the next slide uh to be really useful
[36:55] the next slide uh to be really useful for these micro displays
[36:58] for these micro displays also for time offlight face recognition
[37:00] also for time offlight face recognition lidars u u some of our sensor
[37:03] lidars u u some of our sensor technologies are being used. So it's
[37:06] technologies are being used. So it's this is coming down very much to the
[37:07] this is coming down very much to the consumer level. So you can see how
[37:09] consumer level. So you can see how special specialty foundry technologies
[37:11] special specialty foundry technologies are are touching uh many of you.
[37:16] are are touching uh many of you. So here's an example of our PDK for uh
[37:18] So here's an example of our PDK for uh our sensors. Uh and if you look at our
[37:22] our sensors. Uh and if you look at our 65 nmter silicon blackmail uh black
[37:25] 65 nmter silicon blackmail uh black plane technology, it has regular CMOS.
[37:28] plane technology, it has regular CMOS. This is what what you get from a regular
[37:29] This is what what you get from a regular CMOS technology. But then we have done
[37:31] CMOS technology. But then we have done innovation things like low leakage
[37:33] innovation things like low leakage pixels that lead to longer battery life.
[37:36] pixels that lead to longer battery life. uh high value resistors as well as high
[37:38] uh high value resistors as well as high density MIM capacitors that lead to D
[37:40] density MIM capacitors that lead to D size reduction
[37:42] size reduction uh advanced BJTs for precision band gap
[37:45] uh advanced BJTs for precision band gap uh voltage generation multi-layer
[37:47] uh voltage generation multi-layer options where you can trade off
[37:48] options where you can trade off performance and cost special structures
[37:51] performance and cost special structures such as OLED anodes that improve
[37:54] such as OLED anodes that improve luminous uniformity and all this is
[37:57] luminous uniformity and all this is included in the PDK.
[37:59] included in the PDK. Also included in the PDK is protection
[38:01] Also included in the PDK is protection devices. These are subject to high ESD
[38:04] devices. These are subject to high ESD events. So the foundry is now providing
[38:07] events. So the foundry is now providing very capable u u ESD devices that our
[38:11] very capable u u ESD devices that our product designers can include in the
[38:13] product designers can include in the design and verify before tape out. So
[38:16] design and verify before tape out. So the message here again is customiza
[38:19] the message here again is customiza customization
[38:20] customization drives differentiation and this is
[38:22] drives differentiation and this is customization as I keep mentioning is
[38:25] customization as I keep mentioning is the bread and butter for specialty
[38:26] the bread and butter for specialty foundaries and something that we have
[38:28] foundaries and something that we have become very good at.
[38:33] I I briefly alluded to this uh we can't
[38:36] I I briefly alluded to this uh we can't do this ourselves. We rely on our
[38:38] do this ourselves. We rely on our partners. So this is the who's who of
[38:40] partners. So this is the who's who of the EDA world. uh we try to you know uh
[38:44] the EDA world. uh we try to you know uh serve as many customers as possible
[38:46] serve as many customers as possible giving all the going going all the way
[38:48] giving all the going going all the way from simulation to verification to dummy
[38:50] from simulation to verification to dummy fill for planerization verification
[38:54] fill for planerization verification whether it's layout versus schematic
[38:56] whether it's layout versus schematic modeling of parasitics
[38:58] modeling of parasitics um IRM
[39:01] um IRM um you know IR drops electromagnetic
[39:03] um you know IR drops electromagnetic checks I talked about aging models so a
[39:07] checks I talked about aging models so a full suite of capabilities
[39:09] full suite of capabilities cannot be done by us alone we rely and
[39:11] cannot be done by us alone we rely and our EDA partners uh they they do an
[39:15] our EDA partners uh they they do an amazing job uh in helping us uh getting
[39:17] amazing job uh in helping us uh getting you know full solutions to our
[39:19] you know full solutions to our customers.
[39:23] Not only EDA partners, we must work with
[39:25] Not only EDA partners, we must work with IP providers. Uh you know IP providers
[39:28] IP providers. Uh you know IP providers provide siliconverified
[39:31] provide siliconverified uh capabilities at the block level.
[39:33] uh capabilities at the block level. Again they're not typically not doing
[39:35] Again they're not typically not doing products. They build uh uh IP blocks
[39:39] products. They build uh uh IP blocks that are pre-caracterized with models uh
[39:42] that are pre-caracterized with models uh that uh basically the the idea is they
[39:45] that uh basically the the idea is they bring skill and time to market uh to to
[39:48] bring skill and time to market uh to to to product product design teams who may
[39:51] to product product design teams who may not either have the skill to do certain
[39:53] not either have the skill to do certain blocks or it'll take them too long to
[39:55] blocks or it'll take them too long to develop it themselves. So again, this is
[39:57] develop it themselves. So again, this is the who's who of uh IP providers in in
[40:00] the who's who of uh IP providers in in the semiconductor industry that
[40:02] the semiconductor industry that specialty foundaries such as Tower must
[40:04] specialty foundaries such as Tower must partner with uh to help our product
[40:07] partner with uh to help our product designers, our customers.
[40:12] I talked about customized technologies,
[40:14] I talked about customized technologies, customized flows. Another area where
[40:17] customized flows. Another area where specialty foundaries excel should excel
[40:19] specialty foundaries excel should excel at and we believe as Tower we do excel
[40:22] at and we believe as Tower we do excel at is customized support. So we start
[40:24] at is customized support. So we start off we have an amazing 247 portal. You
[40:27] off we have an amazing 247 portal. You can put in help tickets. Uh you I'm just
[40:30] can put in help tickets. Uh you I'm just showing a snapshot here. Uh you can
[40:32] showing a snapshot here. Uh you can check your wafer in process you know
[40:35] check your wafer in process you know where it is logistics tracking
[40:37] where it is logistics tracking businessto business self service
[40:38] businessto business self service quality. You can download all sorts of
[40:41] quality. You can download all sorts of files from our file exchange and this
[40:43] files from our file exchange and this feeds our customers worldwide. And then
[40:46] feeds our customers worldwide. And then based on geography we have design
[40:49] based on geography we have design support engineers
[40:50] support engineers uh that support our customers. So as as
[40:53] uh that support our customers. So as as you're starting a new project uh you
[40:56] you're starting a new project uh you know you're evaluating it you know some
[40:58] know you're evaluating it you know some of our field application engineers will
[41:00] of our field application engineers will help you identify the process technology
[41:02] help you identify the process technology and flow that's most relevant.
[41:04] and flow that's most relevant. uh in the design phase our DSC's design
[41:07] uh in the design phase our DSC's design support engineers uh these are guys and
[41:10] support engineers uh these are guys and ladies who are very good at uh uh at
[41:13] ladies who are very good at uh uh at using our PDKs understand our technology
[41:15] using our PDKs understand our technology so they kind of handholder you uh you
[41:18] so they kind of handholder you uh you put in a ticket in it'll go to one of
[41:20] put in a ticket in it'll go to one of them they'll respond either through a
[41:22] them they'll respond either through a ticket or email or they'll respond by
[41:24] ticket or email or they'll respond by setting up a uh you know a zoom or a
[41:27] setting up a uh you know a zoom or a team call with you get you through a
[41:29] team call with you get you through a mock tape out make sure the tape out u
[41:32] mock tape out make sure the tape out u you know surprises get you through a
[41:34] you know surprises get you through a tape out before it goes to our factory
[41:36] tape out before it goes to our factory to be made and then a logistics team
[41:38] to be made and then a logistics team takes over at that point. So we've got a
[41:40] takes over at that point. So we've got a whole support ecosystem set up uh to
[41:43] whole support ecosystem set up uh to help our customers handhold them when
[41:46] help our customers handhold them when they need it, leave them alone when they
[41:47] they need it, leave them alone when they don't want to hear from us and get them
[41:49] don't want to hear from us and get them to the goal is to get them to tape out
[41:51] to the goal is to get them to tape out and first time success when the silicon
[41:53] and first time success when the silicon comes back it's working as expected.
[41:59] Finally, I'd like to summarize my talk.
[42:02] Finally, I'd like to summarize my talk. Uh tagline as I said providing analog
[42:05] Uh tagline as I said providing analog technologies to better our world. Uh
[42:08] technologies to better our world. Uh analog scaling at mature nodes is our
[42:11] analog scaling at mature nodes is our mantra. Uh high performance tailored
[42:14] mantra. Uh high performance tailored technologies enabling a greener more
[42:16] technologies enabling a greener more connected world. Uh the end goal from
[42:20] connected world. Uh the end goal from our products that we our our customers
[42:23] our products that we our our customers deliver optimized products faster
[42:25] deliver optimized products faster delivery powered by design enablement
[42:27] delivery powered by design enablement and personalized design support.
[42:31] and personalized design support. Thank you very much. That's the end of
[42:32] Thank you very much. That's the end of my talk. I think we can open it up for
[42:35] my talk. I think we can open it up for questions if there are any.
[42:37] questions if there are any. >> Thank you Samir. It was a great uh
[42:39] >> Thank you Samir. It was a great uh overview presentation and also you went
[42:42] overview presentation and also you went into the depth as well. Thank you. Uh
[42:44] into the depth as well. Thank you. Uh questions for Samir.
[42:50] George uh may have a question. I guess
[42:54] George uh may have a question. I guess I do have some questions. I'm writing
[42:55] I do have some questions. I'm writing them up now. I'm writing another one.
[42:57] them up now. I'm writing another one. Please. Yeah, please go ahead.
[43:04] Did you say you have a question or you
[43:06] Did you say you have a question or you don't have a question?
[43:10] >> I have one already posted. I'm writing
[43:12] >> I have one already posted. I'm writing another one.
[43:17] >> So, uh Sam George's question is uh thank
[43:20] >> So, uh Sam George's question is uh thank you for your comments about different
[43:21] you for your comments about different requirements for the mobile AI data
[43:23] requirements for the mobile AI data center and automotive. Intel keeps
[43:25] center and automotive. Intel keeps saying keep stocking all fabs in
[43:30] saying keep stocking all fabs in oho Ohio maybe but these fabs are so
[43:33] oho Ohio maybe but these fabs are so expensive and trying to do combo once uh
[43:36] expensive and trying to do combo once uh brings high risk management issues
[43:38] brings high risk management issues what's the best way forward foundry
[43:39] what's the best way forward foundry leadership
[43:41] leadership that's the question from George
[43:44] that's the question from George >> okay not not sure I I think I get the
[43:46] >> okay not not sure I I think I get the gist of it not sure I fully understand
[43:48] gist of it not sure I fully understand the the question but I think yes so Uh
[43:54] the the question but I think yes so Uh yeah, I think I think where Intel is is
[43:57] yeah, I think I think where Intel is is you know investing it is in advanced
[43:59] you know investing it is in advanced very advanced digital more like a
[44:00] very advanced digital more like a digital foundry as in my initial slide
[44:03] digital foundry as in my initial slide and those are extremely expensive fabs
[44:06] and those are extremely expensive fabs and you need high volume very high
[44:08] and you need high volume very high volume and uh of the of you know digital
[44:12] volume and uh of the of you know digital chips to to really justify that. I think
[44:14] chips to to really justify that. I think where this I can speak to where the
[44:16] where this I can speak to where the specialty foundaries are. You know, we
[44:18] specialty foundaries are. You know, we also have high capex requirements. You
[44:20] also have high capex requirements. You know, fabs are not cheap uh uh uh no
[44:24] know, fabs are not cheap uh uh uh no matter what, but building a fab at 65 45
[44:28] matter what, but building a fab at 65 45 nanometer is a lot cheaper than doing a
[44:30] nanometer is a lot cheaper than doing a 2 nanometer or Intel's like 18A is
[44:33] 2 nanometer or Intel's like 18A is orders of magnitude uh different in
[44:35] orders of magnitude uh different in terms of costs. And I think the the the
[44:38] terms of costs. And I think the the the way that specialty foundaries are
[44:40] way that specialty foundaries are approaching it is they're trying to
[44:42] approaching it is they're trying to utilize uh uh existing fabs, retooling
[44:46] utilize uh uh existing fabs, retooling them as much as possible uh and uh
[44:50] them as much as possible uh and uh trying to get the most out of you know
[44:52] trying to get the most out of you know depreciated
[44:54] depreciated equipment but then very surgically very
[44:57] equipment but then very surgically very smartly investing in new uh clean rooms
[45:00] smartly investing in new uh clean rooms and new tools when it's an absolute
[45:03] and new tools when it's an absolute requirement at that point to do it. So,
[45:05] requirement at that point to do it. So, it's a balance between uh what you can,
[45:08] it's a balance between uh what you can, you know, what you must uh uh invest in
[45:11] you know, what you must uh uh invest in to get new capabilities versus what you
[45:14] to get new capabilities versus what you can squeeze out. And I'd say that the
[45:15] can squeeze out. And I'd say that the specialty foundaries have become really
[45:17] specialty foundaries have become really good at squeezing most out of existing
[45:20] good at squeezing most out of existing capabilities rather than having to spend
[45:22] capabilities rather than having to spend a lot more on newer fabs. In fact, the
[45:24] a lot more on newer fabs. In fact, the fab that I work at is is uh from the 90s
[45:28] fab that I work at is is uh from the 90s or 80s. In fact, it was an old Rockwell
[45:30] or 80s. In fact, it was an old Rockwell uh fab. uh you know it's it's right
[45:33] uh fab. uh you know it's it's right behind me from my office and it's it's
[45:36] behind me from my office and it's it's mostly a depreciated fab but it's
[45:39] mostly a depreciated fab but it's feeding a lot of the silicon photonics
[45:40] feeding a lot of the silicon photonics technologies that I I showed you earlier
[45:42] technologies that I I showed you earlier today.
[45:45] today. Thanks Samir. You want to ask the second
[45:47] Thanks Samir. You want to ask the second question George?
[45:52] Okay. Uh George has written it here. So
[45:57] Okay. Uh George has written it here. So the second question from George is the
[45:59] the second question from George is the PDK this feels like a Windows print
[46:02] PDK this feels like a Windows print driver. For years everyone wrote their
[46:05] driver. For years everyone wrote their own drivers. Now we have a universal
[46:08] own drivers. Now we have a universal driver and now printers are are adapted
[46:11] driver and now printers are are adapted to the driver. When will this happen for
[46:13] to the driver. When will this happen for the foundaries? Is there a group leading
[46:15] the foundaries? Is there a group leading this in regards to Intel versus TSMC?
[46:17] this in regards to Intel versus TSMC? Seammens mentioned that Intel was too
[46:19] Seammens mentioned that Intel was too far behind.
[46:23] uh
[46:25] uh you know not not sure again I understand
[46:27] you know not not sure again I understand the question the the drivers I think
[46:31] the question the the drivers I think those are more digital uh uh type of
[46:34] those are more digital uh uh type of questions maybe not directly applicable
[46:36] questions maybe not directly applicable to specialty foundaries
[46:39] to specialty foundaries u not sure if I have anything to add
[46:41] u not sure if I have anything to add there
[46:42] there >> yeah this is any question to Intel of
[46:44] >> yeah this is any question to Intel of TSMC I would say
[46:45] TSMC I would say >> yeah probably
[46:46] >> yeah probably >> or maybe to CM Seammens yeah
[46:48] >> or maybe to CM Seammens yeah >> David Chow from HRL has a question about
[46:52] >> David Chow from HRL has a question about MP PW runs. Uh he's asking if Tower
[46:55] MP PW runs. Uh he's asking if Tower offers MPW runs and in which
[46:56] offers MPW runs and in which technologies.
[46:58] technologies. >> Absolutely. Uh I didn't mention that but
[47:00] >> Absolutely. Uh I didn't mention that but multiro wafer runs are available through
[47:03] multiro wafer runs are available through tower. You can uh go to our external
[47:05] tower. You can uh go to our external website towerssemi.com under
[47:07] website towerssemi.com under manufacturing you'll see multiro runs.
[47:10] manufacturing you'll see multiro runs. You can download the whole schedule. We
[47:11] You can download the whole schedule. We offer uh multiro in almost all our
[47:14] offer uh multiro in almost all our special technology in silicon fatonics.
[47:16] special technology in silicon fatonics. We offer it in silicon geranium. We
[47:18] We offer it in silicon geranium. We offer it in BCD uh technologies. We
[47:22] offer it in BCD uh technologies. We offer it in RFSOI. So all almost all the
[47:24] offer it in RFSOI. So all almost all the flows that I showed you have an option
[47:27] flows that I showed you have an option to use a multi-lo project paper run.
[47:31] to use a multi-lo project paper run. >> Thank you Samir. We have a question from
[47:34] >> Thank you Samir. We have a question from uh Adilson Ardoso and his question is
[47:38] uh Adilson Ardoso and his question is about he gives you compliment some
[47:40] about he gives you compliment some excellent presentation. Could you
[47:41] excellent presentation. Could you briefly discuss the core packaging
[47:43] briefly discuss the core packaging approaches and share what TE's road map
[47:45] approaches and share what TE's road map looks like for delivering a more
[47:47] looks like for delivering a more complete solution to the challenges of
[47:49] complete solution to the challenges of silicon photonics packaging to your
[47:51] silicon photonics packaging to your customer?
[47:52] customer? >> Yeah, I can probably go back to that
[47:54] >> Yeah, I can probably go back to that slide. Uh uh
[47:58] slide. Uh uh uh sorry it's taking so long. Yeah,
[48:00] uh sorry it's taking so long. Yeah, right here. So uh what we think will
[48:04] right here. So uh what we think will happen first is
[48:06] happen first is uh is that before co- package optics
[48:09] uh is that before co- package optics you'll have something called nare
[48:10] you'll have something called nare package optics. So but in any case if
[48:12] package optics. So but in any case if you look at like you know one of there's
[48:15] you look at like you know one of there's many ways to do co-ackage optics one of
[48:17] many ways to do co-ackage optics one of the ways we are looking at is is uh
[48:20] the ways we are looking at is is uh where you know the idea of copackage
[48:21] where you know the idea of copackage optics is that you're bringing the
[48:24] optics is that you're bringing the optical signal closer and closer to the
[48:26] optical signal closer and closer to the GPU or the high bandwidth memory uh
[48:29] GPU or the high bandwidth memory uh switch that you might have. So whatever
[48:31] switch that you might have. So whatever the digital chip is, you're trying to
[48:32] the digital chip is, you're trying to bring the optical signal as close as
[48:34] bring the optical signal as close as possible so that the loss associated
[48:37] possible so that the loss associated with the electrical signal is minimized
[48:39] with the electrical signal is minimized by physically reducing the distance
[48:41] by physically reducing the distance between uh the uh optical signal and the
[48:44] between uh the uh optical signal and the and the digital chip. And one way to do
[48:47] and the digital chip. And one way to do that is like what what is shown out here
[48:49] that is like what what is shown out here where the the pick and the uh EIC are
[48:54] where the the pick and the uh EIC are are uh co you know essentially
[48:55] are uh co you know essentially co-ackaged together through w a wafer
[48:58] co-ackaged together through w a wafer bonding technique and then put on an
[49:00] bonding technique and then put on an interposer
[49:02] interposer uh directly. So the advantage of doing
[49:03] uh directly. So the advantage of doing this is that the fiber optic c
[49:06] this is that the fiber optic c connection is directly coming onto this
[49:09] connection is directly coming onto this to this pick without having to go
[49:11] to this pick without having to go through a pluggable uh module by itself.
[49:13] through a pluggable uh module by itself. So essentially a mini module is created
[49:15] So essentially a mini module is created next to the GPU. Then this mini module
[49:18] next to the GPU. Then this mini module sits on top of an interposer and then
[49:20] sits on top of an interposer and then this is carrying the RF or the
[49:22] this is carrying the RF or the electrical signal uh you know cutting
[49:26] electrical signal uh you know cutting cutting it down from like uh hundreds of
[49:28] cutting it down from like uh hundreds of centimeters down to millimeters. So I I
[49:32] centimeters down to millimeters. So I I I believe the the specialty foundry the
[49:34] I believe the the specialty foundry the role it's going to play is the ability
[49:37] role it's going to play is the ability to you know bring as much integration of
[49:40] to you know bring as much integration of as many of those analog functions into a
[49:43] as many of those analog functions into a single package uh to our customers uh as
[49:46] single package uh to our customers uh as quickly as possible.
[49:49] quickly as possible. Thanks air. I have a related question
[49:51] Thanks air. I have a related question but on silicon photonics you know there
[49:53] but on silicon photonics you know there has been a few inquiries about phase
[49:56] has been a few inquiries about phase change memory integration onto the
[49:58] change memory integration onto the photonics I mean just for memory
[50:00] photonics I mean just for memory integration and I know tower has
[50:03] integration and I know tower has independent phase change electrical
[50:05] independent phase change electrical memory out there uh for for some
[50:08] memory out there uh for for some electronic application in the back end
[50:09] electronic application in the back end of client. So I was wondering if you
[50:11] of client. So I was wondering if you have any plans or if it is possible to
[50:13] have any plans or if it is possible to integrate phase change with the
[50:15] integrate phase change with the photonics. Uh maybe it is a maybe as a
[50:18] photonics. Uh maybe it is a maybe as a package optics or then it is probably
[50:21] package optics or then it is probably different. Yeah.
[50:22] different. Yeah. >> Yeah. Yeah.
[50:22] >> Yeah. Yeah. >> Or as an integrated optics platform.
[50:25] >> Or as an integrated optics platform. >> So to answer your question, we don't
[50:27] >> So to answer your question, we don't have it on our road map today, but uh
[50:31] have it on our road map today, but uh our our phase chain material that you
[50:33] our our phase chain material that you referred to is very modular. It can be
[50:35] referred to is very modular. It can be put into almost any back end. And to
[50:38] put into almost any back end. And to your point, one of the things that
[50:39] your point, one of the things that specialty foundaries such as Tower must
[50:42] specialty foundaries such as Tower must do is as these applications such as the
[50:44] do is as these applications such as the one you uh alluded to, uh we respond
[50:48] one you uh alluded to, uh we respond very quickly uh that okay, there is a
[50:51] very quickly uh that okay, there is a business case to do that, there's a
[50:52] business case to do that, there's a customer interested uh in doing it and
[50:56] customer interested uh in doing it and literally there have been cases where we
[50:58] literally there have been cases where we have put together flows in in a matter
[51:00] have put together flows in in a matter of months for customers to prototype it
[51:03] of months for customers to prototype it uh and see the and evaluate the
[51:05] uh and see the and evaluate the feasibility of it. uh but to answer your
[51:07] feasibility of it. uh but to answer your question today it doesn't exist but we
[51:09] question today it doesn't exist but we have the capabilities to put it
[51:11] have the capabilities to put it together.
[51:12] together. >> Okay. Thank you. And I have another
[51:14] >> Okay. Thank you. And I have another maybe a little bit detailed question
[51:17] maybe a little bit detailed question which is uh you show the you show the uh
[51:22] which is uh you show the you show the uh the the the frequency of the uh R of SIG
[51:27] the the the frequency of the uh R of SIG SMOS by SMOS or SMOS
[51:30] SMOS by SMOS or SMOS >> uh at about 400 GHz and I was wondering
[51:33] >> uh at about 400 GHz and I was wondering how much is your speed when it is
[51:35] how much is your speed when it is integrated with the photonics
[51:39] >> yeah it's it's it's a good very good
[51:41] >> yeah it's it's it's a good very good point I think so traditionally we have
[51:44] point I think so traditionally we have uh you know our approach has been not to
[51:47] uh you know our approach has been not to bring the two together so keep them in
[51:49] bring the two together so keep them in two different uh dies and that's where
[51:51] two different uh dies and that's where exactly where our wafer bonding
[51:53] exactly where our wafer bonding co-ackage optics slide showed. So to
[51:56] co-ackage optics slide showed. So to answer your question, if you use our
[51:57] answer your question, if you use our wafer bonding technique in that co c co-
[51:59] wafer bonding technique in that co c co- package optics slide, there's no loss.
[52:02] package optics slide, there's no loss. You you basically get the best of breed
[52:04] You you basically get the best of breed of the of the uh chip while almost u not
[52:09] of the of the uh chip while almost u not having any interaction or any any
[52:12] having any interaction or any any degradation in performance just because
[52:14] degradation in performance just because you've added the photonix chip onto it.
[52:16] you've added the photonix chip onto it. It's almost like instead of having it on
[52:18] It's almost like instead of having it on a board uh and and working veto breed,
[52:20] a board uh and and working veto breed, we've kind of flipped and put it
[52:22] we've kind of flipped and put it together in the same package.
[52:24] together in the same package. But you do have limitation from the
[52:26] But you do have limitation from the photonics, right? The speed the photonic
[52:28] photonics, right? The speed the photonic components like the detector has a
[52:30] components like the detector has a limited speed or
[52:31] limited speed or >> Yes. So in the end, yeah, there's no
[52:33] >> Yes. So in the end, yeah, there's no loss in capabilities because you're
[52:35] loss in capabilities because you're putting them together, but you're
[52:37] putting them together, but you're limited by the intrinsic uh speed
[52:39] limited by the intrinsic uh speed capabilities of of the pick and the and
[52:42] capabilities of of the pick and the and the EIC devices. Yes. Uh oh, I so Okay,
[52:45] the EIC devices. Yes. Uh oh, I so Okay, maybe I think I I get your question uh
[52:48] maybe I think I I get your question uh better now. So in you're absolutely
[52:51] better now. So in you're absolutely right. You can have the transistor
[52:52] right. You can have the transistor operate at a very fast speed, but your
[52:55] operate at a very fast speed, but your pick devices may not have the bandwidth
[52:58] pick devices may not have the bandwidth or vice versa, right? Uh so you're
[53:00] or vice versa, right? Uh so you're limited by the weakest element in the
[53:02] limited by the weakest element in the chain. Uh so you're absolutely right.
[53:04] chain. Uh so you're absolutely right. the bandwidth of siliconbased you know
[53:06] the bandwidth of siliconbased you know silicon photonix based uh modulators
[53:10] silicon photonix based uh modulators and and photo detectors can be limited
[53:13] and and photo detectors can be limited which is exactly why we have uh uh have
[53:18] which is exactly why we have uh uh have capabilities where we've added uniquely
[53:21] capabilities where we've added uniquely added 35 capabilities
[53:23] added 35 capabilities uh onto silicon. So when our customers
[53:25] uh onto silicon. So when our customers get this technology for in it it just
[53:28] get this technology for in it it just looks like it's coming out of a silicon
[53:30] looks like it's coming out of a silicon foundry. We've just taken 35 app and
[53:33] foundry. We've just taken 35 app and added into uh our as chiplets onto our
[53:36] added into uh our as chiplets onto our silicon uh wafer. So
[53:39] silicon uh wafer. So >> yeah.
[53:40] >> yeah. >> So it's it's a it's a very unique
[53:42] >> So it's it's a it's a very unique capability where we're bringing three
[53:43] capability where we're bringing three five capabilities into a silicon fab.
[53:46] five capabilities into a silicon fab. >> This is very unique capability. And
[53:48] >> This is very unique capability. And what's the speed here for the uh
[53:50] what's the speed here for the uh modulator or the detector from the
[53:52] modulator or the detector from the Indian phosphoid?
[53:53] Indian phosphoid? >> So we are we've demonstrated uh this
[53:55] >> So we are we've demonstrated uh this this line 400 gig per lane uh through
[53:58] this line 400 gig per lane uh through open light. Wow.
[54:00] open light. Wow. >> At the recent OFC. Oh,
[54:02] >> At the recent OFC. Oh, >> okay.
[54:04] >> okay. Uh there is a question from D. Uh he's
[54:07] Uh there is a question from D. Uh he's asking about he's u he's complimenting
[54:10] asking about he's u he's complimenting the presentation. Uh two questions is
[54:12] the presentation. Uh two questions is asking what tools or methods do you use
[54:15] asking what tools or methods do you use to determine the values in your PDKs
[54:18] to determine the values in your PDKs since you highlighted the importance of
[54:20] since you highlighted the importance of accuracy?
[54:23] >> Yeah.
[54:24] >> Yeah. >> Yeah. So on our PDKs, we almost
[54:27] >> Yeah. So on our PDKs, we almost exclusively
[54:29] exclusively try to be silicon based and so we we we
[54:34] try to be silicon based and so we we we almost will not use TCAD unless it's
[54:36] almost will not use TCAD unless it's like for a feasibility analysis or
[54:38] like for a feasibility analysis or something. So we have very intelligent
[54:40] something. So we have very intelligent uh test structure designed techniques uh
[54:44] uh test structure designed techniques uh and uh uh to to to make them very
[54:47] and uh uh to to to make them very silicon accurate uh PDKs.
[54:51] silicon accurate uh PDKs. uh uh beyond that I think uh uh oh okay
[54:55] uh uh beyond that I think uh uh oh okay I think the one other thing that we do
[54:57] I think the one other thing that we do as I said is in many cases we verify the
[55:00] as I said is in many cases we verify the accuracy of the PDK at the at the chip
[55:02] accuracy of the PDK at the at the chip level so not just at the transistor
[55:05] level so not just at the transistor level but we make sure that our PDKs and
[55:07] level but we make sure that our PDKs and models are accurate when it's combined
[55:09] models are accurate when it's combined into a big circuit uh and that's what I
[55:12] into a big circuit uh and that's what I talked about the reference flows that we
[55:14] talked about the reference flows that we provide they come with uh both measured
[55:16] provide they come with uh both measured and simulated data to to to give
[55:18] and simulated data to to to give confidence in the accuracy of the PDK
[55:21] confidence in the accuracy of the PDK Yes. And Dale has a Thank you, Sam. Dale
[55:24] Yes. And Dale has a Thank you, Sam. Dale has a followup, another question which
[55:26] has a followup, another question which is a generic question about energy
[55:28] is a generic question about energy efficiency and he's asking where are we
[55:30] efficiency and he's asking where are we now? Where versus where versus where
[55:31] versus where versus where versus where versus where versus where versus where
[55:31] versus where versus where versus where we ought to be or where we needs to be.
[55:35] we ought to be or where we needs to be. >> Okay. So there's there's I guess two
[55:37] >> Okay. So there's there's I guess two components to this if I you know if I
[55:41] components to this if I you know if I get the question correctly is is in
[55:43] get the question correctly is is in terms of energy efficiency. I talked
[55:45] terms of energy efficiency. I talked about all the technology capabilities
[55:46] about all the technology capabilities like low onresistance, low uh off
[55:50] like low onresistance, low uh off capacitance, low QG, all these things
[55:52] capacitance, low QG, all these things that make our chips more energy
[55:54] that make our chips more energy efficient when they go into the end
[55:55] efficient when they go into the end products. And then in our factories, we
[55:58] products. And then in our factories, we have a lot of, you know, a lot of
[56:00] have a lot of, you know, a lot of capabilities to make our factories
[56:02] capabilities to make our factories itself
[56:03] itself uh energy efficient. Uh I don't have the
[56:06] uh energy efficient. Uh I don't have the details off the top of my head, but if
[56:08] details off the top of my head, but if you go to our website, I think we have,
[56:10] you go to our website, I think we have, you know, listed uh things that we do.
[56:14] you know, listed uh things that we do. uh in in terms of making our factories
[56:16] uh in in terms of making our factories themselves more energy efficient.
[56:19] themselves more energy efficient. >> Thank you Samir. Uh I hope is there any
[56:22] >> Thank you Samir. Uh I hope is there any more questions from the audience?
[56:25] more questions from the audience? >> Okay and thank you Samir. Uh it was a
[56:29] >> Okay and thank you Samir. Uh it was a great presentation and thank you for
[56:31] great presentation and thank you for your time. Uh,
[56:32] your time. Uh, >> my pleasure.
[56:34] >> my pleasure. >> And Amy, could you please upload the
[56:37] >> And Amy, could you please upload the next week's uh
[56:40] next week's uh slides?
[56:49] Okay, great. So, our next week's
[56:52] Okay, great. So, our next week's presentation
[56:54] presentation uh
[56:59] Yeah. Oh, next week we don't have a
[57:01] Yeah. Oh, next week we don't have a presentation. It's the Memorial Day
[57:03] presentation. It's the Memorial Day weekend. So, so we don't have But
[57:05] weekend. So, so we don't have But following that on May 29, we have a
[57:07] following that on May 29, we have a presentation from MIT Lincoln Lab. Uh
[57:10] presentation from MIT Lincoln Lab. Uh Paul Juds will be giving the talk on May
[57:14] Paul Juds will be giving the talk on May 29.
[57:17] 29. Thank you.

https://www.youtube.com/watch?v=dIPW48qdycw

Summary

TL;DR — Specialty foundries, distinct from digital foundries, focus on analog, RF, and photonics innovation, enabling breakthroughs in areas like data centers, AI, and connectivity. They offer a blend of the customization of traditional IDMs and the scalability of modern pure-play foundries, with strong emphasis on design enablement to make these advanced technologies practical and accessible.

Key points

• Specialty foundries complement digital foundries by focusing on niche technologies like silicon photonics, silicon germanium, and BCD, which are crucial for high-speed data transfer, AI infrastructure, and power efficiency.

• Design enablement, including accurate PDKs, SPICE models, EM simulation stackups, and reference flows, is critical for ensuring first-time success and making these specialized technologies usable.

• Tower Semiconductor, as an example, offers a global footprint and diverse technology platforms, including silicon photonics for optical interconnects and sensors, and advanced BCD for power management.

• The integration of analog and digital functions, along with advanced packaging techniques like wafer bonding, is enabling higher performance and miniaturization for complex systems.

• Customization is a core strength of specialty foundries, allowing them to tailor technologies and provide personalized support to meet specific application needs, from AI and data centers to automotive and consumer electronics.

Takeaway — Specialty foundries are essential enablers of modern technological advancements by providing tailored, high-performance analog and photonic solutions, backed by robust design enablement and support.