Silicon Photonics Co-Packaging Webcast with IBM and GLOBALFOUNDRIES

Full Transcript

https://www.youtube.com/watch?v=Um9oa6DPq1M

[00:19] let me go ahead and introduce jim.
[00:21] let me go ahead and introduce jim carroll.
[00:21] carroll he's editor of optical networks daily.
[00:23] he's editor of optical networks daily covering next generation networks with a focus on optical silicon and software.
[00:29] focus on optical silicon and software he's also the editor and founder of coverage.
[00:31] he's also the editor and founder of coverage.
[00:32] coverage network digest jim.
[00:35] network digest jim hi everybody and welcome to our webinar.
[00:37] hi everybody and welcome to our webinar on silicon photonics co-packaging with ibm canada and global foundries.
[00:40] on silicon photonics co-packaging with ibm canada and global foundries.
[00:43] ibm canada and global foundries this is actually the second in a series.
[00:45] this is actually the second in a series of webinars that's sponsored by dupont silicon valley technology center.
[00:47] of webinars that's sponsored by dupont silicon valley technology center.
[00:50] dupont silicon valley technology center and the consortium for onboard optics or kobo.
[00:52] and the consortium for onboard optics or kobo.
[00:53] kobo we're having about one webinar per month.
[00:55] we're having about one webinar per month our information on our october webinar will be posted shortly.
[00:58] our information on our october webinar will be posted shortly.
[01:00] will be posted shortly.
[01:02] So our guests today are Alexander Yanta Polzinski.
[01:06] Who is a senior engineer at IBM Canada.
[01:10] And Vikas Gupta, Director of Product Management at Global Foundries.
[01:13] So with that, let's get underway, Alex.
[01:18] Thank you, Jim. Hello everyone. Thank you for joining us today.
[01:23] So I'm Alexander from IBM Canada.
[01:25] And today we will discuss about efficient manufacturing of photonic and electronic and co-packages.
[01:30] So I would like to thank you, Jim and Melissa for organizing this event.
[01:35] And Depot First Dupont for sponsoring it.
[01:38] So first, who we are? We are IBM Roma.
[01:41] We are the largest North American based semiconductor assembly and test.
[01:46] We have over 850,000 square feet of manufacturing floor.
[01:50] We specialize in advanced packaging, mostly doing flip chip and photonics.
[01:55] We can assemble any wafer source.
[01:57] We're master of complexity.
[01:59] We also have outstanding.
[02:01] we also have outstanding characterization capabilities.
[02:03] we have a characterization capabilities.
[02:03] we have a world-class fa lab and we of course can help and design for manufacturing and better time to come market.
[02:11] and to do so we also have a development dedicated facility where we can develop our new processes and your new product into production.
[02:17] and when they're ready we can mimic and copy those line and process to the main main floor.
[02:24] main production floor for rapid scale up.
[02:28] so the kind of industry for one third of a production is for ibm products and crown gel but we also have two further for projections for more oem business uh that goes in high preference calculation data centers uh telecom.
[02:41] so for example uh we build mainframes uh we build uh antennas phasor antenna for the 5gs and antenna controllers transceiver all the components for high preference computers.
[02:54] so we can be involved in that so this is kind of a projects we might feature if you look at
[03:01] projects we might feature if you look at advanced packaging that's behind those.
[03:03] advanced packaging that's behind those kind of projects for.
[03:05] kind of projects for for at the top left you have this large.
[03:07] for at the top left you have this large single chip module.
[03:09] single chip module this is a 23 by 28 millimeter chips with.
[03:12] this is a 23 by 28 millimeter chips with over 20 000.
[03:14] over 20 000 c4 connection on the laminate and then.
[03:16] c4 connection on the laminate and then we can go to higher complexity where.
[03:17] we can go to higher complexity where military chips and hitterish.
[03:19] military chips and hitterish integration and system and package can.
[03:21] integration and system and package can be done.
[03:22] be done we also do custom design uh we also have.
[03:25] we also do custom design uh we also have coreless where you remove the core in.
[03:27] coreless where you remove the core in the pth so it has better costs and.
[03:29] the pth so it has better costs and electrical.
[03:30] electrical advantages and of course we do chip.
[03:32] advantages and of course we do chip scale package 2.1 2.3 2.5 d.
[03:36] scale package 2.1 2.3 2.5 d 3d packaging and photonics and today we.
[03:39] 3d packaging and photonics and today we will discuss.
[03:40] will discuss how to include those photonics close to.
[03:43] how to include those photonics close to asic.
[03:43] asic or logic chip electrical chips and what.
[03:46] or logic chip electrical chips and what is the best way to to manufacture those.
[03:50] is the best way to to manufacture those so here's some photonic packaging.
[03:52] so here's some photonic packaging demonstrator that we have.
[03:53] demonstrator that we have built in the last years so first we have.
[03:56] built in the last years so first we have this high fiber count application that.
[03:57] this high fiber count application that you can see on the top left.
[03:59] you can see on the top left so this is a large asic chips where nine.
[04:02] so this is a large asic chips where nine uh silicon photonic.
[04:04] uh silicon photonic loopback chips were placed and the main.
[04:07] loopback chips were placed and the main goal of this.
[04:07] goal of this test vehicle was to monitor if the.
[04:11] test vehicle was to monitor if the silicon photonic chips and the optical.
[04:13] silicon photonic chips and the optical interconnects were able.
[04:15] interconnects were able to withstand the downstream process to.
[04:17] to withstand the downstream process to completing the module assembly.
[04:19] completing the module assembly then at the middle of top you have this.
[04:21] then at the middle of top you have this higher density.
[04:22] higher density optical package where we use our polymer.
[04:25] optical package where we use our polymer interconnect technology.
[04:27] interconnect technology so i have highlighted it with some.
[04:28] so i have highlighted it with some colors here to to.
[04:30] colors here to to show the the polymer to photonic chip.
[04:34] show the the polymer to photonic chip arabic coupling area and also where the.
[04:36] arabic coupling area and also where the polymer lies.
[04:37] polymer lies inside the pharaoh and how it's made to.
[04:39] inside the pharaoh and how it's made to the system furl.
[04:41] the system furl we also have this integrated connector.
[04:43] we also have this integrated connector so here you have a top view where a.
[04:44] so here you have a top view where a metallic.
[04:45] metallic spring clip will make the two empty.
[04:47] spring clip will make the two empty variable with the.
[04:48] variable with the correct load force at the bottom.
[04:52] correct load force at the bottom left you have a solder reformable second.
[04:54] left you have a solder reformable second i.
[04:55] i fiber assembly you have a better view.
[04:58] fiber assembly you have a better view here of how.
[04:59] here of how it's made and with the strain relief of.
[05:02] it's made and with the strain relief of the pigtail.
[05:03] the pigtail and of course the full optical switch.
[05:06] and of course the full optical switch demonstrator that we have.
[05:07] demonstrator that we have uploaded this year so our vision for.
[05:10] uploaded this year so our vision for silicon photonic packaging.
[05:12] silicon photonic packaging is is to get away from this active.
[05:14] is is to get away from this active alignment one connection at a time of.
[05:16] alignment one connection at a time of custom design.
[05:17] custom design and do something that is more scalable.
[05:20] and do something that is more scalable and it.
[05:21] and it can lower the packaging cost because as.
[05:23] can lower the packaging cost because as you know integrated.
[05:24] you know integrated photonics the packaging and the tests.
[05:27] photonics the packaging and the tests dominate the cost structure.
[05:29] dominate the cost structure and this is very difficult uh to.
[05:31] and this is very difficult uh to overcome because the component.
[05:32] overcome because the component and the alignment the title requirement.
[05:35] and the alignment the title requirement of single mode optics.
[05:36] of single mode optics make it very hard so our main vision is.
[05:38] make it very hard so our main vision is to automated.
[05:40] to automated and high high volume and using.
[05:41] and high high volume and using self-alignment and doing multiple.
[05:43] self-alignment and doing multiple connection.
[05:44] connection at a time with a standard design will.
[05:46] at a time with a standard design will leverage uh.
[05:47] leverage uh the scalability of the packaging and.
[05:50] the scalability of the packaging and this is leveraging the micro electronic.
[05:51] this is leveraging the micro electronic packaging infrastructure and know-how.
[05:53] packaging infrastructure and know-how so this is our vision our vision also.
[05:55] so this is our vision our vision also include a more.
[05:56] include a more collaborative or uh ecosystem.
[06:00] collaborative or uh ecosystem that brings all the everything to.
[06:03] that brings all the everything to align uh for the for success so i will.
[06:06] align uh for the for success so i will present.
[06:07] present very quickly uh some some of this north.
[06:10] very quickly uh some some of this north northeast micro corridor uh that can.
[06:13] northeast micro corridor uh that can uh benefit this industry and this is a.
[06:17] uh benefit this industry and this is a ecosystem enables uh research.
[06:19] ecosystem enables uh research development to full volume manufacturing.
[06:21] development to full volume manufacturing i also have to mention that we closely.
[06:23] i also have to mention that we closely work with.
[06:24] work with a lot of ibm research site and this.
[06:27] a lot of ibm research site and this makes my job really exciting because.
[06:29] makes my job really exciting because those research center developed those.
[06:32] those research center developed those new technology and typically we will.
[06:34] new technology and typically we will contribute on making them manufacturable.
[06:36] contribute on making them manufacturable so.
[06:37] so so this is very interesting to for us to.
[06:39] so this is very interesting to for us to be uh.
[06:40] be uh at the leading edge of the advanced.
[06:42] at the leading edge of the advanced technologies.
[06:43] technologies and make them manufacturable it's a.
[06:46] and make them manufacturable it's a really high privilege for us.
[06:48] really high privilege for us so i will just in the next few slides i.
[06:50] so i will just in the next few slides i will show some of the actors.
[06:52] will show some of the actors uh can be a good introduction to this.
[06:54] uh can be a good introduction to this technology of photonic packaging.
[06:56] technology of photonic packaging and i will explain a little more first.
[06:58] and i will explain a little more first there's the c2mi.
[06:59] there's the c2mi this is a center collaboration with ibm.
[07:01] this is a center collaboration with ibm is a founder with telandalsa.
[07:04] is a founder with telandalsa it's a incubator center when you can do.
[07:07] it's a incubator center when you can do a first level prototyping.
[07:10] a first level prototyping and uh uh it is really the development.
[07:14] and uh uh it is really the development center that we were presenting in the first slides.
[07:17] first slides so there you can do your prototypes or process development.
[07:21] process development and c2mi is a great infrastructure to to uh to do this integration.
[07:27] to uh to do this integration then also there's this integrator called cm semicore system.
[07:31] cm semicore system in canada they help in reducing the biotechnology adoption.
[07:34] biotechnology adoption so they can give you access to a state of art cad and design software.
[07:39] of art cad and design software they also give access to the fab with mpw run.
[07:42] mpw run into the labs they all have the building block for technology advancement so if you have any need you should contact them.
[07:49] them there's aim photonics that has a same thing for the us-based market.
[07:53] thing for the us-based market so again a photonics have a packaging technology in in their in the roadmap.
[07:59] roadmap we are part of ames as you can see uh ibm and ibm ams also give access to integrate photonic ecosystem with the all the.
[08:09] photonic ecosystem with the all the softwares and pick foundries.
[08:11] softwares and pick foundries and all this ecosystem is there to
[08:14] and all this ecosystem is there to enable
[08:14] enable your prototypes and there's a red carpet.
[08:18] your prototypes and there's a red carpet that's go from this prototype to this.
[08:21] that's go from this prototype to this manufa.
[08:22] manufa manufacturing volumes at ibm bromond.
[08:26] manufacturing volumes at ibm bromond so if you use our technology and process.
[08:29] so if you use our technology and process compatible technology.
[08:31] compatible technology you will be able to migrate on our floor.
[08:35] you will be able to migrate on our floor i also have to mention that we work.
[08:37] i also have to mention that we work closely with many universities and here.
[08:39] closely with many universities and here i will give you an example of the.
[08:41] i will give you an example of the industrial researcher that we have at.
[08:43] industrial researcher that we have at the university of sherwood.
[08:44] the university of sherwood this one is mostly focused on a high.
[08:46] this one is mostly focused on a high performance tourism integration.
[08:48] performance tourism integration and low temperature interconnect for.
[08:50] and low temperature interconnect for high density packaging and.
[08:51] high density packaging and advanced photonic packaging so and also.
[08:54] advanced photonic packaging so and also for.
[08:55] for a low temperature interconnect.
[08:59] a low temperature interconnect so now that we have closed this.
[09:01] so now that we have closed this ecosystem.
[09:02] ecosystem those are some entry points to to.
[09:06] those are some entry points to to to enable this ecosystem for peak design.
[09:09] to enable this ecosystem for peak design and pick fabrication and eventually to.
[09:11] and pick fabrication and eventually to manufacturing.
[09:12] manufacturing but when you think about advanced.
[09:14] but when you think about advanced integration and co-packaging you have.
[09:16] integration and co-packaging you have a lot a lot of things to consider and.
[09:18] a lot a lot of things to consider and you really need to have a design for.
[09:20] you really need to have a design for manufacturing and it's also a design for.
[09:22] manufacturing and it's also a design for test.
[09:23] test because having some design specific.
[09:24] because having some design specific tests and built-in self-tests is very.
[09:26] tests and built-in self-tests is very important.
[09:27] important so you have any aspect to consider.
[09:31] so you have any aspect to consider and of course you're going to do a lot.
[09:33] and of course you're going to do a lot of simulation and measurement.
[09:34] of simulation and measurement but uh one thing i want to emphasis is.
[09:37] but uh one thing i want to emphasis is that we have some predictive.
[09:38] that we have some predictive manufacturing we do modelings.
[09:40] manufacturing we do modelings we have this industry 4.0 that we.
[09:42] we have this industry 4.0 that we monitor everything on the line.
[09:44] monitor everything on the line uh to be able to do some data mining so.
[09:47] uh to be able to do some data mining so so.
[09:47] so it's really really the leading point in.
[09:50] it's really really the leading point in advanced manufacturing.
[09:51] advanced manufacturing and i'm i'm very proud of showing how.
[09:53] and i'm i'm very proud of showing how what ibm do.
[09:55] what ibm do in the process management and in the the.
[09:58] in the process management and in the the quality and excellence.
[09:59] quality and excellence they can deliver so in this example here.
[10:02] they can deliver so in this example here you have a pre-test test c-subs eight of.
[10:04] you have a pre-test test c-subs eight of them.
[10:05] them so those are the optical engine or the.
[10:07] so those are the optical engine or the transceiver surrounding a switch asic.
[10:09] transceiver surrounding a switch asic and we will use this as a.
[10:11] and we will use this as a example case of in in the next slide.
[10:14] example case of in in the next slide as you can see from the switch asic to.
[10:17] as you can see from the switch asic to the electrical dyed those.
[10:19] the electrical dyed those extreme smart short reach link and then.
[10:21] extreme smart short reach link and then you have your.
[10:22] you have your ultra smart reach between the electrical.
[10:25] ultra smart reach between the electrical dye.
[10:25] dye and the photonic dye of the sea salt so.
[10:28] and the photonic dye of the sea salt so as you can see the electrical signal.
[10:31] as you can see the electrical signal will go high speed.
[10:32] will go high speed to the electrical die they will be.
[10:34] to the electrical die they will be format that maybe have some fake or.
[10:36] format that maybe have some fake or other operation and then they will be.
[10:37] other operation and then they will be modulated to the pdi driver or uh.
[10:41] modulated to the pdi driver or uh to be much directed on the on the light.
[10:45] to be much directed on the on the light in both the fiber optics so packaging is.
[10:48] in both the fiber optics so packaging is critical for success in mind.
[10:51] critical for success in mind so when you're looking at this stick dye.
[10:53] so when you're looking at this stick dye and actual guide the best way to do that.
[10:55] and actual guide the best way to do that is to have a monolithic integration as.
[10:57] is to have a monolithic integration as example.
[10:58] example in the a and b configuration where the.
[11:00] in the a and b configuration where the big has all the electric.
[11:01] big has all the electric and photonic devices and this is the.
[11:03] and photonic devices and this is the base case scenario.
[11:05] base case scenario in those a and b the difference is one.
[11:07] in those a and b the difference is one is an overhang chip.
[11:09] is an overhang chip and the other has a little opening.
[11:11] and the other has a little opening inside the substrate.
[11:12] inside the substrate to open up the fiber attach or the the.
[11:15] to open up the fiber attach or the the optical.
[11:16] optical attached region when you're not able and.
[11:18] attached region when you're not able and you need to use another die.
[11:20] you need to use another die another node die you can use a 2d.
[11:23] another node die you can use a 2d configuration but sometimes it's more.
[11:24] configuration but sometimes it's more efficient to have it face to face.
[11:26] efficient to have it face to face because you can reduce.
[11:27] because you can reduce this length so in the face to face you.
[11:29] this length so in the face to face you can even have it in this uh.
[11:31] can even have it in this uh configuration where the pig is in a.
[11:33] configuration where the pig is in a little recess or you have a little.
[11:35] little recess or you have a little organic.
[11:36] organic interposer that rise the electrical dye.
[11:38] interposer that rise the electrical dye and the pig that's.
[11:39] and the pig that's the pose on the substrate then there's.
[11:41] the pose on the substrate then there's this configuration that i really love.
[11:43] this configuration that i really love is when you have this organic interposer.
[11:45] is when you have this organic interposer between the edi and the pedi so you.
[11:47] between the edi and the pedi so you still have this very very short region.
[11:49] still have this very very short region between the either and the pedi but you.
[11:50] between the either and the pedi but you still have this.
[11:51] still have this substrate and you can do some a lot of.
[11:54] substrate and you can do some a lot of planes and redistribution layer inside.
[11:55] planes and redistribution layer inside this enterpriser to be able to feed the.
[11:57] this enterpriser to be able to feed the power.
[11:58] power to the pick and the e-die within this.
[12:00] to the pick and the e-die within this face-to-face region especially when this.
[12:02] face-to-face region especially when this face-to-face region is quite large.
[12:04] face-to-face region is quite large and then if you're the best another way.
[12:07] and then if you're the best another way to do that is have.
[12:08] to do that is have a treat a traditional 2d packaging with.
[12:10] a treat a traditional 2d packaging with tsv.
[12:11] tsv not having the edi and the pdi one over.
[12:13] not having the edi and the pdi one over the other so those are the kind of.
[12:15] the other so those are the kind of packaging integration or how we can.
[12:17] packaging integration or how we can integrate.
[12:18] integrate a picture in our package those are some.
[12:21] a picture in our package those are some of the configuration available.
[12:23] of the configuration available at our site so when you look at the.
[12:27] at our site so when you look at the consideration for the optical coupling.
[12:29] consideration for the optical coupling so there's many interconnects uh.
[12:31] so there's many interconnects uh technology that exists but the.
[12:34] technology that exists but the currently what we linked to the best.
[12:36] currently what we linked to the best overall solution is really the v-groove.
[12:38] overall solution is really the v-groove because.
[12:38] because with the passive alignment you can go to.
[12:40] with the passive alignment you can go to high throughput automated and very.
[12:42] high throughput automated and very scalable process.
[12:43] scalable process the assembly complexity very low the.
[12:46] the assembly complexity very low the fibers are held by the v-groove so you.
[12:48] fibers are held by the v-groove so you have a mechanical and robust.
[12:50] have a mechanical and robust attach of the fiber that and it's a.
[12:52] attach of the fiber that and it's a solder reformable compatible process.
[12:55] solder reformable compatible process it has a low profile low injection loss.
[12:57] it has a low profile low injection loss as we will see in the next slide.
[12:59] as we will see in the next slide over 100 nanometers spectral lines and.
[13:01] over 100 nanometers spectral lines and it's a couple the two polarization.
[13:05] if we look at the switch example for.
[13:07] if we look at the switch example for example uh.
[13:08] example uh here you have we have a six trips uh.
[13:11] here you have we have a six trips uh asic chip.
[13:12] asic chip uh 51 terabit with a 112 gigabit.
[13:15] uh 51 terabit with a 112 gigabit electrical lane so 66 56 gigabyte pam4.
[13:19] electrical lane so 66 56 gigabyte pam4 and if you look at the number of optical.
[13:21] and if you look at the number of optical fiber you have to put.
[13:23] fiber you have to put on this switch.
[13:26] for example if you do an nrz.
[13:30] with one lambda upper fiber in one laser.
[13:32] with one lambda upper fiber in one laser injection.
[13:33] injection you will need more than 3000 fiber but.
[13:36] you will need more than 3000 fiber but when you split the.
[13:37] when you split the laser in you can reduce number fiber.
[13:39] laser in you can reduce number fiber when you use more lambda and doing.
[13:40] when you use more lambda and doing multiplexing.
[13:41] multiplexing you can again reduce more and when you.
[13:43] you can again reduce more and when you do the palm four.
[13:44] do the palm four and four lambda multiplexing you're now.
[13:47] and four lambda multiplexing you're now in 300.
[13:48] in 300 fibers for this switch application and.
[13:51] fibers for this switch application and this gives you a.
[13:52] this gives you a fiber density of 1.5 fiber per.
[13:54] fiber density of 1.5 fiber per millimeter.
[13:56] millimeter for example if you look at other.
[13:57] for example if you look at other coordinate you also have some other.
[13:59] coordinate you also have some other metric of the number of fiber.
[14:01] metric of the number of fiber based on those assumptions so.
[14:05] based on those assumptions so of course the connectivity you have.
[14:06] of course the connectivity you have either to decide is it going to be a.
[14:08] either to decide is it going to be a fire pigtail or integrate connector.
[14:10] fire pigtail or integrate connector how you're going to handle uh are going.
[14:13] how you're going to handle uh are going to have some pm fibers.
[14:14] to have some pm fibers that need to be connected how are you.
[14:16] that need to be connected how are you going to have your fiber escape from the.
[14:18] going to have your fiber escape from the edge density.
[14:19] edge density and you have to consider your connector.
[14:22] and you have to consider your connector loss and your fiber management to the.
[14:24] loss and your fiber management to the front panel in your optical budget.
[14:26] front panel in your optical budget then how are you going to attack.
[14:27] then how are you going to attack attach the sysop to the mcm.
[14:29] the sysop to the mcm or you're going to use a socket or a.
[14:31] or you're going to use a socket or a microphone reflow and you have.
[14:32] microphone reflow and you have many considerations in terms of cell.
[14:34] many considerations in terms of cell integrity isolation.
[14:36] integrity isolation beachfront yield rework and and all the.
[14:39] beachfront yield rework and and all the all the other aspects you have to.
[14:42] all the other aspects you have to compare those two.
[14:43] compare those two then the laser source currently the best.
[14:45] then the laser source currently the best way to to do a for large switch that.
[14:47] way to to do a for large switch that will be high thermal is to have.
[14:49] will be high thermal is to have externally but you have uh additional pm.
[14:52] externally but you have uh additional pm fiber to be.
[14:53] fiber to be mounted to the device so when we look at.
[14:56] mounted to the device so when we look at those.
[14:56] those figure what we're looking at.
[15:00] figure what we're looking at a standard fiber is a 250 micron pitch.
[15:03] a standard fiber is a 250 micron pitch so it's.
[15:03] so it's a density of four fiber per millimeter.
[15:06] a density of four fiber per millimeter and when we include the sisa packaging.
[15:08] and when we include the sisa packaging that's around it.
[15:09] that's around it we're more than the 1.6 per 2 millimeter.
[15:12] we're more than the 1.6 per 2 millimeter fibers it's very very close to what we.
[15:14] fibers it's very very close to what we have seen here.
[15:17] and of course uh there's some there was.
[15:20] and of course uh there's some there was some debate between.
[15:21] some debate between direct detect and current so of course.
[15:23] direct detect and current so of course current you can.
[15:24] current you can you have a better uh number of symbols.
[15:28] you have a better uh number of symbols per bot you can send more data but your.
[15:30] per bot you can send more data but your wall plug-in efficiency.
[15:31] wall plug-in efficiency is not as best the latency is a little.
[15:34] is not as best the latency is a little bit higher so yes you can transmit more.
[15:36] bit higher so yes you can transmit more more uh data but you will have a little.
[15:38] more uh data but you will have a little bit more lantern see compared.
[15:40] bit more lantern see compared to direct attack.
[15:43] so we discussed a little bit about this.
[15:45] so we discussed a little bit about this socket.
[15:46] socket in the case of a verbit switch where.
[15:49] in the case of a verbit switch where multiple.
[15:51] multiple sysup optical engine have to be included.
[15:54] sysup optical engine have to be included you really need to think of the overall.
[15:56] you really need to think of the overall yield and if you have for example a 98.
[15:59] yield and if you have for example a 98 percent yield.
[16:00] percent yield on a 12 c stop your overall modules will.
[16:03] on a 12 c stop your overall modules will still be in an.
[16:04] still be in an 80 or up a percent so so.
[16:07] 80 or up a percent so so when you have a lot of of optical engine.
[16:09] when you have a lot of of optical engine you may be better to have a socket.
[16:12] you may be better to have a socket but you have to you have to account.
[16:14] but you have to you have to account clamping mechanism and the
[16:15] clamping mechanism and the configurability because you will need
[16:16] configurability because you will need some real estates
[16:18] some real estates to be able to mount those socket but
[16:20] to be able to mount those socket but currently the socket performance
[16:21] currently the socket performance this exists at those high speed but they
[16:24] this exists at those high speed but they will induce some cost
[16:25] will induce some cost if you have a bg reflow you have will
[16:27] if you have a bg reflow you have will have a better comfort with
[16:29] have a better comfort with configurability you will have a
[16:31] configurability you will have a better signal interior by design and you
[16:33] better signal interior by design and you will have a smaller footprint
[16:34] will have a smaller footprint well you will have loss at rework and
[16:36] well you will have loss at rework and this will
[16:37] this will be a yield risk on your large cpo so
[16:40] be a yield risk on your large cpo so here we have a little
[16:41] here we have a little image of our silicon photonic reflowable
[16:44] image of our silicon photonic reflowable module here with the empty connection
[16:48] so for the fiber array or single mold
[16:51] so for the fiber array or single mold solder before
[16:52] solder before copper i will describe a little bit more
[16:53] copper i will describe a little bit more a test vehicle and and
[16:55] a test vehicle and and how it works uh you always have the top
[16:58] how it works uh you always have the top right
[16:59] right the papers that described in details if
[17:02] the papers that described in details if you want more information you always can
[17:03] you want more information you always can email me
[17:05] email me so our testicle was a 12 channel test
[17:08] so our testicle was a 12 channel test vehicle
[17:08] vehicle we had it one in o and other one in scl
[17:12] we had it one in o and other one in scl band a couple both proposition t and tm
[17:15] band a couple both proposition t and tm in fact there's two now there's one low.
[17:17] in fact there's two now there's one low pdl so it's couple you.
[17:19] pdl so it's couple you try the best to couple the two.
[17:20] try the best to couple the two polarization and there's one low oral so.
[17:22] polarization and there's one low oral so it's focused on one polarization.
[17:24] it's focused on one polarization but with the extremely low return loss.
[17:28] but with the extremely low return loss both of this coupler is compatible with.
[17:30] both of this coupler is compatible with how to.
[17:31] how to pick and place uh uh pick and place tool.
[17:33] pick and place uh uh pick and place tool how to put pick and place tool.
[17:35] how to put pick and place tool and it's folder referral compatible to.
[17:37] and it's folder referral compatible to do though so we have those uh v-grooves.
[17:40] do though so we have those uh v-grooves where the fiber optical fiber will sit.
[17:42] where the fiber optical fiber will sit in in front of the v-groove we have the.
[17:44] in in front of the v-groove we have the suspended membrane where a metamaterial.
[17:46] suspended membrane where a metamaterial mode converter.
[17:47] mode converter is printed and this mode converter is.
[17:50] is printed and this mode converter is engineered for max tolerance.
[17:53] engineered for max tolerance and the key for our assembly is to have.
[17:55] and the key for our assembly is to have this adhesive partitioning so basically.
[17:57] this adhesive partitioning so basically we're using a structural adhesive for.
[17:59] we're using a structural adhesive for fiber robustness inside the v-groove.
[18:01] fiber robustness inside the v-groove such as a fast uv tack.
[18:03] such as a fast uv tack it will provide the mechanical stability.
[18:05] it will provide the mechanical stability and create the alignment of the fiber.
[18:07] and create the alignment of the fiber towards the suspended waveguide and we.
[18:09] towards the suspended waveguide and we have one optical adhesive that is.
[18:11] have one optical adhesive that is clearly designed.
[18:12] clearly designed for optical performance and really.
[18:15] for optical performance and really reduce the stress.
[18:16] reduce the stress on this suspended membrane.
[18:19] on this suspended membrane so for the self-alignment so basically.
[18:21] so for the self-alignment so basically we will take the optical fiber and they.
[18:23] we will take the optical fiber and they will press and they will fall.
[18:25] will press and they will fall inside the v-groove so when you do a.
[18:27] inside the v-groove so when you do a multi-color analysis of.
[18:28] multi-color analysis of all the tolerances and variability that.
[18:31] all the tolerances and variability that you have for example the fiber diameter.
[18:33] you have for example the fiber diameter the.
[18:33] the v-groove with variation the fiber.
[18:37] v-groove with variation the fiber core concentricity and all those aspects.
[18:39] core concentricity and all those aspects put together in this montage you have.
[18:41] put together in this montage you have this.
[18:41] this overall misalignment from the.
[18:44] overall misalignment from the variability of the component.
[18:45] variability of the component and then you can design your mod coupler.
[18:48] and then you can design your mod coupler here at the bottom right of the image.
[18:50] here at the bottom right of the image to have a very very good response within.
[18:53] to have a very very good response within the swipe so as you can see here.
[18:55] the swipe so as you can see here all our tolerances to together makes a.
[18:58] all our tolerances to together makes a prism.
[18:59] prism plus minus one micron window for the.
[19:02] plus minus one micron window for the final alignment from the self-alignment.
[19:04] final alignment from the self-alignment process so the mode converter has been.
[19:06] process so the mode converter has been designed as you can see the deterio.
[19:08] designed as you can see the deterio called uh.
[19:09] called uh curve has been response to have a one.
[19:12] curve has been response to have a one micron a plus minus one micron.
[19:15] micron a plus minus one micron acceptance.
[19:16] acceptance window so you see the top this is the window so you see the top this is the nominal and you have a nominal and you have a hardware that was validated with some hardware that was validated with some v-groove groove variation v-groove groove variation so you we can really assess the performance of our coupler
[19:29] we also have high sensitivity where any misalignment will translate misalignment will translate in very very high optical loss in very very high optical loss and we can easily monitor sub-micron and we can easily monitor sub-micron deviation or deviation or disalignment so the main main problematic is to take the energy and the signal from a the signal from a 9 or 10 micro mole field from the 9 or 10 micro mole field from the optical fiber optical fiber and be able to place them inside the and be able to place them inside the v-groove and y micron and have the mod v-groove and y micron and have the mod converter converter be able to collide to the nanowire where be able to collide to the nanowire where the t and tm mode the t and tm mode is done so here i have a little video is done so here i have a little video that will show that will show the self-alignment uh occurring the self-alignment uh occurring so look at this blue fiber at the right so look at this blue fiber at the right you see it's totally misaligned you see it's totally misaligned and when it's centered the v-groove it and when it's centered the v-groove it will be replaced within this one micron will be replaced within this one micron for the mode coupler now for the mode coupler now we even have a better mode coupler at
[20:18] we even have a better mode coupler at global foundries
[20:19] global foundries they have improved and they have
[20:20] they have improved and they have published that uh last year in the
[20:22] published that uh last year in the in the journal of select quantum
[20:24] in the journal of select quantum electronics and now we have point seven
[20:27] electronics and now we have point seven db peak for the ta
[20:28] db peak for the ta and 1.4 and as you can see i also put
[20:31] and 1.4 and as you can see i also put some of the return loss
[20:33] some of the return loss so we are the 30 db from the
[20:37] so we are the 30 db from the optical fiber input and over the meta
[20:39] optical fiber input and over the meta material
[20:40] material as you can see we are below 50 55 db
[20:44] as you can see we are below 50 55 db under return loss this is very very very
[20:46] under return loss this is very very very good and here you have
[20:48] good and here you have some photo of the patterning of the
[20:50] some photo of the patterning of the metamaterial on the
[20:52] metamaterial on the gf mode coupler here
[20:56] so here's some reliable data so first of
[20:59] so here's some reliable data so first of all we have our
[21:01] all we have our refloable demonstration we also have
[21:03] refloable demonstration we also have thermal cycling and we did first until
[21:05] thermal cycling and we did first until gorgeous like
[21:06] gorgeous like minus 4085 and then we add another 1000
[21:10] minus 4085 and then we add another 1000 cycle of jedeclag
[21:12] cycle of jedeclag so it has a cumulative of 2000
[21:15] so it has a cumulative of 2000 thermal cycling so this is very very
[21:17] thermal cycling so this is very very good we did also the dam heat as you can
[21:20] good we did also the dam heat as you can see this is
[21:20] see this is using high sensitivity hardware so we're
[21:23] using high sensitivity hardware so we're within the
[21:24] within the uh error measurement this is the
[21:26] uh error measurement this is the measurement
[21:27] measurement before and after so it's the delta and
[21:30] before and after so it's the delta and zeros mean no change and as you can see
[21:32] zeros mean no change and as you can see we have point two two point four
[21:34] we have point two two point four so we're within the measurement error
[21:37] so we're within the measurement error for the for the the change after the
[21:40] for the for the the change after the stress
[21:42] now here a photonic flip chip assembly
[21:45] now here a photonic flip chip assembly example so this is
[21:46] example so this is a product that we had for us optical
[21:49] a product that we had for us optical switch and we had the test vehicle
[21:51] switch and we had the test vehicle so basically it's a substrate with the
[21:53] so basically it's a substrate with the opening so we can do the fiber attach
[21:56] opening so we can do the fiber attach it was a nickel clothed lid
[21:59] it was a nickel clothed lid and we had a photonic chip with a 200
[22:01] and we had a photonic chip with a 200 micron pitch interconnect
[22:03] micron pitch interconnect and we had the optical v groove from gf
[22:05] and we had the optical v groove from gf with capture under fill
[22:06] with capture under fill and as you can see the ripple double key
[22:08] and as you can see the ripple double key this is the the real average
[22:10] this is the the real average transmission loss
[22:11] transmission loss for the tm mode per facet as you can see
[22:13] for the tm mode per facet as you can see we have a 1.6 db
[22:15] we have a 1.6 db in average and here you have a little
[22:16] in average and here you have a little histogram
[22:18] histogram of the so we're mostly between one and
[22:20] of the so we're mostly between one and two and a half
[22:21] two and a half uh with a very good probability this is
[22:23] uh with a very good probability this is the the tajiki
[22:25] the the tajiki and we were using uh formic acid flipped
[22:27] and we were using uh formic acid flipped bonding
[22:28] bonding because we need a fluxless solution uh
[22:30] because we need a fluxless solution uh to maintain the
[22:31] to maintain the groove faster cleaning less and the
[22:33] groove faster cleaning less and the suspended will get into gritty
[22:35] suspended will get into gritty and we use a attacking fluid that is a
[22:37] and we use a attacking fluid that is a material and we didn't see any void in
[22:39] material and we didn't see any void in cracking the emc or the solder
[22:41] cracking the emc or the solder and this is available at bromo so we
[22:43] and this is available at bromo so we have a production uh formic acid furnace
[22:45] have a production uh formic acid furnace at the main plant and we also have a
[22:47] at the main plant and we also have a small
[22:47] small air in the oven lab acid formic acid
[22:51] air in the oven lab acid formic acid oven
[22:52] oven in the lab for process uh the body
[22:56] in the lab for process uh the body um so this is the main question is
[22:59] um so this is the main question is should we do fiber first or fiberglass
[23:01] should we do fiber first or fiberglass approaches
[23:01] approaches so here we'll discuss about the pros and
[23:03] so here we'll discuss about the pros and cons of either
[23:04] cons of either so when you're doing fabric first
[23:06] so when you're doing fabric first approach of course you're going to
[23:08] approach of course you're going to have early optical interface protection
[23:10] have early optical interface protection since the fiber will be
[23:11] since the fiber will be glued there and it will protect this
[23:14] glued there and it will protect this assembly
[23:15] assembly region and you will do the fiber attach
[23:17] region and you will do the fiber attach in the best condition
[23:18] in the best condition and this enables also you to test and
[23:21] and this enables also you to test and perform
[23:22] perform a subsequent assembly of non-good
[23:24] a subsequent assembly of non-good sub-engines
[23:26] sub-engines but still you will have to manipulate
[23:28] but still you will have to manipulate this fiber
[23:29] this fiber stub and you cannot do a very good
[23:32] stub and you cannot do a very good strain relief
[23:33] strain relief on this sub-engine and how will this
[23:36] on this sub-engine and how will this fiber stop the picture impact the flip
[23:38] fiber stop the picture impact the flip chip or downstream process
[23:40] chip or downstream process uh is some of the cons when you're doing
[23:43] uh is some of the cons when you're doing the fiberglass approach
[23:44] the fiberglass approach man you're more comfortable with a
[23:46] man you're more comfortable with a standard micro assembly
[23:48] standard micro assembly and the lid can provide a very good
[23:50] and the lid can provide a very good intro for strain relief
[23:51] intro for strain relief but you will need extra precaution uh
[23:54] but you will need extra precaution uh for the optical interface partition
[23:55] for the optical interface partition uh for example as using formic acid
[23:58] uh for example as using formic acid furnace
[23:58] furnace and you also need a fiber attached with
[24:01] and you also need a fiber attached with either a
[24:02] either a cavity in the substrate or the chip that
[24:04] cavity in the substrate or the chip that will be a little bit
[24:05] will be a little bit overhang so here i have some
[24:09] overhang so here i have some animation to explain how this attach
[24:12] animation to explain how this attach process works
[24:13] process works so first you have a robot handler that's
[24:15] so first you have a robot handler that's grabbing the fiber array and
[24:17] grabbing the fiber array and grabbing also the glass buffer with the
[24:19] grabbing also the glass buffer with the big tip this is a uv transparent picture
[24:21] big tip this is a uv transparent picture so basically it will enable uv adhesive
[24:24] so basically it will enable uv adhesive so we will dispense all the needed as
[24:27] so we will dispense all the needed as these additive
[24:28] these additive at the various locations we will do all
[24:30] at the various locations we will do all the curing of the strain relief
[24:33] the curing of the strain relief mechanical and optical it will do a
[24:35] mechanical and optical it will do a quick uv attack and the batch
[24:37] quick uv attack and the batch process finish of the cure later on
[24:41] process finish of the cure later on to dismiss the high troop tool
[24:44] to dismiss the high troop tool so the robot will place the
[24:47] so the robot will place the fiber array inside the v-groove
[24:51] fiber array inside the v-groove and the pick will push it so the
[24:53] and the pick will push it so the self-alignment process will occur
[24:54] self-alignment process will occur at this point the u-verse the quick uv
[24:57] at this point the u-verse the quick uv attack will occur
[24:58] attack will occur that's a less than five second attack
[25:00] that's a less than five second attack and then
[25:01] and then the the cure is finished in a in a
[25:04] the the cure is finished in a in a in a batch tool process after that
[25:08] in a batch tool process after that then you have also to consider optical
[25:10] then you have also to consider optical connector and and we truly see that the
[25:12] connector and and we truly see that the connector sides are quite huge and when
[25:14] connector sides are quite huge and when you look at the drawings
[25:15] you look at the drawings of a ferrule next package you
[25:19] of a ferrule next package you realize that those are huge so we really
[25:22] realize that those are huge so we really need
[25:22] need smaller size and italy will need
[25:25] smaller size and italy will need solder reflow compatible ferrule because
[25:27] solder reflow compatible ferrule because it's really changed the integration
[25:29] it's really changed the integration chain
[25:30] chain and how you can assemble your photonic
[25:32] and how you can assemble your photonic devices
[25:33] devices uh in your systems we also need low loss
[25:37] uh in your systems we also need low loss single mode for 1 by 16 2x16 and 1 by 24
[25:41] single mode for 1 by 16 2x16 and 1 by 24 fiber
[25:42] fiber there's work currently uh we've been
[25:44] there's work currently uh we've been done on having 80 micron fibers
[25:47] done on having 80 micron fibers on a reduced pitch so uh on the
[25:50] on a reduced pitch so uh on the on the big chip and we will love to see
[25:53] on the big chip and we will love to see that also from this
[25:54] that also from this on further side and we have to include
[25:57] on further side and we have to include pm
[25:57] pm fibers uh to inject light so we have
[26:01] fibers uh to inject light so we have a special component that has a mix of pm
[26:04] a special component that has a mix of pm and single mold fiber
[26:06] and single mold fiber inside and here we have a little example
[26:08] inside and here we have a little example when you have
[26:09] when you have a 4pm laser input and
[26:12] a 4pm laser input and standard single mode fiber for io that
[26:14] standard single mode fiber for io that are clocked together inside an empty
[26:16] are clocked together inside an empty and we are doing that and
[26:20] and we are doing that and of cour of course you have to consider
[26:22] of cour of course you have to consider efficient shipping and expedition
[26:24] efficient shipping and expedition of the fiber component and the photonic
[26:25] of the fiber component and the photonic modules because having those
[26:27] modules because having those pigtails and optical face you need to
[26:28] pigtails and optical face you need to protect them you need to secure them in
[26:30] protect them you need to secure them in the in the in the package
[26:32] the in the in the package so those are all elements to consider
[26:37] so those are all elements to consider so we have discussed about the fiber
[26:39] so we have discussed about the fiber v-groove
[26:40] v-groove uh attach so currently
[26:43] uh attach so currently those chips are available at global
[26:44] those chips are available at global foundries uh we're one of their
[26:46] foundries uh we're one of their certified
[26:46] certified osat for this technology uh now we will
[26:49] osat for this technology uh now we will discuss
[26:50] discuss more about the compliant polymer
[26:52] more about the compliant polymer interface so this is a
[26:54] interface so this is a another uh coupling technology using
[26:56] another uh coupling technology using alibaba coupler it's it's enable a
[26:57] alibaba coupler it's it's enable a dancer pitch up to 25 micro
[27:00] dancer pitch up to 25 micro at the chip interface and there's no
[27:01] at the chip interface and there's no need for deep v groove or wet edge
[27:03] need for deep v groove or wet edge process
[27:04] process in the coverage more simple and and
[27:06] in the coverage more simple and and since you're using a
[27:07] since you're using a compliant material you have less chip
[27:09] compliant material you have less chip package integration
[27:11] package integration risk mitigation and we have a present
[27:14] risk mitigation and we have a present early this year in january a very good
[27:16] early this year in january a very good uh paper on the on this on this
[27:20] uh paper on the on this on this technology so you can go and see and see
[27:22] technology so you can go and see and see all the
[27:23] all the the results and the reliability
[27:25] the results and the reliability demonstration of this technology
[27:27] demonstration of this technology currently we're enabling a new foundry
[27:30] currently we're enabling a new foundry so it's a
[27:31] so it's a imf advanced macro foundry uh so we're
[27:34] imf advanced macro foundry uh so we're currently working with them to uh
[27:35] currently working with them to uh so we have oben and c ban loop back this
[27:38] so we have oben and c ban loop back this vehicle and we're currently working on
[27:40] vehicle and we're currently working on the functional
[27:41] the functional uh devices and as you can see here uh we
[27:45] uh devices and as you can see here uh we have our polymer
[27:47] have our polymer weight guide as you can see at position
[27:49] weight guide as you can see at position with the optical adhesive
[27:50] with the optical adhesive and here you can see some of the
[27:52] and here you can see some of the structure of the imf
[27:54] structure of the imf and there's the new those those are new
[27:57] and there's the new those those are new results they're submitted for
[27:58] results they're submitted for publication so they will be
[28:00] publication so they will be published maybe later this year i will
[28:03] published maybe later this year i will just give you a glimp
[28:04] just give you a glimp a quick glimpse of the new results that
[28:06] a quick glimpse of the new results that we have on this new foundry
[28:08] we have on this new foundry so this is the intrusion loss by facet
[28:10] so this is the intrusion loss by facet so this is
[28:12] so this is from the single multi fiber to the
[28:14] from the single multi fiber to the polymer to the
[28:15] polymer to the pig so it's include all the loss and you
[28:18] pig so it's include all the loss and you hear of your o-band
[28:19] hear of your o-band uh hundred nanometer coupling as you can
[28:21] uh hundred nanometer coupling as you can see the all the channels
[28:23] see the all the channels so it was a six uh loop back test
[28:25] so it was a six uh loop back test vehicle 12 channel
[28:26] vehicle 12 channel as you can see we're in the one point uh
[28:29] as you can see we're in the one point uh better than 1.5 db in the coupling loss
[28:32] better than 1.5 db in the coupling loss over all the range
[28:33] over all the range and we built uh we made 48 uh component
[28:36] and we built uh we made 48 uh component and here you have the absolute insertion
[28:38] and here you have the absolute insertion loss per facet
[28:40] loss per facet and you have a little histogram of the
[28:42] and you have a little histogram of the the population
[28:43] the population and this is using our polymer and the
[28:46] and this is using our polymer and the ferrule so we're using self-alignment
[28:48] ferrule so we're using self-alignment for the polymer to the chip and the
[28:49] for the polymer to the chip and the polymer to the ferrule
[28:51] polymer to the ferrule and we use active alignment between the
[28:54] and we use active alignment between the empty to the
[28:55] empty to the polymer empty to remove this empty loss
[29:00] polymer empty to remove this empty loss and just focus to have the polymer and
[29:02] and just focus to have the polymer and the adiabatic coupling loss
[29:04] the adiabatic coupling loss to the devices so we are very excited
[29:07] to the devices so we are very excited those
[29:07] those will be presented so you can go sick you
[29:10] will be presented so you can go sick you go
[29:10] go go see those results and it will be
[29:13] go see those results and it will be available at imf
[29:15] available at imf so in conclusion uh co-packaging is
[29:18] so in conclusion uh co-packaging is required for the next generation switch
[29:20] required for the next generation switch designed for effective managerial is key
[29:21] designed for effective managerial is key for the success and we have shown today
[29:23] for the success and we have shown today some co-patching toolbox
[29:25] some co-patching toolbox for single mod optic assembly those
[29:27] for single mod optic assembly those process are
[29:28] process are wavelength the multiplication compatible
[29:30] wavelength the multiplication compatible it's leveraged microlinking know-how
[29:32] it's leveraged microlinking know-how infrastructure
[29:33] infrastructure and compatible with how to put
[29:34] and compatible with how to put facilities so here you have an example
[29:37] facilities so here you have an example i have still to say a final word on
[29:39] i have still to say a final word on power efficiency with data protocol
[29:42] power efficiency with data protocol because we're talking about those large
[29:44] because we're talking about those large uh cpo switch
[29:45] uh cpo switch and those so we need those high binary
[29:48] and those so we need those high binary processor
[29:49] processor that using driver test they will be
[29:52] that using driver test they will be limited by thermal power
[29:53] limited by thermal power design and they will consume too much
[29:55] design and they will consume too much power so maybe having a
[29:57] power so maybe having a run rabbit on off will enable more
[29:59] run rabbit on off will enable more efficient power usage
[30:01] efficient power usage and we can have the same
[30:04] and we can have the same we have ibm has demonstrated those
[30:07] we have ibm has demonstrated those amazing
[30:08] amazing results uh so eight nanosecond power on
[30:10] results uh so eight nanosecond power on and clocked at the
[30:12] and clocked at the uh recover lock uh always pour on of two
[30:15] uh recover lock uh always pour on of two pikachu per bit a standby power five
[30:17] pikachu per bit a standby power five megawatt
[30:18] megawatt uh so really really interesting we have
[30:20] uh so really really interesting we have a prefect of 10 minus
[30:23] a prefect of 10 minus 12 prefect this is very good 2.2 joule
[30:26] 12 prefect this is very good 2.2 joule at the nrz 1.1 picojoule at
[30:30] at the nrz 1.1 picojoule at palm with the pam4 so this is very
[30:33] palm with the pam4 so this is very interesting
[30:33] interesting so those are some and if if you contact
[30:36] so those are some and if if you contact me i can route you to the
[30:37] me i can route you to the to the to the ibm team about that
[30:40] to the to the ibm team about that so thank you very much to all our team
[30:42] so thank you very much to all our team uh i will now pass
[30:44] uh i will now pass uh the the the microphone to
[30:47] uh the the the microphone to uh vikas from global foundries so we
[30:49] uh vikas from global foundries so we will give you more details
[30:51] will give you more details about what the possible entries for the
[30:53] about what the possible entries for the next are
[30:54] next are thank you very much
[30:58] thank you alexander and thank you jim uh
[31:01] thank you alexander and thank you jim uh good morning everybody my name is vikas
[31:04] good morning everybody my name is vikas gupta
[31:05] gupta i'm the director of product management
[31:07] i'm the director of product management for silicon photonics at global
[31:09] for silicon photonics at global foundries
[31:10] foundries and i would like to thank the consortium
[31:12] and i would like to thank the consortium for onboard optics and the dupont team
[31:14] for onboard optics and the dupont team for this opportunity to participate in
[31:16] for this opportunity to participate in this webinar
[31:16] this webinar the genesis of silicon photonics program
[31:19] the genesis of silicon photonics program at global fundraising large part
[31:21] at global fundraising large part started with our acquisition of the ibm
[31:23] started with our acquisition of the ibm microelectronics business
[31:25] microelectronics business and hence i'm very happy and excited to
[31:27] and hence i'm very happy and excited to share this webinar with my friends at
[31:29] share this webinar with my friends at ibm bromart
[31:32] ibm bromart so i plan to cover two main topics in
[31:35] so i plan to cover two main topics in the 15 minutes or so that i have i
[31:37] the 15 minutes or so that i have i wanted to give you all an introduction
[31:39] wanted to give you all an introduction to silicon photonics and global foundry
[31:41] to silicon photonics and global foundry and then i plan to cover
[31:43] and then i plan to cover some key industry differentiating
[31:44] some key industry differentiating features that we're working on
[31:46] features that we're working on and then of course i will close this
[31:49] and then of course i will close this giving some context
[31:51] giving some context uh on how all of this fits into the
[31:53] uh on how all of this fits into the co-package optics ecosystem
[31:56] co-package optics ecosystem next slide so silicon photonics
[32:00] next slide so silicon photonics wafers at global foundries are being
[32:02] wafers at global foundries are being processed currently at two facilities
[32:05] processed currently at two facilities at global foundries this is fab 10 in
[32:07] at global foundries this is fab 10 in fish scale
[32:09] fish scale and rfab 8 in in malta
[32:12] and rfab 8 in in malta uh fab 8 is sort of our end state
[32:15] uh fab 8 is sort of our end state manufacturing facility for silicon
[32:17] manufacturing facility for silicon photonics it is
[32:19] photonics it is our most advanced fab running at 12
[32:21] our most advanced fab running at 12 nanometer and 14 nanometer finfet
[32:23] nanometer and 14 nanometer finfet technologies
[32:24] technologies with a capacity to run around five
[32:27] with a capacity to run around five hundred thousand
[32:28] hundred thousand three hundred millimeter wafers per year
[32:31] three hundred millimeter wafers per year and the reason i wanted to show you all
[32:32] and the reason i wanted to show you all this
[32:33] this is to just show the commitment that
[32:35] is to just show the commitment that global foundries has to
[32:37] global foundries has to silicon photonics as a technology our
[32:39] silicon photonics as a technology our technologies will be running
[32:41] technologies will be running on a 300 millimeter wafer
[32:45] on a 300 millimeter wafer uh next slide so i just wanted to just
[32:48] uh next slide so i just wanted to just sort of go back to the basics
[32:50] sort of go back to the basics uh you know the growth of the
[32:51] uh you know the growth of the semiconductor industry has been
[32:53] semiconductor industry has been dominated by electronic components in
[32:55] dominated by electronic components in circuits
[32:56] circuits and we're used to talking about the
[32:57] and we're used to talking about the transfer and manipulation
[32:59] transfer and manipulation of electrons using active components
[33:01] of electrons using active components such as transistors passive components
[33:04] such as transistors passive components such as resistors and capacitors and
[33:06] such as resistors and capacitors and similarly on the photonic side
[33:08] similarly on the photonic side we talk about manipulating photons using
[33:12] we talk about manipulating photons using active components such as lasers
[33:13] active components such as lasers modulators detectors
[33:16] modulators detectors passive components such as waveguides
[33:17] passive components such as waveguides and spot size converters
[33:19] and spot size converters and input output components such as
[33:21] and input output components such as laser trenches
[33:23] laser trenches to place lasers into fiber v grooves as
[33:26] to place lasers into fiber v grooves as alexander mentioned and grating couplers
[33:29] alexander mentioned and grating couplers while india phosphide has been the
[33:31] while india phosphide has been the material of choice in the photonics
[33:32] material of choice in the photonics industry
[33:33] industry silicon photonics is becoming
[33:35] silicon photonics is becoming increasingly interesting
[33:36] increasingly interesting due to its use of the silicon ecosystem
[33:39] due to its use of the silicon ecosystem that has already been established on the
[33:41] that has already been established on the microelectronic site
[33:42] microelectronic site it brings with its significant
[33:44] it brings with its significant advantages of the reduction in packaging
[33:46] advantages of the reduction in packaging costs
[33:47] costs higher levels of integration lower power
[33:50] higher levels of integration lower power consumption
[33:51] consumption and significantly the ability to perform
[33:53] and significantly the ability to perform wafer level testing and packaging
[33:56] wafer level testing and packaging next slide please
[34:01] so global foundries we have a 90
[34:03] so global foundries we have a 90 nanometer and a
[34:04] nanometer and a 45 nanometer photonic technology where
[34:07] 45 nanometer photonic technology where they plan to address the communication
[34:09] they plan to address the communication market
[34:10] market including datacom telecom
[34:13] including datacom telecom and 5g networks we are already engaged
[34:16] and 5g networks we are already engaged with customers for chip to chip
[34:17] with customers for chip to chip communication using co-packaged optics
[34:20] communication using co-packaged optics and customers wanting to use silicon
[34:22] and customers wanting to use silicon photonics for other applications such as
[34:24] photonics for other applications such as quantum and photonic computing time of
[34:27] quantum and photonic computing time of flight sensors
[34:28] flight sensors and lidar some of these markets are
[34:30] and lidar some of these markets are ready right now
[34:32] ready right now and some of them have longer gestational
[34:33] and some of them have longer gestational periods due to qualification
[34:35] periods due to qualification requirements
[34:36] requirements but this sort of forms the market
[34:38] but this sort of forms the market segments that we are trying to address
[34:40] segments that we are trying to address with our technologies
[34:43] next slide please at global foundries
[34:47] next slide please at global foundries we are in the business of selling
[34:48] we are in the business of selling solutions and hence the silicon
[34:50] solutions and hence the silicon photonics business line actually
[34:52] photonics business line actually consists of two pieces
[34:54] consists of two pieces one is the rf sigi technologies to
[34:56] one is the rf sigi technologies to address the electronic components
[34:58] address the electronic components which match up with our photonic
[35:00] which match up with our photonic solutions for data center applications
[35:03] solutions for data center applications and of course this talk will be focused
[35:05] and of course this talk will be focused more on the photonics icps
[35:08] more on the photonics icps next slide
[35:12] so i wanted to give you all sort of a
[35:14] so i wanted to give you all sort of a flavor of the feature
[35:16] flavor of the feature set that we have on a leading edge
[35:18] set that we have on a leading edge photonics technology
[35:19] photonics technology so 45 sp clo or clo as we call it
[35:24] so 45 sp clo or clo as we call it for short is a monolithically integrated
[35:27] for short is a monolithically integrated rfc mass technology along with photonic
[35:30] rfc mass technology along with photonic components
[35:32] components going clockwise from the top left corner
[35:34] going clockwise from the top left corner to the bottom right
[35:35] to the bottom right one can see the photonic components such
[35:37] one can see the photonic components such as modulators
[35:38] as modulators photodiodes phase shifters mux demux
[35:42] photodiodes phase shifters mux demux solutions
[35:43] solutions at the bottom sort of six o'clock area
[35:46] at the bottom sort of six o'clock area of the slide
[35:47] of the slide you can see almost mems-like components
[35:49] you can see almost mems-like components such as a trench for a laser attach
[35:52] such as a trench for a laser attach v-grooves for fiber attach and grating
[35:54] v-grooves for fiber attach and grating couplers
[35:55] couplers for on wafer testing and that is a
[35:57] for on wafer testing and that is a facility that we provide to customers
[36:00] facility that we provide to customers where we are actually able to collect
[36:02] where we are actually able to collect fairly large amounts of data
[36:04] fairly large amounts of data statistically meaningful data at wafer
[36:07] statistically meaningful data at wafer level for photonic components
[36:10] level for photonic components on the left side of the chart you can
[36:11] on the left side of the chart you can see our electronic components
[36:13] see our electronic components which is the rf cmos transistors which
[36:16] which is the rf cmos transistors which can be integrated into tiers
[36:18] can be integrated into tiers drivers etc and spiral inductors
[36:22] drivers etc and spiral inductors we also support a pdk a fairly
[36:25] we also support a pdk a fairly comprehensive pdk
[36:26] comprehensive pdk which includes p-cells and models for
[36:29] which includes p-cells and models for these components
[36:30] these components so with that as a background i wanted to
[36:32] so with that as a background i wanted to cover you know four
[36:34] cover you know four features sort of differentiating
[36:36] features sort of differentiating features that we're working on and it
[36:38] features that we're working on and it sort of ties back to the
[36:39] sort of ties back to the the slides that that alexander showed so
[36:42] the slides that that alexander showed so next slide
[36:43] next slide uh alexander so the first part is the
[36:47] uh alexander so the first part is the monolithic integration so we as i
[36:49] monolithic integration so we as i mentioned we have integrated a high
[36:50] mentioned we have integrated a high performance 45
[36:52] performance 45 nanometer rf sli technology with the
[36:55] nanometer rf sli technology with the photonics
[36:56] photonics the monolithic approach has the
[36:58] the monolithic approach has the advantage of reducing packaging
[36:59] advantage of reducing packaging complexity and cost
[37:01] complexity and cost and furthermore one can squeeze out more
[37:04] and furthermore one can squeeze out more performance out of the transistors due
[37:05] performance out of the transistors due to the fact that you have reduced
[37:07] to the fact that you have reduced parasitics associated with packaging
[37:10] parasitics associated with packaging and esd so note because the the
[37:13] and esd so note because the the transistors are monolithically
[37:14] transistors are monolithically integrated with the photonics
[37:16] integrated with the photonics the the connection actually becomes an
[37:18] the the connection actually becomes an internal node and so you actually
[37:19] internal node and so you actually eliminate the need for esd so
[37:22] eliminate the need for esd so while this technology may not have the
[37:25] while this technology may not have the fastest
[37:25] fastest ft you can still achieve fairly high
[37:28] ft you can still achieve fairly high data rates with this technology
[37:30] data rates with this technology next slide
[37:34] we're also enabling uh an ondi laser
[37:37] we're also enabling uh an ondi laser attach and this is created this is done
[37:39] attach and this is created this is done by creating a trench on the wafer
[37:41] by creating a trench on the wafer and aligning a dfb laser using fiducial
[37:44] and aligning a dfb laser using fiducial marks on the pick and the laser
[37:46] marks on the pick and the laser this is done passively using a high
[37:48] this is done passively using a high precision
[37:49] precision pick and place tool again this is
[37:52] pick and place tool again this is another differentiating technology which
[37:54] another differentiating technology which has the potential
[37:55] has the potential of reducing packaging cost and also
[37:58] of reducing packaging cost and also packaging complexity significantly
[38:02] packaging complexity significantly next slide
[38:05] next slide this slide is uh refers back to you know
[38:08] this slide is uh refers back to you know some of the work that alexander was
[38:09] some of the work that alexander was showing
[38:10] showing uh we have enabled v-grooves
[38:13] uh we have enabled v-grooves for fiber attach and the v-groove is
[38:16] for fiber attach and the v-groove is created by doing a crystallographic
[38:18] created by doing a crystallographic etch which allows for the self-alignment
[38:21] etch which allows for the self-alignment of passively pasted fibers
[38:23] of passively pasted fibers with a suspended spot size converter and
[38:25] with a suspended spot size converter and if you refer back to alexander's chart
[38:27] if you refer back to alexander's chart he's going through into he's gone
[38:29] he's going through into he's gone through a lot more detail on this front
[38:31] through a lot more detail on this front so
[38:32] so while this technology is interesting for
[38:35] while this technology is interesting for datacom applications
[38:36] datacom applications it really starts to shine for
[38:38] it really starts to shine for co-packaged optics
[38:39] co-packaged optics where you have fairly large arrays of
[38:42] where you have fairly large arrays of fibers that have to be attached
[38:44] fibers that have to be attached passively to the die
[38:50] next slide
[38:54] yeah you know alexander had a chart
[38:57] yeah you know alexander had a chart where he was showing the different
[38:59] where he was showing the different options
[38:59] options and then and and correspondingly from
[39:02] and then and and correspondingly from the
[39:03] the on the global foundry side what what i
[39:05] on the global foundry side what what i wanted to show y'all is sort of the 2.5
[39:08] wanted to show y'all is sort of the 2.5 d
[39:08] d packaging solutions that we are working
[39:11] packaging solutions that we are working on
[39:11] on to make it compatible with solutions
[39:14] to make it compatible with solutions that alexander had
[39:16] that alexander had talked about so on the top left you can
[39:19] talked about so on the top left you can see
[39:19] see the the work on some copper c pads which
[39:22] the the work on some copper c pads which are compatible
[39:24] are compatible with a laser cavity and you can actually
[39:26] with a laser cavity and you can actually see the routing going into the cavity
[39:28] see the routing going into the cavity on the top left on the top right
[39:32] on the top left on the top right you can see similar you know copper c
[39:34] you can see similar you know copper c pads
[39:35] pads which are compatible with v grooves
[39:38] which are compatible with v grooves on the bottom left is is sort of the
[39:42] on the bottom left is is sort of the copper pillar
[39:43] copper pillar bump technology that we're working with
[39:45] bump technology that we're working with which are compatible with v grooves and
[39:47] which are compatible with v grooves and this
[39:47] this allows you to flip chip a pick die on a
[39:50] allows you to flip chip a pick die on a laminate
[39:51] laminate and then on the bottom right you can see
[39:55] and then on the bottom right you can see sort of integrated together uh copper c
[39:58] sort of integrated together uh copper c pads which have
[39:59] pads which have you know an on-dye laser and also are
[40:02] you know an on-dye laser and also are compatible with the v-groove technology
[40:04] compatible with the v-groove technology for fiber attach
[40:06] for fiber attach so i wanted to this is this is sort of
[40:08] so i wanted to this is this is sort of my final sort of differentiation slide
[40:10] my final sort of differentiation slide and i wanted to spend some time on this
[40:12] and i wanted to spend some time on this uh and you know
[40:16] uh and you know i talked about you know the laser
[40:18] i talked about you know the laser attached the fiber attach
[40:20] attached the fiber attach the 2.5 d integration
[40:23] the 2.5 d integration the monolithic integration and this sort
[40:25] the monolithic integration and this sort of compiles
[40:26] of compiles everything together as solutions
[40:30] everything together as solutions that our customers are looking into so
[40:32] that our customers are looking into so earlier this year
[40:34] earlier this year you know facebook and microsoft have
[40:37] you know facebook and microsoft have released
[40:38] released a standard towards trying to standardize
[40:41] a standard towards trying to standardize co-packaged optics and uh this this
[40:44] co-packaged optics and uh this this this document was published through the
[40:46] this document was published through the facebook site
[40:47] facebook site and it provides some standardization
[40:50] and it provides some standardization associated with
[40:52] associated with a a optical engine which is shown on the
[40:55] a a optical engine which is shown on the top
[40:55] top left which then integrates on a router
[40:58] left which then integrates on a router chip
[40:59] chip where you can see the optical engines
[41:01] where you can see the optical engines sort of surrounding
[41:02] sort of surrounding the router chip or the fpga
[41:06] the router chip or the fpga while this has been sort of an early
[41:07] while this has been sort of an early attempt at trying to standardize
[41:09] attempt at trying to standardize you can see that companies that are
[41:12] you can see that companies that are trying to read this document and come up
[41:14] trying to read this document and come up with solutions which meet those
[41:15] with solutions which meet those requirements
[41:16] requirements actually have fairly different solutions
[41:19] actually have fairly different solutions ranging from you know a silicon
[41:21] ranging from you know a silicon interposer
[41:22] interposer to a fairly complex you know dual side
[41:25] to a fairly complex you know dual side organic type of packaging
[41:27] organic type of packaging as a foundry our desire of course is to
[41:31] as a foundry our desire of course is to enable our customers to allow for this
[41:33] enable our customers to allow for this sort
[41:34] sort of work but again there's a lot of work
[41:37] of work but again there's a lot of work to be done
[41:37] to be done in this industry to actually come up
[41:40] in this industry to actually come up with a standardized package to address
[41:42] with a standardized package to address co-packaged optics and that is something
[41:45] co-packaged optics and that is something that i think the ecosystem associated
[41:48] that i think the ecosystem associated with foundries
[41:49] with foundries osats uh you know osap such as ibm
[41:52] osats uh you know osap such as ibm belmont
[41:54] belmont our end users which are the data center
[41:56] our end users which are the data center operators
[41:57] operators all need to work together to sort of uh
[42:00] all need to work together to sort of uh come up with a standardized solution for
[42:01] come up with a standardized solution for co-package optics
[42:04] co-package optics this is this is sort of my my summary
[42:06] this is this is sort of my my summary slide and then we can open it up for
[42:08] slide and then we can open it up for questions uh you know at global
[42:10] questions uh you know at global foundries
[42:11] foundries uh we are committed to silicon photonics
[42:14] uh we are committed to silicon photonics uh we are using a 300 millimeter
[42:18] uh we are using a 300 millimeter wafer fab for production uh the
[42:21] wafer fab for production uh the intention
[42:22] intention or the goal of silicon photonics at
[42:24] or the goal of silicon photonics at global foundries
[42:25] global foundries is to provide a differentiated solution
[42:27] is to provide a differentiated solution for our customers through the reduced
[42:29] for our customers through the reduced you know through unique features such as
[42:32] you know through unique features such as monolithic integration and you know
[42:34] monolithic integration and you know unique features associated with
[42:35] unique features associated with packaging
[42:37] packaging we do feel that these allow you know the
[42:40] we do feel that these allow you know the reduction of interconnect parasitic
[42:42] reduction of interconnect parasitic the close proximity of the cmos and
[42:44] the close proximity of the cmos and silicon photonics allows for higher
[42:46] silicon photonics allows for higher bandwidth
[42:48] bandwidth and higher density of transceivers
[42:51] and higher density of transceivers and we are working with various
[42:53] and we are working with various customers to provide differentiated
[42:55] customers to provide differentiated solutions
[42:55] solutions associated with co-packaged optics as
[42:57] associated with co-packaged optics as part of our business
[43:00] part of our business i believe that is my last slide all
[43:03] i believe that is my last slide all right
[43:04] right thank you very much vikis and
[43:08] thank you very much vikis and and alexander that's a tremendous
[43:10] and alexander that's a tremendous presentation
[43:11] presentation a lot of very impressive technology
[43:13] a lot of very impressive technology there
[43:14] there at this point i think we're ready to do
[43:15] at this point i think we're ready to do a quick poll of our audience um
[43:17] a quick poll of our audience um so julian if you could queue up our our
[43:20] so julian if you could queue up our our poll it'd be
[43:21] poll it'd be interesting to see what what people are
[43:23] interesting to see what what people are are thinking in terms of
[43:25] are thinking in terms of markets and and um timelines for
[43:28] markets and and um timelines for for uh this kind of technology i'd also
[43:31] for uh this kind of technology i'd also like to encourage anyone um and everyone
[43:33] like to encourage anyone um and everyone to submit their questions for
[43:35] to submit their questions for our two panelists we have a number of
[43:36] our two panelists we have a number of those questions coming in already
[43:39] those questions coming in already and we'll do our best to answer them as
[43:41] and we'll do our best to answer them as as quickly and as best we can
[43:44] as quickly and as best we can so um while we wait for that poll
[43:46] so um while we wait for that poll results to start coming in
[43:48] results to start coming in um alexander i i'd like to jump off and
[43:51] um alexander i i'd like to jump off and um
[43:51] um jump in and ask you first a quick
[43:54] jump in and ask you first a quick question about
[43:55] question about the example that you gave of the optical
[43:58] the example that you gave of the optical switch
[43:59] switch could you tell us more about that
[44:01] could you tell us more about that project we are involved in the
[44:04] project we are involved in the in those kind of products i cannot stay
[44:07] in those kind of products i cannot stay much
[44:08] much but uh we're working uh so those are
[44:10] but uh we're working uh so those are like the one rules i published
[44:12] like the one rules i published earlier this year a very very exhaustive
[44:16] earlier this year a very very exhaustive paper of
[44:17] paper of all the requirement and and challenges
[44:19] all the requirement and and challenges and consideration
[44:20] and consideration you have to take an account in in
[44:23] you have to take an account in in designing those kind of
[44:24] designing those kind of twitches in terms of a packaging
[44:27] twitches in terms of a packaging perspective
[44:28] perspective of course um and what can i
[44:32] of course um and what can i mention more currently our main goal is
[44:36] mention more currently our main goal is to use
[44:37] to use four lambda uh basically we will
[44:41] four lambda uh basically we will grab on on standard that becomes
[44:43] grab on on standard that becomes standard
[44:44] standard for four planes this slide are you
[44:46] for four planes this slide are you referring uh
[44:47] referring uh yeah exactly exactly so um you know just
[44:51] yeah exactly exactly so um you know just curious how far along that project is
[44:53] curious how far along that project is and
[44:54] and and what um you know it perhaps if you
[44:56] and what um you know it perhaps if you could say
[44:57] could say anything else about the customer or i i
[45:00] anything else about the customer or i i i cannot disclose much i'm sorry
[45:03] i cannot disclose much i'm sorry currently but we're working uh with many
[45:04] currently but we're working uh with many customers on
[45:05] customers on kind of application uh we also work on
[45:08] kind of application uh we also work on those uh application of
[45:10] those uh application of optics in mission learning and ai
[45:13] optics in mission learning and ai there's a lot of people interested in
[45:17] there's a lot of people interested in photonic ai so we're have a lot of work
[45:20] photonic ai so we're have a lot of work in that
[45:22] in that but for this cpu package
[45:26] but for this cpu package this slide was mostly uh listing all the
[45:29] this slide was mostly uh listing all the consideration and
[45:30] consideration and it was mostly in phasing that the number
[45:32] it was mostly in phasing that the number of fibers
[45:33] of fibers optical fiber needed is quite huge in
[45:35] optical fiber needed is quite huge in those kind of product
[45:37] those kind of product because even with splitting the laser
[45:40] because even with splitting the laser and multiplexing four lambdas you still
[45:43] and multiplexing four lambdas you still need
[45:44] need over 300 fibers so this is where
[45:47] over 300 fibers so this is where scalability and doing multiple
[45:48] scalability and doing multiple collection of five at the time and doing
[45:50] collection of five at the time and doing those fiber array assembly
[45:52] those fiber array assembly is really really important and it's a
[45:55] is really really important and it's a game changer
[45:56] game changer and we also have solutions to include pm
[45:58] and we also have solutions to include pm fibers inside the
[46:00] fibers inside the arrays so we can
[46:03] arrays so we can very very easily assemble fibers in the
[46:06] very very easily assemble fibers in the same manner
[46:07] same manner since they're already pre-clocked and
[46:08] since they're already pre-clocked and pre-aligned within the specific
[46:11] pre-aligned within the specific excellent do you have already any data
[46:14] excellent do you have already any data supporting
[46:15] supporting reflow compatibility for the b group
[46:17] reflow compatibility for the b group based fiber attached solutions
[46:19] based fiber attached solutions or is there any possibility that you'll
[46:22] or is there any possibility that you'll find a suitable epoxy
[46:24] find a suitable epoxy yes we have we have demonstrated a
[46:26] yes we have we have demonstrated a reflow wall
[46:28] reflow wall we even demonstrated reflectability on
[46:30] we even demonstrated reflectability on the full
[46:31] the full flip chip module so the complete
[46:34] flip chip module so the complete assembly not only the fiber attack but
[46:36] assembly not only the fiber attack but the
[46:36] the with the pick in inside the package with
[46:39] with the pick in inside the package with the
[46:39] the flip chip photonic chip was reflow
[46:43] flip chip photonic chip was reflow compatible the main problem with is
[46:46] compatible the main problem with is this is the ferrule so currently our
[46:48] this is the ferrule so currently our solution is to have longer pigtails
[46:50] solution is to have longer pigtails and protect the ferrule from the heat
[46:52] and protect the ferrule from the heat because it can support some heat but not
[46:54] because it can support some heat but not too much
[46:55] too much so this is our main solution we work
[46:58] so this is our main solution we work with uh
[46:58] with uh suppliers to have and we're evaluating
[47:01] suppliers to have and we're evaluating evaluating
[47:02] evaluating many uh vendors for reformable career in
[47:06] many uh vendors for reformable career in in we have some candidate but they're
[47:09] in we have some candidate but they're not
[47:10] not illiterate they're more like a standard
[47:12] illiterate they're more like a standard lost payroll
[47:13] lost payroll so so yeah the solder refill has been
[47:16] so so yeah the solder refill has been demonstrated for a fiber attach
[47:18] demonstrated for a fiber attach it is also demonstrated for full
[47:20] it is also demonstrated for full assembly with a co-package
[47:23] assembly with a co-package photonic chip so it is demonstration the
[47:25] photonic chip so it is demonstration the main problem that is missing is
[47:26] main problem that is missing is having the the pharaoh that has sold the
[47:29] having the the pharaoh that has sold the repo compatible
[47:30] repo compatible and currently we are protecting them or
[47:32] and currently we are protecting them or doing direct heating
[47:34] doing direct heating and other strategies and basically
[47:36] and other strategies and basically protecting the pharaoh from the heat
[47:38] protecting the pharaoh from the heat this is our trend is there a baud rate
[47:41] this is our trend is there a baud rate at which coherent becomes
[47:43] at which coherent becomes more efficient than direct
[47:46] more efficient than direct direct detect the main advantage in
[47:49] direct detect the main advantage in current
[47:50] current is because you can put more samples so
[47:51] is because you can put more samples so the bandwidth reached
[47:53] the bandwidth reached metric is is is huge you can send a lot
[47:56] metric is is is huge you can send a lot a lot of data
[47:58] a lot of data so so there is some advantage uh we will
[48:01] so so there is some advantage uh we will see how
[48:02] see how the market apparently the direct detect
[48:04] the market apparently the direct detect is it can
[48:05] is it can be faster it will have a lower latency
[48:07] be faster it will have a lower latency than having
[48:08] than having uh the complex signal processing in the
[48:11] uh the complex signal processing in the recovery of the stable
[48:12] recovery of the stable current aquaponics but i believe as the
[48:15] current aquaponics but i believe as the the bandwidth need will will increase in
[48:17] the bandwidth need will will increase in the future
[48:18] the future uh coherent might take more and more
[48:21] uh coherent might take more and more place
[48:22] place inside that we will see okay
[48:25] inside that we will see okay um another thermal question is the empty
[48:29] um another thermal question is the empty ferrule reflow compatible 260c
[48:32] ferrule reflow compatible 260c and this refers to your 2019 photonic
[48:35] and this refers to your 2019 photonic west paper
[48:36] west paper that uh our audience members saw yeah
[48:40] that uh our audience members saw yeah we we did a lot of work but uh we don't
[48:43] we we did a lot of work but uh we don't have elite grade
[48:44] have elite grade feral so we only have uh
[48:47] feral so we only have uh more standard grade and and as we can if
[48:50] more standard grade and and as we can if we have steam
[48:52] we have steam for example the one by eight payroll was
[48:54] for example the one by eight payroll was quite good but when you try to do one by
[48:56] quite good but when you try to do one by twelve
[48:57] twelve the the exterior fiber were a little bit
[49:00] the the exterior fiber were a little bit worse so so no they're reformable feral
[49:03] worse so so no they're reformable feral not
[49:04] not already in the industry not for the mt
[49:06] already in the industry not for the mt uh they exist for lc but not for uh
[49:09] uh they exist for lc but not for uh in the single mode that's that's the
[49:10] in the single mode that's that's the other thing reflectable
[49:12] other thing reflectable and single mode together so yeah so we
[49:15] and single mode together so yeah so we we
[49:16] we we hope because it it change how you can
[49:18] we hope because it it change how you can integrate your optics and
[49:20] integrate your optics and assemble your device and it gives you a
[49:23] assemble your device and it gives you a lot of
[49:24] lot of uh integration shame if you can support
[49:29] okay great um
[49:33] another thermal question here and
[49:35] another thermal question here and implications for your
[49:36] implications for your the packaging and whether you've thought
[49:39] the packaging and whether you've thought about
[49:40] about liquid emergent technologies would you
[49:42] liquid emergent technologies would you be able to take these kind of packages
[49:44] be able to take these kind of packages and put them in there yeah like the
[49:46] and put them in there yeah like the electric
[49:47] electric liquid to thermal yes we have a with the
[49:50] liquid to thermal yes we have a with the i don't know what i can say we have a
[49:52] i don't know what i can say we have a project with the new university on that
[49:55] project with the new university on that and i know that their ibm is working on
[49:58] and i know that their ibm is working on that
[49:58] that and i cannot go as much okay um
[50:02] and i cannot go as much okay um regarding pm access alignment how it
[50:05] regarding pm access alignment how it can be made to a pm fiber array how is
[50:08] can be made to a pm fiber array how is that done
[50:09] that done yeah so currently basically they're
[50:12] yeah so currently basically they're clocking the
[50:12] clocking the pm at the top portion the one in the
[50:15] pm at the top portion the one in the empty
[50:16] empty and one closest to the uh fiber attack
[50:19] and one closest to the uh fiber attack so basically you will have a holder that
[50:21] so basically you will have a holder that will
[50:22] will keep the clocking of the pm uh
[50:25] keep the clocking of the pm uh at the v-groove assembly side and we are
[50:28] at the v-groove assembly side and we are able to
[50:29] able to monitor up to a three-degree uh
[50:32] monitor up to a three-degree uh configuration so it's a 20 db
[50:34] configuration so it's a 20 db expansion ratio between the polarization
[50:37] expansion ratio between the polarization and
[50:38] and of course we do have a feed contact with
[50:40] of course we do have a feed contact with the
[50:41] the active alignment so we can do uh am
[50:44] active alignment so we can do uh am clocking to point zero
[50:45] clocking to point zero those are one degree for extremely high
[50:48] those are one degree for extremely high uh pm upping and things like that
[50:50] uh pm upping and things like that so because there are some products that
[50:52] so because there are some products that need very very high
[50:54] need very very high but the main strategy for the v-groove
[50:56] but the main strategy for the v-groove is have them
[50:57] is have them pre-clock at both sides at the empty and
[51:00] pre-clock at both sides at the empty and at the
[51:00] at the fiber uh v-groove at that side and
[51:05] fiber uh v-groove at that side and clock and lock and plate so it's very
[51:07] clock and lock and plate so it's very compatible with her
[51:08] compatible with her family's profit it's like a regular
[51:10] family's profit it's like a regular fiber because it's already pricked up
[51:13] fiber because it's already pricked up okay great two more quick fiber
[51:15] okay great two more quick fiber questions here and then we'll
[51:16] questions here and then we'll jump over and give some to vikkas so um
[51:19] jump over and give some to vikkas so um regarding the 80 micron fiber
[51:23] regarding the 80 micron fiber needs could you comment on bend radius
[51:28] needs could you comment on bend radius ideal od and bend radius yeah in fact
[51:31] ideal od and bend radius yeah in fact there's there are fibers with
[51:34] there's there are fibers with lower band loss or zero band loss
[51:37] lower band loss or zero band loss typically the main strategy is to reduce
[51:39] typically the main strategy is to reduce the
[51:39] the the force uh the mode field so having uh
[51:42] the force uh the mode field so having uh a more con
[51:43] a more con microfiber the main advantage is the
[51:46] microfiber the main advantage is the density you can put on your
[51:48] density you can put on your amazing because even 250 microphone
[51:51] amazing because even 250 microphone uh pit or the optical fiber take a lot
[51:55] uh pit or the optical fiber take a lot a lot of space on the on the picture
[51:58] a lot of space on the on the picture and we need some space also to have all
[52:00] and we need some space also to have all those under fill feel it
[52:02] those under fill feel it and all those bleed out uh in adhesive
[52:06] and all those bleed out uh in adhesive states on the chip so this takes a lot
[52:08] states on the chip so this takes a lot of the real estate
[52:09] of the real estate if we can scale uh smaller fibers we can
[52:13] if we can scale uh smaller fibers we can have tensor pitch
[52:14] have tensor pitch we'll take less real estates we will be
[52:16] we'll take less real estates we will be able to
[52:17] able to include more fiber uh power bleach front
[52:20] include more fiber uh power bleach front of the chip
[52:21] of the chip so uh i know uh i know we're working on
[52:25] so uh i know uh i know we're working on eating my own i know global countries
[52:26] eating my own i know global countries are
[52:26] are are offered them eventually
[52:30] are offered them eventually and i know we will see them so uh we are
[52:32] and i know we will see them so uh we are very excited of those
[52:33] very excited of those smartphones but it's starting i know you
[52:36] smartphones but it's starting i know you had this slide
[52:37] had this slide showing um you know things that you
[52:39] showing um you know things that you wanted from
[52:40] wanted from from the fiber side yeah
[52:43] from the fiber side yeah yeah um so in terms of the fiber array
[52:46] yeah um so in terms of the fiber array coupling versus polymer waveguides
[52:49] coupling versus polymer waveguides which is preferred in the mechanical
[52:51] which is preferred in the mechanical robustness
[52:53] robustness and optical characteristics so so the
[52:56] and optical characteristics so so the v-groove currently is our front-runner
[52:57] v-groove currently is our front-runner because global foundry is really
[52:59] because global foundry is really really mature uh
[53:03] it's it's we're ready for production
[53:05] it's it's we're ready for production basically uh
[53:06] basically uh at this point and uh and it's very very
[53:09] at this point and uh and it's very very processed we do
[53:10] processed we do that day-to-day basis uh doing those
[53:13] that day-to-day basis uh doing those kind of fiber attach and
[53:14] kind of fiber attach and really you will use the hardware so it's
[53:17] really you will use the hardware so it's a really mature technology
[53:18] a really mature technology we see the polymer maybe further down
[53:20] we see the polymer maybe further down the wall where when the dent the
[53:22] the wall where when the dent the the density of the i o port will be
[53:24] the density of the i o port will be higher uh
[53:25] higher uh and there's some application that needs
[53:27] and there's some application that needs for example chip to chip
[53:29] for example chip to chip uh communication might need uh
[53:33] uh communication might need uh some kind of uh polymer waveguide this
[53:35] some kind of uh polymer waveguide this kind of
[53:36] kind of coupling technology may have some
[53:38] coupling technology may have some advantage
[53:39] advantage so the polymer is really there where a
[53:41] so the polymer is really there where a higher density higher bandwidth is
[53:43] higher density higher bandwidth is needed
[53:44] needed that further down the path
[53:47] that further down the path and we're currently doing this the
[53:49] and we're currently doing this the functional demo
[53:51] functional demo at imf so we're very excited about that
[53:53] at imf so we're very excited about that andrew will be offered so
[53:55] andrew will be offered so you will be able to
[53:58] okay great thank you i know we're coming
[54:01] okay great thank you i know we're coming up
[54:02] up soon to the top of the hour but we will
[54:04] soon to the top of the hour but we will be extending this session to
[54:06] be extending this session to take as many of the questions as we can
[54:09] take as many of the questions as we can so vickis this one goes to you about the
[54:12] so vickis this one goes to you about the global foundry's roadmap slide
[54:14] global foundry's roadmap slide and uh maybe you can also see some of
[54:17] and uh maybe you can also see some of our
[54:18] our um poll results by this time
[54:21] um poll results by this time so the question is about different
[54:23] so the question is about different market segments for
[54:25] market segments for for uh silicon photonics technology
[54:28] for uh silicon photonics technology could you comment on that and time
[54:30] could you comment on that and time frames
[54:32] frames yeah so i think you know uh as i
[54:34] yeah so i think you know uh as i mentioned we right now have
[54:36] mentioned we right now have two technologies the 19wg and 45clo
[54:41] two technologies the 19wg and 45clo the idea is to start off with these high
[54:43] the idea is to start off with these high volume market segments to establish
[54:45] volume market segments to establish sort of a beachhead if you want to call
[54:47] sort of a beachhead if you want to call it that and
[54:49] it that and use that sort of base technology to
[54:52] use that sort of base technology to address
[54:52] address other market segments like photonic
[54:55] other market segments like photonic computing
[54:56] computing time of light sensors and automotive
[54:58] time of light sensors and automotive lidar
[54:59] lidar there is always you know as the industry
[55:02] there is always you know as the industry matures
[55:04] matures and uh there are needs for higher data
[55:07] and uh there are needs for higher data rates and silicon photonics starts to
[55:09] rates and silicon photonics starts to enter
[55:09] enter other applications uh we will continue
[55:13] other applications uh we will continue to expand our roadmap and i think
[55:15] to expand our roadmap and i think from from a foundry uh
[55:18] from from a foundry uh perspective the idea is to use sort of
[55:21] perspective the idea is to use sort of the base technology and if it requires
[55:23] the base technology and if it requires add you know more silicon nitride layers
[55:26] add you know more silicon nitride layers uh different ways of coupling uh so
[55:29] uh different ways of coupling uh so again the roadmap is a living sort of uh
[55:33] again the roadmap is a living sort of uh living aspect of any foundry and the
[55:36] living aspect of any foundry and the intention is to start
[55:37] intention is to start with the base you know try to get the
[55:40] with the base you know try to get the the market addressed
[55:41] the market addressed through a vibrant technology
[55:44] through a vibrant technology and then as this expands into additional
[55:47] and then as this expands into additional markets
[55:48] markets uh understand those requirements and
[55:50] uh understand those requirements and sort of include it on the base
[55:52] sort of include it on the base so i think on the on the top right it's
[55:55] so i think on the on the top right it's a bit of an
[55:55] a bit of an eye chart uh but i have sort of given uh
[55:59] eye chart uh but i have sort of given uh you know a view of things that we are
[56:02] you know a view of things that we are thinking of
[56:03] thinking of uh with respect to you know a road map
[56:06] uh with respect to you know a road map so we start off with a base
[56:08] so we start off with a base uh photonics technology maybe address o
[56:10] uh photonics technology maybe address o band
[56:11] band uh next address c band uh further going
[56:14] uh next address c band uh further going out into l
[56:15] out into l band and then also you know to the point
[56:17] band and then also you know to the point that that
[56:18] that that alexander was making uh for for these
[56:21] alexander was making uh for for these technologies to be compatible with
[56:24] technologies to be compatible with uh you know higher density fiber rays
[56:27] uh you know higher density fiber rays there's this need of making the
[56:30] there's this need of making the v-grooves
[56:31] v-grooves you know at a tighter pitch so those are
[56:33] you know at a tighter pitch so those are aspects of
[56:34] aspects of you know any road map any foundry
[56:36] you know any road map any foundry whether it's microelectronics or
[56:37] whether it's microelectronics or photonics
[56:38] photonics uh we have to keep you know keep on top
[56:41] uh we have to keep you know keep on top of and we will
[56:42] of and we will okay um it'd be interesting at this
[56:46] okay um it'd be interesting at this point
[56:46] point to see some of the results of our poll
[56:49] to see some of the results of our poll um julian do you have those results here
[56:51] um julian do you have those results here we go
[56:53] we go so vikis what do you think um does this
[56:56] so vikis what do you think um does this kind of align with uh the global
[56:58] kind of align with uh the global foundry
[57:02] yeah so i think you know i had
[57:03] yeah so i think you know i had specifically asked for you know like
[57:05] specifically asked for you know like sort of production
[57:07] sort of production uh in the first question hopefully
[57:10] uh in the first question hopefully everybody
[57:10] everybody sort of uh got got that nuance and i i
[57:14] sort of uh got got that nuance and i i think this is this is
[57:16] think this is this is unexpected uh sort of a result and then
[57:19] unexpected uh sort of a result and then for the second one
[57:20] for the second one again i i think it sort of reflects and
[57:23] again i i think it sort of reflects and it sort of validates the global foundry
[57:25] it sort of validates the global foundry strategy where you can see
[57:26] strategy where you can see that a significant amount of application
[57:29] that a significant amount of application on silicon photonics
[57:30] on silicon photonics is with the data com uh you know
[57:34] is with the data com uh you know data com in industry more specifically i
[57:37] data com in industry more specifically i would say
[57:38] would say uh you know sort of the within the data
[57:39] uh you know sort of the within the data center market idc market which is
[57:42] center market idc market which is which is the one sort of dominating on
[57:44] which is the one sort of dominating on silicon photonic side
[57:45] silicon photonic side and then you know with respect to lidar
[57:49] and then you know with respect to lidar that is what i was referring to as
[57:50] that is what i was referring to as technologies where silicon photonics
[57:53] technologies where silicon photonics is going to enter in a big way
[57:56] is going to enter in a big way but it's just one of those technologies
[57:58] but it's just one of those technologies which has a long gestational period
[58:01] which has a long gestational period just because of automotive qualification
[58:03] just because of automotive qualification requirements
[58:04] requirements and and the sort of aid as industry
[58:07] and and the sort of aid as industry itself
[58:08] itself uh so that will take some time so these
[58:10] uh so that will take some time so these results are actually
[58:12] results are actually they sort of validate uh the strategy
[58:15] they sort of validate uh the strategy and it gives the the global foundry
[58:18] and it gives the the global foundry strategy credence
[58:20] strategy credence uh to what we're doing so i think the
[58:22] uh to what we're doing so i think the next question probably ties right into
[58:24] next question probably ties right into this
[58:25] this and and that's to talk about the yield
[58:28] and and that's to talk about the yield and
[58:28] and you know the expected yield that you
[58:29] you know the expected yield that you might be seeing and whether
[58:31] might be seeing and whether whether that is in fact the driver for
[58:34] whether that is in fact the driver for the data center interconnect
[58:36] the data center interconnect business is it because the yield
[58:38] business is it because the yield improves so much that it becomes
[58:39] improves so much that it becomes attractive in this segment
[58:42] attractive in this segment so it's it's actually not just the yield
[58:44] so it's it's actually not just the yield it is it is the
[58:46] it is it is the the higher levels of integration the
[58:49] the higher levels of integration the fact that you know i had mentioned
[58:51] fact that you know i had mentioned when we were talking about some of the
[58:52] when we were talking about some of the features of 45 the fact that we have
[58:54] features of 45 the fact that we have grading couplers
[58:56] grading couplers a lot of the tests can be done at wafer
[58:58] a lot of the tests can be done at wafer level so you actually
[59:00] level so you actually through that it implies you will
[59:01] through that it implies you will probably get better yield
[59:03] probably get better yield but there's a lot of uh integration work
[59:07] but there's a lot of uh integration work that can be done that way for level uh a
[59:09] that can be done that way for level uh a lot of the laser attacks can be done in
[59:11] lot of the laser attacks can be done in laser
[59:11] laser at wafer level the die attacks can be
[59:13] at wafer level the die attacks can be done so
[59:14] done so you're basically scaling out uh
[59:18] you're basically scaling out uh packaging to sort of micro electronics
[59:20] packaging to sort of micro electronics type of
[59:21] type of levels and i think alexander sort of
[59:23] levels and i think alexander sort of referred to that
[59:24] referred to that that i think the the goal of this
[59:27] that i think the the goal of this industry to make it a viable
[59:29] industry to make it a viable solution is to sort of
[59:33] solution is to sort of address sort of the osa solution rather
[59:35] address sort of the osa solution rather than coming up with very unique
[59:37] than coming up with very unique and custom solutions with respect to
[59:39] and custom solutions with respect to packaging
[59:40] packaging uh try to sort of shoehorn it into an
[59:43] uh try to sort of shoehorn it into an ecosystem which already exists around
[59:45] ecosystem which already exists around microelectronics so i think it's a
[59:46] microelectronics so i think it's a so so there are some of the things which
[59:48] so so there are some of the things which are being put in place which will help
[59:50] are being put in place which will help with the yield
[59:51] with the yield uh but a lot of it is also just because
[59:53] uh but a lot of it is also just because the wafer scale
[59:55] the wafer scale uh and the ecosystem that you are sort
[59:57] uh and the ecosystem that you are sort of fundamentally changing
[59:59] of fundamentally changing uh you know versus these hand-picked
[01:00:01] uh you know versus these hand-picked modules and trying to do
[01:00:03] modules and trying to do a lot of automation around packaging and
[01:00:06] a lot of automation around packaging and testing
[01:00:07] testing could you talk about the laser
[01:00:08] could you talk about the laser attachment on silicon the
[01:00:10] attachment on silicon the yield um did you see there so
[01:00:14] yield um did you see there so so yeah so that is that is sort of uh
[01:00:17] so yeah so that is that is sort of uh a program that we are driving pretty
[01:00:19] a program that we are driving pretty hard uh
[01:00:21] hard uh again i i can talk talk about it in more
[01:00:24] again i i can talk talk about it in more details one
[01:00:25] details one once you know a particular customer is
[01:00:27] once you know a particular customer is interested and
[01:00:28] interested and and wants to use a technology but it
[01:00:30] and wants to use a technology but it should be ready for prototyping
[01:00:33] should be ready for prototyping uh you know before the end of the year
[01:00:35] uh you know before the end of the year okay
[01:00:36] okay let me uh toss the same question over to
[01:00:38] let me uh toss the same question over to alexander um to
[01:00:40] alexander um to if you could you know comment a bit on
[01:00:43] if you could you know comment a bit on yield um that you see it
[01:00:47] yield um that you see it for fiber attachment
[01:00:51] yeah so so we have a fiber attach that's
[01:00:53] yeah so so we have a fiber attach that's a very very good
[01:00:55] a very very good yield of course currently we are more
[01:00:58] yield of course currently we are more like
[01:00:59] like inspecting all our components and we're
[01:01:01] inspecting all our components and we're doing more verification than usual
[01:01:03] doing more verification than usual because
[01:01:04] because we're still in the like development
[01:01:06] we're still in the like development phase of this program
[01:01:08] phase of this program so eventually we will have uh more like
[01:01:12] so eventually we will have uh more like um
[01:01:14] we have limited data because we only did
[01:01:17] we have limited data because we only did like 100 parts
[01:01:19] like 100 parts i would love to see like 1000 or million
[01:01:21] i would love to see like 1000 or million of those parts built before
[01:01:24] of those parts built before be able to disclaim those real yields
[01:01:27] be able to disclaim those real yields because this is a very
[01:01:28] because this is a very new technology so currently what we see
[01:01:31] new technology so currently what we see is we are able to package and assemble
[01:01:34] is we are able to package and assemble global foundry diets we are able to do
[01:01:37] global foundry diets we are able to do platonic with them
[01:01:38] platonic with them and we are able to to yield them quite
[01:01:41] and we are able to to yield them quite good
[01:01:42] good so we're very excited but uh we i we
[01:01:45] so we're very excited but uh we i we don't have enough
[01:01:46] don't have enough enough data at this stage
[01:01:49] enough data at this stage to be able to i say
[01:01:53] to be able to i say commit to a yield uh we choose to we
[01:01:56] commit to a yield uh we choose to we need to have the the design fix and some
[01:02:00] need to have the the design fix and some some experience on the on the volumes
[01:02:04] some experience on the on the volumes initially okay um
[01:02:07] initially okay um here's a one audience member who asked
[01:02:10] here's a one audience member who asked me
[01:02:11] me how do you do the self-alignment of the
[01:02:13] how do you do the self-alignment of the compliant polymer interface
[01:02:16] compliant polymer interface oh we're using the same self-alignment
[01:02:18] oh we're using the same self-alignment technique so basically we're having
[01:02:20] technique so basically we're having on the polymer we have some ridges that
[01:02:23] on the polymer we have some ridges that are
[01:02:24] are because polymer is photo little
[01:02:26] because polymer is photo little geographically
[01:02:27] geographically defined for the wave guides and those
[01:02:29] defined for the wave guides and those ridges and basically we have some
[01:02:32] ridges and basically we have some some little very very uh small
[01:02:35] some little very very uh small right etch less than 15 micron depth
[01:02:39] right etch less than 15 micron depth and the ridge will fall inside those uh
[01:02:42] and the ridge will fall inside those uh it will perform the self-alignment in
[01:02:44] it will perform the self-alignment in the cast of the adiabatic polymer
[01:02:46] the cast of the adiabatic polymer we can have up to 10 or 2 microns offset
[01:02:50] we can have up to 10 or 2 microns offset between the polymer waveguide
[01:02:52] between the polymer waveguide and the photonic nanowire because the
[01:02:55] and the photonic nanowire because the polymer way guys is so huge compared to
[01:02:57] polymer way guys is so huge compared to the
[01:02:58] the so we're doing self alignment at the
[01:03:00] so we're doing self alignment at the pick and also we're doing
[01:03:02] pick and also we're doing self-alignment from the polymer to the
[01:03:04] self-alignment from the polymer to the spiral of the polymer
[01:03:07] spiral of the polymer okay okay um a question
[01:03:10] okay okay um a question pigtails versus optical connectors um
[01:03:14] pigtails versus optical connectors um which which way do you see it becoming
[01:03:15] which which way do you see it becoming the main trend
[01:03:18] the main trend this is a this is a good uh question uh
[01:03:21] this is a this is a good uh question uh it does have some advantages if you have
[01:03:23] it does have some advantages if you have them long enough you can
[01:03:25] them long enough you can reply or resplice a new connector if one
[01:03:28] reply or resplice a new connector if one is faulty
[01:03:29] is faulty like that but in terms of manufacturing
[01:03:32] like that but in terms of manufacturing uh i can tell you about the spaghetti
[01:03:34] uh i can tell you about the spaghetti syndrome
[01:03:35] syndrome and all the issues that can have those
[01:03:38] and all the issues that can have those long pigtails and you have to manage
[01:03:39] long pigtails and you have to manage them inside the tray
[01:03:41] them inside the tray replace your empty so it's when you
[01:03:44] replace your empty so it's when you you you dock your tray you connect
[01:03:47] you you dock your tray you connect the optical connector connect and you're
[01:03:48] the optical connector connect and you're able to test the device so there's
[01:03:50] able to test the device so there's there's many advantages of having those
[01:03:52] there's many advantages of having those embedded connectors
[01:03:53] embedded connectors uh but currently having like a
[01:03:58] uh but currently having like a picture is more vanilla for our process
[01:04:02] picture is more vanilla for our process but we are working on this connector
[01:04:04] but we are working on this connector currently our connector integrated
[01:04:06] currently our connector integrated connector
[01:04:07] connector is working but it's not reflowable
[01:04:08] is working but it's not reflowable compatible uh our main strategy
[01:04:11] compatible uh our main strategy and i can disclose because we have a ip
[01:04:13] and i can disclose because we have a ip protecting it basically we we're using a
[01:04:15] protecting it basically we we're using a uh we're bending the fiber inside the
[01:04:17] uh we're bending the fiber inside the connector so
[01:04:18] connector so basically we'll create a radius of
[01:04:21] basically we'll create a radius of curvature a kind of
[01:04:22] curvature a kind of lip of the of the fiber so
[01:04:25] lip of the of the fiber so the the the fiber with the sticky chains
[01:04:28] the the the fiber with the sticky chains of the package with the thermal cycling
[01:04:30] of the package with the thermal cycling or the reflow
[01:04:31] or the reflow or the the the bending the
[01:04:34] or the the the bending the fiber little fiber bending this ready
[01:04:36] fiber little fiber bending this ready change will accommodate the sticky
[01:04:38] change will accommodate the sticky mismatch that occur inside the package
[01:04:41] mismatch that occur inside the package and we're working on that
[01:04:43] and we're working on that and we hope publish some results
[01:04:46] and we hope publish some results next year
[01:04:49] excellent back to vickis could you talk
[01:04:53] excellent back to vickis could you talk about wafer testing of picks
[01:04:56] about wafer testing of picks how do your designs permit such way for
[01:04:59] how do your designs permit such way for testing
[01:05:01] so we have uh as i was mentioning
[01:05:04] so we have uh as i was mentioning uh you know the standard way as
[01:05:08] uh you know the standard way as alexander was talking about of doing
[01:05:10] alexander was talking about of doing sort of light in light out you can
[01:05:12] sort of light in light out you can either put you know
[01:05:13] either put you know laser on the pick or or
[01:05:16] laser on the pick or or have v-groove interfaces to your fiber
[01:05:19] have v-groove interfaces to your fiber but again
[01:05:21] but again the fiber attach is done at the dye
[01:05:23] the fiber attach is done at the dye level in order to do wafer level testing
[01:05:26] level in order to do wafer level testing uh we do have an ability of doing
[01:05:29] uh we do have an ability of doing electro optical testing on the wafer uh
[01:05:32] electro optical testing on the wafer uh there's a sort of a specific pad cage
[01:05:35] there's a sort of a specific pad cage uh that we sort of offer customers
[01:05:38] uh that we sort of offer customers which are grating couplers for
[01:05:40] which are grating couplers for interfacing the light
[01:05:42] interfacing the light and and we can do uh you know the
[01:05:44] and and we can do uh you know the testing of these structures
[01:05:46] testing of these structures at wafer level and so we can actually
[01:05:48] at wafer level and so we can actually we're able to generate
[01:05:50] we're able to generate almost similar to on the microelectronic
[01:05:53] almost similar to on the microelectronic side where
[01:05:53] side where where foundries offer you know wafer
[01:05:56] where foundries offer you know wafer acceptance
[01:05:57] acceptance criteria and our list of parameters we
[01:06:00] criteria and our list of parameters we can offer
[01:06:01] can offer similar sort of services
[01:06:04] similar sort of services uh on on photonic components where you
[01:06:07] uh on on photonic components where you know
[01:06:07] know as part of the pad cage you can draw cut
[01:06:10] as part of the pad cage you can draw cut back structures
[01:06:11] back structures in your gds and we can fabricate them
[01:06:15] in your gds and we can fabricate them okay um another question for you you had
[01:06:19] okay um another question for you you had a slide that showed
[01:06:20] a slide that showed or compared indium phosphide versus
[01:06:23] or compared indium phosphide versus silicon photonics
[01:06:25] silicon photonics what's stopping indium phosphide to be
[01:06:27] what's stopping indium phosphide to be co-packaged with
[01:06:29] co-packaged with high-powered asics is it a lack of the
[01:06:32] high-powered asics is it a lack of the monolithic thermoelectric coolers
[01:06:36] monolithic thermoelectric coolers so so it is it is it is partly the scale
[01:06:40] so so it is it is it is partly the scale you know just
[01:06:41] you know just uh we're talking about for example a 300
[01:06:44] uh we're talking about for example a 300 millimeter wafer
[01:06:46] millimeter wafer of silicon versus you know maybe two
[01:06:48] of silicon versus you know maybe two inch three inch wafers of indian
[01:06:50] inch three inch wafers of indian phosphide
[01:06:51] phosphide uh then there is a lot of the complexity
[01:06:53] uh then there is a lot of the complexity associated with driver circuits
[01:06:56] associated with driver circuits uh for earphosphate lasers and
[01:06:58] uh for earphosphate lasers and modulators
[01:06:59] modulators so a lot of it is when you look at for
[01:07:02] so a lot of it is when you look at for example
[01:07:03] example the chart that alexander showed which uh
[01:07:06] the chart that alexander showed which uh with the number of you know the photonic
[01:07:08] with the number of you know the photonic engine surrounding
[01:07:10] engine surrounding uh your asic you start to realize how
[01:07:13] uh your asic you start to realize how compact
[01:07:14] compact uh that that space is and
[01:07:17] uh that that space is and higher levels of integration will always
[01:07:20] higher levels of integration will always get you there quicker
[01:07:21] get you there quicker so i think uh india fast right of the
[01:07:24] so i think uh india fast right of the material may be superior but
[01:07:26] material may be superior but i think the the integration aspects of
[01:07:29] i think the the integration aspects of silicon photonics
[01:07:31] silicon photonics sort of help with that aspect
[01:07:35] sort of help with that aspect okay alexander um
[01:07:38] okay alexander um ibm demonstrated both direct v-groove
[01:07:41] ibm demonstrated both direct v-groove fiber
[01:07:42] fiber types as well as polymer interface type
[01:07:44] types as well as polymer interface type connectors
[01:07:45] connectors which one do you think the industry will
[01:07:47] which one do you think the industry will adopt
[01:07:50] uh both but at the very
[01:07:55] the s technology from global foundries
[01:07:57] the s technology from global foundries uh
[01:07:58] uh will ramp up a significant significantly
[01:08:01] will ramp up a significant significantly uh and because the technology is very
[01:08:03] uh and because the technology is very mature and what global foundry is doing
[01:08:05] mature and what global foundry is doing with the chip is very very good
[01:08:07] with the chip is very very good and they have a lot of very good photo
[01:08:09] and they have a lot of very good photo detector rate or
[01:08:11] detector rate or crazy the waveguide loss are very very
[01:08:13] crazy the waveguide loss are very very good when you look at
[01:08:14] good when you look at the global picture global fundraising
[01:08:16] the global picture global fundraising trips are very very there
[01:08:18] trips are very very there uh it it it's really great and it when
[01:08:20] uh it it it's really great and it when you do the
[01:08:21] you do the right packaging with the right osat
[01:08:25] right packaging with the right osat it can be very interesting uh so i
[01:08:27] it can be very interesting uh so i believe the v-groove
[01:08:28] believe the v-groove will be uh will emerge first and it will
[01:08:31] will be uh will emerge first and it will grow
[01:08:32] grow and the polymer will catch later when
[01:08:35] and the polymer will catch later when the
[01:08:35] the denser application or maybe some
[01:08:38] denser application or maybe some some people that imf uh want to spin out
[01:08:42] some people that imf uh want to spin out and have
[01:08:42] and have the more a more a polymer i o optical i
[01:08:46] the more a more a polymer i o optical i o
[01:08:46] o uh it might be uh included there but
[01:08:49] uh it might be uh included there but it will be the groove and then print the
[01:08:51] it will be the groove and then print the transition will go to the polymer
[01:08:53] transition will go to the polymer it's my belief i'm not there we will see
[01:08:56] it's my belief i'm not there we will see what the industry will say
[01:08:57] what the industry will say okay how much power savings can you
[01:09:00] okay how much power savings can you achieve compared to plugables
[01:09:03] achieve compared to plugables what about baud rates and signaling uh
[01:09:05] what about baud rates and signaling uh does it have a re-timer or direct
[01:09:08] does it have a re-timer or direct drive yes uh in fact you save a lot
[01:09:12] drive yes uh in fact you save a lot most close to 50 uh when you because
[01:09:16] most close to 50 uh when you because you're losing so much you you
[01:09:19] you're losing so much you you a high speed electrical reaches is
[01:09:22] a high speed electrical reaches is fading so fast
[01:09:24] fading so fast so when you're trying to reach you will
[01:09:25] so when you're trying to reach you will have those retirement it will
[01:09:27] have those retirement it will drag a lot of power so
[01:09:30] drag a lot of power so when you have those high speeds signals
[01:09:33] when you have those high speeds signals you have to have very close reach
[01:09:35] you have to have very close reach as we have seen so so this is why the
[01:09:38] as we have seen so so this is why the the power management and and we forget
[01:09:41] the power management and and we forget we're forgetting
[01:09:42] we're forgetting all the application that can benefit
[01:09:44] all the application that can benefit benefit having this
[01:09:46] benefit having this high bandwidth optical interconnect
[01:09:48] high bandwidth optical interconnect think about all those machine learning
[01:09:50] think about all those machine learning ai chip that need to learn a tremendous
[01:09:53] ai chip that need to learn a tremendous amount of data
[01:09:54] amount of data how can you feed those terabit of data
[01:09:57] how can you feed those terabit of data to an ai chip we can learn and
[01:09:59] to an ai chip we can learn and train and so those kind of optical
[01:10:03] train and so those kind of optical connection uh will be needed in those
[01:10:06] connection uh will be needed in those kind of applications as well
[01:10:08] kind of applications as well okay here's a question about very high
[01:10:11] okay here's a question about very high count fibers
[01:10:12] count fibers even with ram four four technologies we
[01:10:15] even with ram four four technologies we still need 320 fibers
[01:10:17] still need 320 fibers what's your suggestion on how to manage
[01:10:20] what's your suggestion on how to manage those fibers
[01:10:22] those fibers yeah fiber management is is very touchy
[01:10:26] yeah fiber management is is very touchy and having all those pigtails and how
[01:10:28] and having all those pigtails and how you display them and how you you handle
[01:10:31] you display them and how you you handle the device in the manufacturing process
[01:10:33] the device in the manufacturing process with all those pigtails
[01:10:35] with all those pigtails is very very very difficult uh it
[01:10:38] is very very very difficult uh it brings some challenges so uh yes so high
[01:10:41] brings some challenges so uh yes so high fabric content
[01:10:42] fabric content is really where we shine because of our
[01:10:46] is really where we shine because of our fiber array assembly technology and we
[01:10:49] fiber array assembly technology and we are
[01:10:49] are looking at those uh at those issues and
[01:10:52] looking at those uh at those issues and we
[01:10:52] we have some solution so
[01:10:56] have some solution so but we didn't yet build the the maximum
[01:10:59] but we didn't yet build the the maximum we built was
[01:11:00] we built was 98 fiber so far but we
[01:11:03] 98 fiber so far but we might at the end of this year's the uh
[01:11:05] might at the end of this year's the uh our first 500
[01:11:07] our first 500 fighter so it's very exciting
[01:11:10] fighter so it's very exciting but yes large number of fiber is is an
[01:11:13] but yes large number of fiber is is an issue and i call it the spaghetti
[01:11:16] issue and i call it the spaghetti syndrome
[01:11:17] syndrome yeah so it it's maybe not just a
[01:11:22] yeah so it it's maybe not just a a challenge it's an opportunity as well
[01:11:24] a challenge it's an opportunity as well right because that
[01:11:25] right because that the fiber management is actually where
[01:11:27] the fiber management is actually where this technology will shine
[01:11:29] this technology will shine absolutely yeah yeah yeah so um
[01:11:33] absolutely yeah yeah yeah so um uh vicus um could you talk about the
[01:11:36] uh vicus um could you talk about the global foundry's
[01:11:37] global foundry's silicon photonics pdk is it different
[01:11:41] silicon photonics pdk is it different from a cmos electronics pdk
[01:11:44] from a cmos electronics pdk that's an interesting question so i i'm
[01:11:47] that's an interesting question so i i'm going to answer it in this way so if you
[01:11:48] going to answer it in this way so if you if you
[01:11:50] if you sort of go back to how how people have
[01:11:52] sort of go back to how how people have traditionally done sort of photonic
[01:11:54] traditionally done sort of photonic circuit design
[01:11:55] circuit design you know a lot of times they start off
[01:11:57] you know a lot of times they start off with uh
[01:11:58] with uh some sort of numerical or are soft type
[01:12:01] some sort of numerical or are soft type of simulations where they're simulating
[01:12:02] of simulations where they're simulating the device
[01:12:04] the device and then once you've simulated the
[01:12:05] and then once you've simulated the device uh you're basically placing
[01:12:08] device uh you're basically placing a layout of that structure on your
[01:12:10] a layout of that structure on your circuit and connecting it up with wave
[01:12:12] circuit and connecting it up with wave guides
[01:12:13] guides so i think you know that sort of being
[01:12:15] so i think you know that sort of being the traditional approach but the
[01:12:16] the traditional approach but the downside of that is
[01:12:18] downside of that is that you have to have the designer uh
[01:12:21] that you have to have the designer uh the circuit designer also has to be sort
[01:12:23] the circuit designer also has to be sort of a device designer
[01:12:25] of a device designer and so that has sort of been how you
[01:12:28] and so that has sort of been how you know traditionally
[01:12:29] know traditionally people have laid out you know these
[01:12:31] people have laid out you know these circuits
[01:12:32] circuits from the global foundry side we actually
[01:12:34] from the global foundry side we actually are trying to change the paradigm
[01:12:36] are trying to change the paradigm and and we want to sort of change
[01:12:39] and and we want to sort of change you know follow the same sort of levels
[01:12:41] you know follow the same sort of levels of abstraction
[01:12:43] of abstraction in the microelectronics industry where a
[01:12:45] in the microelectronics industry where a circuit designer doesn't necessarily
[01:12:47] circuit designer doesn't necessarily have to know
[01:12:48] have to know you know the device details they're
[01:12:49] you know the device details they're basically placing out
[01:12:51] basically placing out a symbol of a known characterized device
[01:12:56] a symbol of a known characterized device so i think uh what we are trying to move
[01:12:59] so i think uh what we are trying to move towards
[01:13:00] towards uh from an industry perspective or at
[01:13:02] uh from an industry perspective or at least our pdk perspective
[01:13:04] least our pdk perspective is is put together a pdk
[01:13:07] is is put together a pdk which is almost microelectronics where
[01:13:10] which is almost microelectronics where we have
[01:13:11] we have you know pre-characterized t-cells for a
[01:13:15] you know pre-characterized t-cells for a a customer to be able to actually do
[01:13:17] a customer to be able to actually do schematic based photonic design
[01:13:20] schematic based photonic design uh do sort of lvs checks and
[01:13:23] uh do sort of lvs checks and and uh and sort of work towards a
[01:13:26] and uh and sort of work towards a microelectronics type of circuit design
[01:13:28] microelectronics type of circuit design or photonic components
[01:13:30] or photonic components rather than uh you know just placing
[01:13:33] rather than uh you know just placing structures without
[01:13:34] structures without uh you know having to have the device
[01:13:38] uh you know having to have the device knowledge while place you know building
[01:13:39] knowledge while place you know building these circuits together so
[01:13:41] these circuits together so the the global foundry's pdk has
[01:13:44] the the global foundry's pdk has you know in addition to the sort of the
[01:13:46] you know in addition to the sort of the cmos type of b
[01:13:48] cmos type of b cells uh also have uh photonic
[01:13:51] cells uh also have uh photonic components
[01:13:52] components pre-characterized photonic components if
[01:13:54] pre-characterized photonic components if a customer chooses to use those
[01:13:56] a customer chooses to use those okay excellent well we've certainly had
[01:14:00] okay excellent well we've certainly had just a tremendous number of great
[01:14:02] just a tremendous number of great questions coming in
[01:14:03] questions coming in and unfortunately we're not going to be
[01:14:04] and unfortunately we're not going to be able to get to all of them today but we
[01:14:06] able to get to all of them today but we will try to answer them
[01:14:07] will try to answer them online um and finally i just want to
[01:14:10] online um and finally i just want to thank our our panelist
[01:14:12] thank our our panelist alexander uh thank you for joining us
[01:14:15] alexander uh thank you for joining us today that was
[01:14:15] today that was a you know tremendous amount of
[01:14:18] a you know tremendous amount of information you delivered
[01:14:19] information you delivered and you know i think our audience is
[01:14:21] and you know i think our audience is very appreciative of that
[01:14:23] very appreciative of that and and seen to you vikkas um thank you
[01:14:25] and and seen to you vikkas um thank you so much for joining us
[01:14:28] so much for joining us thank you everybody
[01:14:42] thank you everybody [Music]
[01:14:49] [Music] you

https://www.youtube.com/watch?v=Um9oa6DPq1M

Summary

TL;DR — This webcast discusses the advancements and challenges in silicon photonics co-packaging, focusing on integrating optical and electronic components for next-generation data center and telecom applications. Experts from IBM and GlobalFoundries highlight innovative manufacturing processes, packaging solutions, and the ecosystem required to enable high-volume production.

Key points

• IBM Canada showcases its expertise in advanced semiconductor assembly and test, particularly in co-packaging photonics with ASICs, emphasizing scalable, automated solutions to reduce costs.

• GlobalFoundries details its silicon photonics technologies, including monolithic integration of RF CMOS and photonic components, and advanced packaging solutions like v-grooves and polymer waveguides.

• The discussion covers various integration strategies, from 2.5D packaging to face-to-face configurations, and the critical role of optical coupling methods like v-grooves for high-throughput assembly.

• Challenges such as fiber management, thermal considerations, and the need for standardized connectors are addressed, with ongoing work on solder-reflow compatible components and reduced pitch fibers.

• The importance of a collaborative ecosystem, including research institutions and foundries, is stressed for enabling the transition from prototyping to full-scale manufacturing.

Takeaway — The future of high-performance computing and communications relies heavily on advanced silicon photonics co-packaging, requiring continued innovation in manufacturing, integration, and ecosystem collaboration to achieve scalability and cost-effectiveness.