# S11-E2_Electrical Packaging and Thermal Management

https://www.youtube.com/watch?v=nZpSDOiY45k

[00:03] Okay.
[00:03] Hello everyone.
[00:05] Um, welcome to our webinar series titled introduction to photonix packaging.
[00:08] My name is Mark Renzing and I'm joined by my colleague Camil Gratkowski.
[00:12] So in our first webinar last week uh we provided an introduction to photonix packaging and covered some package design considerations.
[00:14] And in today's webinar we'll discuss electric electrical packaging and thermal management.
[00:20] So today's webinar will last about 40 minutes and we've allocated about 15 minutes at the end for Q&A.
[00:23] So please feel free to ask any questions you have in in the chat or Q&A buttons.
[00:33] Um without further ado, I hand over to Camille to begin the presentation.
[00:39] Okay, good afternoon everybody.
[00:43] Yes.
[00:45] So today we're discussing two topics uh before we go to the clue of the uh of the course which is the optical packaging part.
[00:48] So today electrical packaging and thermal management are kind of related because uh uh you will have the thermal
[01:03] uh uh you will have the thermal management when you're dealing with management when you're dealing with electrical packaging uh by by the nature of things.
[01:07] So it's good that they're kind of co-joined in this in this talk.
[01:12] So looking at electrical packaging, what we have to do is essentially look at the legacy where where we come from because micro electronics has been on the rise ever since we had the first transistor in 1940s.
[01:19] So I've pulled up some examples of just electronic packages from the web.
[01:29] For example, this i486 processor by Intel from 1989.
[01:32] You can see uh the die design on the left.
[01:38] It's a pretty pretty sophisticated even though the processor processing node was of the or of several hundred microns.
[01:44] But what's what's more important from the packaging perspective is that you can see the die itself as it is installed into the package and the uh bond pads are wire bonded across to the package.
[01:59] And note that all the wire bonds and all the bond pads are positioned on the outer edge of the package of the chip.
[02:03] Um and then this
[02:07] package of the chip.
[02:10] Um and then this package is then integrated into a larger package is then integrated into a larger uh larger mechanical package which uh
[02:13] uh larger mechanical package which uh translates these pins that uh that go
[02:16] translates these pins that uh that go out from from the pick onto the pin grid
[02:18] out from from the pick onto the pin grid array.
[02:20] So this is how the processors array.
[02:24] So this is how the processors looked like uh back in 1980s back in 1990s.
[02:25] 1990s.
[02:27] Now we have much more sophisticated processors with much greater levels of
[02:30] processors with much greater levels of integration.
[02:32] This is uh another processor by Intel that I could find a a
[02:34] processor by Intel that I could find a a neat schematic of.
[02:37] So the die design is much much much more complicated and uh
[02:40] much much much more complicated and uh uh you can see that the processor is
[02:43] uh you can see that the processor is integrated uh by flip chip this time
[02:46] integrated uh by flip chip this time into a multi-layer PCB with VAS.
[02:49] So this is much much much more complicated, much
[02:51] is much much much more complicated, much more advanced.
[02:53] So the idea with electronic packaging that we deal with
[02:55] electronic packaging that we deal with when we're talking about photonix
[02:57] when we're talking about photonix packaging is that we want to as much as
[02:59] packaging is that we want to as much as possible utilize these advancements and
[03:02] possible utilize these advancements and not to reinvent the wheel.
[03:04] However, what we were observing over the past couple
[03:06] we were observing over the past couple of years and not only perhaps in
[03:08] of years and not only perhaps in photonix packaging but it's becoming photonix packaging but it's becoming more evident in photonix packaging that more evident in photonix packaging that uh companies are moving away from uh companies are moving away from uniform uh designs as you can see over uniform uh designs as you can see over here and moving toward a chiplet model here and moving toward a chiplet model where different functionalities are where different functionalities are split between different dyes which can split between different dyes which can use different manufacturing modes nodes use different manufacturing modes nodes and therefore are uh then commonly and therefore are uh then commonly integrated onto a single carrier integrated onto a single carrier substrate and I'll show some examples of substrate and I'll show some examples of that later.
[03:36] So if you compare that to the So if you compare that to the electronics the photonix package designs electronics the photonix package designs uh you can immediately see that they're uh you can immediately see that they're much more u uh let's say less comp less much more u uh let's say less comp less complex and complicated.
[03:49] This is a package that we made back in 2018 2019 package that we made back in 2018 2019 that that sort of scale.
[03:56] So this is much less sophisticated than what you saw less sophisticated than what you saw before.
[03:59] At the center of course we have the photonic integrated circuit which is the photonic integrated circuit which is coupled uh to optically with a fiber and coupled uh to optically with a fiber and then uh the electronic side is uh uh the
[04:10] then uh the electronic side is uh uh the connectivity is established using two PCBs.
[04:12] connectivity is established using two PCBs.
[04:15] So we have north and south PCB which serve both as a DC connector and as an RF connectors.
[04:17] which serve both as a DC connector and as an RF connectors.
[04:20] So the purpose of electronic essentially the purpose of electronic packaging is to ensure the electric interfacing between the package and the chip especially and the rest of the system.
[04:22] electronic essentially the purpose of electronic packaging is to ensure the electric interfacing between the package and the chip especially and the rest of the system.
[04:24] electronic packaging is to ensure the electric interfacing between the package and the chip especially and the rest of the system.
[04:26] electric interfacing between the package and the chip especially and the rest of the system.
[04:28] and the chip especially and the rest of the system.
[04:31] And uh the PCBs don't have to be uh as uh as rigid as what you saw on the previous slide.
[04:34] to be uh as uh as rigid as what you saw on the previous slide.
[04:35] They can be quite flexible.
[04:38] So there's also flex PCBs so called which allow for a single axis or flexible electrical connection in case you want to uh have that functionality.
[04:40] called which allow for a single axis or flexible electrical connection in case you want to uh have that functionality.
[04:42] flexible electrical connection in case you want to uh have that functionality.
[04:44] This uh is sometimes useful when you need to change levels or provide some sort of flexibility within your package.
[04:47] need to change levels or provide some sort of flexibility within your package.
[04:48] sort of flexibility within your package.
[04:50] and those can uh support up to four layers of copper traces and can also be RF compatible.
[04:53] layers of copper traces and can also be RF compatible.
[04:55] layers of copper traces and can also be RF compatible.
[04:58] RF compatible.
[05:00] So uh in terms of what is the demarcation between the DC and RF uh if you ask two people they'll have three different answers where does that threshold occur.
[05:04] demarcation between the DC and RF uh if you ask two people they'll have three different answers where does that threshold occur.
[05:06] you ask two people they'll have three different answers where does that threshold occur.
[05:08] different answers where does that uh threshold occur.
[05:11] threshold occur.
[05:13] uh typically for us what we observe most commonly is that what we observe most commonly is that below 1 ghahz we treat essentially below 1 ghahz we treat essentially package as DC above 1 ghahz we treat it package as DC above 1 ghahz we treat it as RF and we because the losses in as RF and we because the losses in electrical transmission become much more electrical transmission become much more significant and inter symbol significant and inter symbol interference especially becomes a interference especially becomes a problem.
[05:27] So above this frequency we essentially start treating the uh the electrical connection as an RF and therefore we uh modify the geometry of the conduction lines uh in order to solve that problem.
[05:38] solve that problem.
[05:41] And as for the components in the PE that require uh the RF those are typically lasers.
[05:49] They're sometimes uh modulated directly using RF signals there.
[05:51] Then there are also modulators and also photo detectors especially if they're operating at high speeds that require those sorts of speeds in order to uh uh to reproduce the signal signal correctly.
[06:03] And you can see on this chip already that uh there is a significant difference uh between the RF lines and the DC pads.
[06:09] Those are quite easy to
[06:12] The DC pads. Those are quite easy to spot and quite easy to recognize.
[06:15] Spot and quite easy to recognize.
[06:17] Um I won't be speaking exactly how to perform your RF simulations because this really depends on the chip you have on the system you have.
[06:23] Those this is a very very broad topic that could all like uh uh to discuss in its entirety could take several hours itself.
[06:30] Uh however uh the typical because we're dealing with packaging typically what we're interested is the is the interfaces.
[06:39] So if we desire interposers that's when the packaging and the RF simulation comes into packaging.
[06:45] For example, what I'm showing here is a uh RF interposer that we're designing that has a two layers which are uh crossed using AVI.
[06:55] So this simulation is actually to uh set up to minimize the reflections and maximize transmission through this system.
[07:03] And uh RF simulations are necessary because you need to match the impedance.
[07:08] If you don't match the impedance then it behaves like a refractive index jump and you'll get strong reflections uh on in
[07:14] you'll get strong reflections uh on in your uh transmission spectrum and you also lose start to lose signal.
[07:18] An example of such a simulation results are presented here on this graph where in the red you have let's say the transmission in dBs the losses as you uh as you incur as the frequency of electrical signal uh increases and in black you see the reflections there are some specific frequencies at which your reflections are are minimized.
[07:39] So in order to impedance match your entire system, you have to uh uh you know you have to tune the geometry of your transmission lines the uh the signal line and also the grounding lines and the geometries the sizes of all the of all the landing pads because those those things matter when you do those simulations but as I mentioned those are very uh specific to the the specific chip that you have and specific system that you have.
[08:03] So I don't want to spend too much time.
[08:05] Um the RF materials are also selection of RF materials also quite uh important because uh what you're looking for are materials that
[08:16] you're looking for are materials that have high electric constant or high
[08:18] have high electric constant or high relative permitivity because then uh you
[08:22] relative permitivity because then uh you will you can contain your uh your
[08:25] will you can contain your uh your electrical signal much better.
[08:27] electrical signal much better. So you can have a smaller pitch between your um
[08:30] can have a smaller pitch between your um your transmission lines. And also what
[08:33] your transmission lines. And also what you're looking for is a low loss tangent
[08:35] you're looking for is a low loss tangent which is essentially a dissipation
[08:36] which is essentially a dissipation factor and it it tells you how much of
[08:39] factor and it it tells you how much of the signal are using over over the
[08:41] the signal are using over over the length of your of your transmission
[08:43] length of your of your transmission line. So this is I made this graph which
[08:45] line. So this is I made this graph which shows uh several different classes of
[08:48] shows uh several different classes of materials which can be used as RF.
[08:51] materials which can be used as RF. uh F FR4 which is standard PCB material
[08:54] uh F FR4 which is standard PCB material has you can see has quite a high loss
[08:56] has you can see has quite a high loss tangent and low permitivity. Roger's
[08:59] tangent and low permitivity. Roger's material is u about an order of
[09:02] material is u about an order of magnitude better than F FR4 which is why
[09:04] magnitude better than F FR4 which is why it's used instead when you have a
[09:06] it's used instead when you have a high-speed signals that you need to
[09:08] high-speed signals that you need to propagate. Then you have uh the class of
[09:12] propagate. Then you have uh the class of ceramics which for example low
[09:14] ceramics which for example low temperature coired ceramic aluminium
[09:16] temperature coired ceramic aluminium nitride or aluminina they seem to have
[09:19] nitride or aluminina they seem to have quite low loss tangent and higher
[09:20] quite low loss tangent and higher permitivity.
[09:22] permitivity. Then you have your semiconductors which have even higher
[09:24] semiconductors which have even higher relative permitivity.
[09:26] relative permitivity. I will speak about glass a little bit later.
[09:29] glass a little bit later. So essentially this is the selection of materials and
[09:31] this is the selection of materials and uh if you break it down on essentially
[09:34] uh if you break it down on essentially on the left side of the graph you have
[09:37] on the left side of the graph you have uh materials which cost less.
[09:41] uh materials which cost less. Uh however you'll have uh you might have you know
[09:43] you'll have uh you might have you know problems making them small or you
[09:45] problems making them small or you actually low loss.
[09:48] actually low loss. On the right side of the graph uh you have materials which
[09:50] the graph uh you have materials which are going to be more costly but you'll
[09:52] are going to be more costly but you'll get the better performance out of them.
[09:54] get the better performance out of them. So there is that's not only a question
[09:56] So there is that's not only a question of low loss and high constant but also
[09:59] of low loss and high constant but also how much are you willing to pay for your
[10:01] how much are you willing to pay for your materials.
[10:03] materials. So, as I mentioned in uh the in the in
[10:06] So, as I mentioned in uh the in the in the first uh um webinar last week, what
[10:09] the first uh um webinar last week, what we're dealing with in packaging are
[10:11] we're dealing with in packaging are typically interfaces when we need to uh
[10:14] typically interfaces when we need to uh uh connect the photonic chip to the rest
[10:16] uh connect the photonic chip to the rest of the environment.
[10:20] And uh it so happens that when we need to connect the chip electrically for example to a PCB we can uh we very quickly find out that uh uh picss uh and PCBs can are limited by their bond bond pad size.
[10:31] On the PCB you have a certain limit of the minimum bond pad while on the photonic integrated circuit those bond pads can be made much closer.
[10:40] So what we do is uh most commonly is to have some sort of a pitch reducing interposes such as such as one that you can see in this model over here where we have a PCB interface which has both DC and RF lines and those are pitch reduced onto the uh onto the PC to match that uh uh that interface and thanks to this the picss can be made smaller of course at the cost of having to make an interposer.
[11:06] So this specific PCB was made of ceramic uh just single layer ceramic which meant that it wasn't very costly.
[11:13] However, it wasn't uh it wasn't cheap and using the posers of course
[11:17] cheap and using the posers of course means that additional manufacturing packaging steps are necessary.
[11:21] So they have to be there they have to be really um uh justified in their use.
[11:28] Uh in instead of ceramics for example you can use silicon toosers.
[11:30] Here's one example where we had a pick which required 348 DC connection.
[11:35] So there's no RF here involved at all which was good.
[11:41] Um however you can see the relative size of the PCB that that requires you know several uh quite large connectors and then there are those bundled at the edge of this little interface and then the signals are transferred over using wire bonding onto the silicon proposer which is still significant size.
[12:00] This is not a small PCB.
[12:02] This is several cm across.
[12:05] And then the pick is actually the smallest uh bit uh in this package.
[12:08] Uh so this uh slick interposers are quite good if you require quite fine um quite fine uh line
[12:19] require quite fine um quite fine uh line width because they can be fabricated.
[12:21] width because they can be fabricated using lithography and of course silicon interposer silicon itself is very good.
[12:25] interposer silicon itself is very good for RF.
[12:27] However, as mentioned, they're very expensive and you're paying a heavy price for the real estate.
[12:32] And this specific interposer, you can see it has like a gray sheen, which means it's uh finished in aluminium.
[12:39] However, you can also get those in gold, which makes them much more expensive.
[12:43] But, as I'll mention later, they're much better for wire bonding or any sort of flip chip bonding processing.
[12:50] Um then there's glass uh which is a relatively new material that's used into posers.
[12:56] However, it already captured notice of many big companies.
[12:59] For example, this is a picture from an uh a notice from Intel that occurred a year or year and a half ago where they said they're going to be moving their uh production of uh substrates directly to glass because glass is relatively cheap material.
[13:18] Uh but it also as you can see
[13:21] material.
[13:23] Uh but it also as you can see from this picture it allows for panel scale processing.
[13:24] So we can integrate your electrical components directly onto these little glass uh uh chiplets and uh have them after after all the integration steps are completed you can dice them out.
[13:38] You can also have when glass you can design DC and RF tracks.
[13:40] Here is a screenshot from the glass interposer we designed here in Tindle.
[13:44] You can see there are some uh DC landing pads and also you can recognize some VAS in between.
[13:50] For example, over here there's a via since glass is optically transparent up to about 3.4 microns.
[13:56] Um you can also have uh in the future design those interposes not only to support electrical connections but also optical interconnects.
[14:07] So it can serve dual purpose.
[14:11] Uh glass however has a very uh low uh uh thermal transmission coefficient.
[14:15] So uh it offers very good thermal isolation which is both a good
[14:21] thermal isolation which is both a good thing and a bad thing depending on the thing and a bad thing depending on the way you look at it and they'll discuss that in the second part of the webinar where we go to the thermal management part.
[14:30] Just a note u continuing on the on the scale of of the thing.
[14:33] So you can see the bond pads on the pick are typically uh when they're made for example for wire bonding or inner processing they're actually much much larger than the actual uh elements that they're supposed to serve.
[14:45] So for example here we have a ring resonator with an attached photo detector as a drop line and you can see uh the bond pads are actually an order of magnitude larger than those.
[14:57] Uh so there are uh things that that you have to uh be careful when you're laying out out your pick in order to have sufficient space for for the landing pads when you're for example wire bonding onto the uh uh techniques of uh of integration themselves.
[15:16] Of course the oldest one uh is the wire bonding itself.
[15:18] So here's the how the typical wire bonder looks like.
[15:20] You have a
[15:22] Wire bonder looks like.
[15:22] You have a heated Oh, sorry.
[15:28] Sorry, my uh.
[15:31] Sorry, my uh my PowerPoint crashed I believe.
[15:48] Okay.
[15:50] Okay, my apologies.
[15:58] Need to share it again.
[16:12] Okay, looks like we're back online.
[16:13] Okay, looks like we're back online again.
[16:13] My apologies for that.
[16:13] So, here's again.
[16:15] My apologies for that.
[16:15] So, here's how a typical wire bonder looks like.
[16:17] Uh, how a typical wire bonder looks like.
[16:19] Uh, we have a heated device stage which is used to uh uh full screen but just.
[16:24] used to uh uh full screen but just diminish it for a second and close that.
[16:25] diminish it for a second and close that window.
[16:25] Feedback to Microsoft.
[16:28] window.
[16:28] Feedback to Microsoft.
[16:28] Okay.
[16:30] It's not full screen.
[16:30] Okay.
[16:32] It's not full screen.
[16:32] >> I see.
[16:32] Close that and then I'll make it big screen.
[16:36] >> Right.
[16:36] Okay.
[16:40] So, oh come back to this.
[16:43] So here we have a heated device stage which is used sometimes to heat up the uh the device.
[16:47] uh right above the room the room temperature but the most critical part of the wire bonder is a uh fereral.
[16:55] through which you feed the wire and there's a spark initiator here that that uh I'll I'll show how it works on the next slide but essentially this entire setup is used to draw wire bonds between your photonic device and your interposer or PCB and this method that is reliable and you can also but you can create with this you can create long distance quite long DC connections even of the order of several millimeters.
[17:20] Uh however the wire bonding as you see in this machine this
[17:24] bonding as you see in this machine this is a my machine so it's a quite slow.
[17:26] is a my machine so it's a quite slow method requires uh several hours to connect several hundred uh wire bonds.
[17:32] but it can be automated if you have uh if you have a uh uh template that you can actually program your wire bonder with.
[17:42] So here is a quite old video uh of u how the wire bonding process looks like.
[17:48] So first a spark is uh spark uh by the by the spark initiator is forming a ball.
[17:56] Then it's bonded using ultrasound onto the bond pad on one side of the connection.
[18:01] Then it is drawn out by the uh by the movement of this uh of the fereral onto the other bond pad and again bonded using ultrasound to the other one upon which the tool is quickly withdrawn and you saw the uh the spark initiator coming very close to form another ball to be ready for the next uh connection.
[18:22] There are uh two types of bonds depending on which uh uh which uh speeds
[18:29] depending on which uh uh which uh speeds are you serving.
[18:31] So for DC you typically you have a circle cross-section wire.
[18:33] bombs they're typically 25 microns diameter but you can have them perhaps larger.
[18:38] and they can be centimeters in length even longer.
[18:43] However this is not really recommended because you don't want to create very long wire bonds.
[18:46] because they can cross and uh short shortcircuit your your system.
[18:51] Then the RF uh wire bonds are typically performed using ribbons which have a cross-section which is non-ircular.
[18:57] It's a rectangular for example common cross-section is 50 by 12 microns.
[19:03] And here you can see uh on this image you can see those ribbons and they should be as short as possible.
[19:08] You don't want to have very long wear bones because then your losses increase tremendously.
[19:17] Then the next method is to solder uh the uh the uh photonic chip and the interposer or your PCB together.
[19:25] And this is done using uh standard solders.
[19:28] Uh however uh
[19:32] using uh standard solders.
[19:34] Uh however uh what you can do which is very useful is what you can do which is very useful is you can solder jet solder ball jet uh
[19:37] you can solder jet solder ball jet uh your solder balls onto the bond pads.
[19:39] your solder balls onto the bond pads.
[19:41] Here is you can see in the video how the process looks like.
[19:43] So the solder ball is shut out using uh compressed air through a nozzle and then
[19:47] compressed air through a nozzle and then laser is heating up the solder ball as
[19:50] laser is heating up the solder ball as it passes through the nozzle uh above
[19:53] it passes through the nozzle uh above the reflow temperature so that the uh
[19:56] the reflow temperature so that the uh solder ball melts and in the molten
[19:59] solder ball melts and in the molten state it makes contact with the uh with
[20:01] state it makes contact with the uh with your surface and uh sticks to that
[20:04] your surface and uh sticks to that surface if everything is made uh properly.
[20:06] surface if everything is made uh properly.
[20:08] So with this you can create hundreds of connections quite quickly
[20:11] hundreds of connections quite quickly and those connections can be then made
[20:13] and those connections can be then made very close to the onpig device.
[20:15] very close to the onpig device.
[20:17] So you don't have to draw very long bond pads uh or RF long RF lines.
[20:20] don't have to draw very long bond pads uh or RF long RF lines.
[20:23] Your distance between the bond pads is actually quite close of the order of the size of the
[20:24] between the bond pads is actually quite close of the order of the size of the solder balls.
[20:26] solder balls.
[20:29] And these can be typically they're 50 microns but they can be I think they can be made made larger.
[20:31] they're 50 microns but they can be I think they can be made made larger.
[20:34] think they can be made made larger. Um, a little bit of a side note on the
[20:36] Um, a little bit of a side note on the bond pad finish because depending on the
[20:38] bond pad finish because depending on the foundry that you get your chips from,
[20:40] foundry that you get your chips from, you can have your electrical bond pads
[20:43] you can have your electrical bond pads made even either in gold or aluminum and
[20:46] made even either in gold or aluminum and those have uh impact on how uh which
[20:50] those have uh impact on how uh which techniques can use and how easily can
[20:52] techniques can use and how easily can you utilize them because uh you can't
[20:55] you utilize them because uh you can't use standard solders on directly on the
[20:57] use standard solders on directly on the aluminum bond pads. Um uh however wire
[21:00] aluminum bond pads. Um uh however wire bonding works okay as wire bonding is
[21:02] bonding works okay as wire bonding is done using ultrasound. So essentially
[21:04] done using ultrasound. So essentially with aluminium what happens is you
[21:05] with aluminium what happens is you create a very thin layer of oxide that
[21:07] create a very thin layer of oxide that you have to break through. That's why uh
[21:10] you have to break through. That's why uh if you for example try to shoot a solder
[21:12] if you for example try to shoot a solder ball at an aluminum bond pad it's just
[21:13] ball at an aluminum bond pad it's just going to bounce off the oxide and not
[21:15] going to bounce off the oxide and not stick. That's why gold gold bond pads
[21:18] stick. That's why gold gold bond pads are preferable and they're very good for
[21:19] are preferable and they're very good for packaging and solder adhesion but uh uh
[21:22] packaging and solder adhesion but uh uh and and but gold is camos poison and
[21:25] and and but gold is camos poison and silicon fabs.
[21:28] silicon fabs. Then uh what uh another types of bond
[21:30] Then uh what uh another types of bond pads you can have are either copper ber
[21:32] pads you can have are either copper ber bumps uh which are created in the fab
[21:36] bumps uh which are created in the fab during the device processing and this is
[21:38] during the device processing and this is how you can kind of mitigate some of the
[21:40] how you can kind of mitigate some of the issues that I mentioned on the previous
[21:42] issues that I mentioned on the previous slide because those are structures that
[21:43] slide because those are structures that are integrated directly into the pick
[21:46] are integrated directly into the pick and then you can uh deposit solder uh
[21:48] and then you can uh deposit solder uh between those copper pillars as you can
[21:50] between those copper pillars as you can see on the image over here and then bond
[21:53] see on the image over here and then bond them together uh using reflow. So
[21:55] them together uh using reflow. So they're small small size and they're
[21:57] they're small small size and they're scalable and in their foundry process.
[21:59] scalable and in their foundry process. However, if you don't have access to
[22:01] However, if you don't have access to those structures, then what you can do
[22:04] those structures, then what you can do is kind of a workshop method where you
[22:07] is kind of a workshop method where you can apply a gold stud bump directly onto
[22:10] can apply a gold stud bump directly onto your bond pad uh using the using wire
[22:13] your bond pad uh using the using wire boundary machine. This is quite this is
[22:16] boundary machine. This is quite this is a workaround method because it's not
[22:18] a workaround method because it's not scalable and your sizes of your s bumps
[22:22] scalable and your sizes of your s bumps are going to be quite quite significant.
[22:24] are going to be quite quite significant. So it's useful only for prototyping but
[22:26] So it's useful only for prototyping but in those cases you can use that. So here
[22:28] in those cases you can use that. So here what you can see is the interposer. This
[22:31] what you can see is the interposer. This is aluminium nitrate interoser onto
[22:32] is aluminium nitrate interoser onto which we deposited uh gold stud bump
[22:35] which we deposited uh gold stud bump using a wire bonder. Then the uh on top
[22:38] using a wire bonder. Then the uh on top of that we can deposit the solder ball
[22:41] of that we can deposit the solder ball and attach it uh using reflow to a
[22:43] and attach it uh using reflow to a photonic device.
[22:45] photonic device. And speaking of reflow typically what
[22:47] And speaking of reflow typically what you'll be using when you're flowing are
[22:50] you'll be using when you're flowing are either a refill oven or a flip chip
[22:52] either a refill oven or a flip chip bonder. This is an example of the one
[22:54] bonder. This is an example of the one that we have down in our lab where the
[22:56] that we have down in our lab where the central part is a hot plate which heats
[22:59] central part is a hot plate which heats up the your circuit to a spe to a
[23:03] up the your circuit to a spe to a specific temperature. And over here also
[23:06] specific temperature. And over here also there is a beam splitter which allows
[23:08] there is a beam splitter which allows you to position your uh photonic
[23:10] you to position your uh photonic integrated circuit in this case in this
[23:12] integrated circuit in this case in this case of this example relative to the
[23:14] case of this example relative to the interposer on the hot plate um using
[23:17] interposer on the hot plate um using some set of alignment markers. So once
[23:19] some set of alignment markers. So once you align them using the beam splitter
[23:22] you align them using the beam splitter then you can uh put place them together
[23:25] then you can uh put place them together and begin your refflow process and
[23:27] and begin your refflow process and reflow uh temperature depends on the
[23:31] reflow uh temperature depends on the material that you use. So typically uh
[23:34] material that you use. So typically uh what you be using is thin silver copper
[23:37] what you be using is thin silver copper which is the sactual 5 utctic which has
[23:40] which is the sactual 5 utctic which has liquidus around 217°
[23:42] liquidus around 217° centigrade. However, the typical reflow
[23:44] centigrade. However, the typical reflow curve is the one that I'm showing um
[23:47] curve is the one that I'm showing um over here in the left top left corner.
[23:49] over here in the left top left corner. So, typically reflow temperature reaches
[23:51] So, typically reflow temperature reaches 260°.
[23:53] 260°. There are other tactics that you can use
[23:55] There are other tactics that you can use for solder flow. For example, gold tin
[23:57] for solder flow. For example, gold tin which has higher reflow temperature, but
[23:59] which has higher reflow temperature, but it can bond to aluminum bond pads with a
[24:03] it can bond to aluminum bond pads with a little bit of surface processing. Then
[24:05] little bit of surface processing. Then there's bism of thin silver which has a
[24:08] there's bism of thin silver which has a much lower refill temperature and and
[24:11] much lower refill temperature and and again this one cannot will not bond uh
[24:13] again this one cannot will not bond uh to aluminum bond pads and this uh this
[24:17] to aluminum bond pads and this uh this table is quite important when you're
[24:19] table is quite important when you're looking for example to have a multistack
[24:21] looking for example to have a multistack device when you for example have uh when
[24:24] device when you for example have uh when you attach your integrated electric
[24:27] you attach your integrated electric integrated circuit your photonic
[24:28] integrated circuit your photonic integrated circuit I'll show an example
[24:29] integrated circuit I'll show an example of that later using reflow and then you
[24:32] of that later using reflow and then you want to take that subasssembly and
[24:35] want to take that subasssembly and attached again to your interposer. Then
[24:37] attached again to your interposer. Then in order to stop them from, you know,
[24:40] in order to stop them from, you know, from disassembling, we need to use two
[24:42] from disassembling, we need to use two different uh utctics. For example, you
[24:45] different uh utctics. For example, you would use a tens copper to attach your
[24:48] would use a tens copper to attach your EIC to your pick and then uh attach that
[24:52] EIC to your pick and then uh attach that sub assembly to your uh uh to your uh
[24:56] sub assembly to your uh uh to your uh interposer using a lower temperature uh
[24:59] interposer using a lower temperature uh solder. So the uh for these you you'll
[25:02] solder. So the uh for these you you'll need to have different uh different
[25:04] need to have different uh different reflow temperatures. After your uh
[25:08] reflow temperatures. After your uh reflow is completed and your bond is
[25:11] reflow is completed and your bond is correct uh is established electrical
[25:13] correct uh is established electrical bond is established. What typically what
[25:14] bond is established. What typically what you want to do is to underfill the
[25:16] you want to do is to underfill the entire sub assembly because uh you're
[25:19] entire sub assembly because uh you're relying only on the connections between
[25:22] relying only on the connections between you know that are formed
[25:25] you know that are formed using a solder and uh uh the uh surf
[25:29] using a solder and uh uh the uh surf contact surface here might not be enough
[25:30] contact surface here might not be enough and those could be for example detached
[25:32] and those could be for example detached quite easily. So you want to underfill
[25:34] quite easily. So you want to underfill them. Uh this is typically done
[25:36] them. Uh this is typically done automatically. This is a very well
[25:37] automatically. This is a very well established process. Uh it mechanically
[25:40] established process. Uh it mechanically strengthens this bond. uh those of
[25:42] strengthens this bond. uh those of course those underfills have to be
[25:43] course those underfills have to be electric not conductive. Uh however they
[25:46] electric not conductive. Uh however they they do provide a modum of thermal
[25:48] they do provide a modum of thermal conductivity of of the order of one to
[25:50] conductivity of of the order of one to two watts per meter kelvin. Um then uh
[25:54] two watts per meter kelvin. Um then uh what you can also do there's an
[25:56] what you can also do there's an different technique that you can
[25:57] different technique that you can utilize. If you have the same bond pad
[25:59] utilize. If you have the same bond pad uh material on both sides of your link,
[26:02] uh material on both sides of your link, when you for example you have gold to
[26:04] when you for example you have gold to gold, you can use formal compression
[26:06] gold, you can use formal compression bonding. And what happens is you apply
[26:08] bonding. And what happens is you apply heat and force uh to bring them together
[26:11] heat and force uh to bring them together and through diffusion essentially they
[26:13] and through diffusion essentially they uh uh they compress to uh to have a uh
[26:17] uh uh they compress to uh to have a uh very uniform bond. Uh then the force
[26:20] very uniform bond. Uh then the force with heat are interchangeable. So if you
[26:23] with heat are interchangeable. So if you don't want to heat it too much, you can
[26:24] don't want to heat it too much, you can apply more force and vice versa. So this
[26:27] apply more force and vice versa. So this is a quite interesting sortless
[26:28] is a quite interesting sortless technique which provides a very good
[26:30] technique which provides a very good electrical contact. However, again for
[26:32] electrical contact. However, again for gold uh this is uh there are very little
[26:36] gold uh this is uh there are very little issues uh for thermal compression
[26:38] issues uh for thermal compression bonding. But if you want to use
[26:40] bonding. But if you want to use aluminium or copper then you need to
[26:42] aluminium or copper then you need to break the oxide and use neutral temp uh
[26:45] break the oxide and use neutral temp uh neutral atmosphere so that the oxide
[26:47] neutral atmosphere so that the oxide doesn't form between them. And the
[26:48] doesn't form between them. And the temperatures are significantly higher as
[26:50] temperatures are significantly higher as you can see here. For aluminium it will
[26:52] you can see here. For aluminium it will have to be about 400° and for copper
[26:54] have to be about 400° and for copper about 380° to break through the oxide
[26:56] about 380° to break through the oxide layer.
[26:59] layer. Uh coming finally to the types of
[27:01] Uh coming finally to the types of electronic integration. I spoke a little
[27:03] electronic integration. I spoke a little bit briefly about this before. So uh
[27:05] bit briefly about this before. So uh what we started off several years ago is
[27:07] what we started off several years ago is essentially is uh node uh electronic
[27:09] essentially is uh node uh electronic integration where everything is in the
[27:11] integration where everything is in the same plane. You have here a pick in the
[27:13] same plane. You have here a pick in the center. Then you have interposers to the
[27:16] center. Then you have interposers to the side which uh uh translate your bondpad
[27:18] side which uh uh translate your bondpad pitch from the router's PCB to the pick
[27:21] pitch from the router's PCB to the pick and then you have your PCBs on the sides
[27:22] and then you have your PCBs on the sides with your DC connections and RF
[27:24] with your DC connections and RF connections. Uh so there is in terms of
[27:27] connections. Uh so there is in terms of integration there is very little uh you
[27:29] integration there is very little uh you know to to to speak about it's quite
[27:31] know to to to speak about it's quite easy to design and manufacture and also
[27:34] easy to design and manufacture and also thermal control of this uh is is quite
[27:37] thermal control of this uh is is quite easy because you can put a tech and the
[27:38] easy because you can put a tech and the heat spread around right underneath. So
[27:40] heat spread around right underneath. So it's useful for prototyping. However,
[27:42] it's useful for prototyping. However, your RF traces are quite long. So, for
[27:45] your RF traces are quite long. So, for example, if you have controller,
[27:47] example, if you have controller, controller in this case has to be
[27:48] controller in this case has to be somewhere outside. Uh, so the RF signal
[27:51] somewhere outside. Uh, so the RF signal has to travel through this connector
[27:52] has to travel through this connector through the interposer down to the peg.
[27:54] through the interposer down to the peg. So, the traces are very long and
[27:56] So, the traces are very long and therefore you incur significant losses
[27:58] therefore you incur significant losses on that transmission. And of course,
[28:01] on that transmission. And of course, because this is most useful for
[28:02] because this is most useful for prototyping, it might not be very well
[28:04] prototyping, it might not be very well scalable. Then uh the improvement for
[28:06] scalable. Then uh the improvement for that is a 3D technique where you
[28:08] that is a 3D technique where you integrate for for example your
[28:11] integrate for for example your electronic controller directly onto the
[28:13] electronic controller directly onto the photonic integrated circuit as seen in
[28:15] photonic integrated circuit as seen in this picture. So with this you have a
[28:18] this picture. So with this you have a very short RF tracks if there are any
[28:20] very short RF tracks if there are any because you your controller to the P
[28:22] because you your controller to the P distance is very small. Packaging is
[28:24] distance is very small. Packaging is also straightforward. you can uh refflow
[28:27] also straightforward. you can uh refflow u solder reflow them one on top of the
[28:29] u solder reflow them one on top of the other and it's generally useful all
[28:32] other and it's generally useful all around solution and it's quite scalable.
[28:34] around solution and it's quite scalable. However, the thermal control is quite
[28:36] However, the thermal control is quite challenging because electronics is the
[28:38] challenging because electronics is the major source of heat and photonics is
[28:40] major source of heat and photonics is quite adverse to heat as I'll speak
[28:42] quite adverse to heat as I'll speak about in the second uh second section.
[28:45] about in the second uh second section. Uh
[28:47] Uh um so but it kind of limits system
[28:49] um so but it kind of limits system integration because you're kind of
[28:51] integration because you're kind of limited to the surface size of the pick
[28:53] limited to the surface size of the pick and the number of electronic circuits
[28:55] and the number of electronic circuits that you could integrate directly on top
[28:56] that you could integrate directly on top of it. So you're paying for real estate
[28:58] of it. So you're paying for real estate in that case. The alternative which is
[29:01] in that case. The alternative which is gathering much more uh steam uh recently
[29:04] gathering much more uh steam uh recently is a 2.5D integration or something that
[29:07] is a 2.5D integration or something that will be soon called it's called
[29:09] will be soon called it's called co-ackaging where you have your photonic
[29:12] co-ackaging where you have your photonic integrated circuit and your TAS or
[29:14] integrated circuit and your TAS or controllers reflowed directly onto the
[29:16] controllers reflowed directly onto the interposer and the interposer is
[29:18] interposer and the interposer is essentially your uh your uh link between
[29:22] essentially your uh your uh link between your pick and your EAC's and with this
[29:24] your pick and your EAC's and with this you can have quite short uh RF tracks. I
[29:27] you can have quite short uh RF tracks. I think I should go back to laser pointer
[29:29] think I should go back to laser pointer here. Yeah. So here the distance between
[29:32] here. Yeah. So here the distance between your uh your pick and your TAS is quite
[29:34] your uh your pick and your TAS is quite short. Uh which again uh reduces your
[29:37] short. Uh which again uh reduces your the loss that you incur. Packaging is
[29:39] the loss that you incur. Packaging is also straightforward. In the case of
[29:41] also straightforward. In the case of what you see on this picture uh this was
[29:43] what you see on this picture uh this was assembled in a single step. So all those
[29:46] assembled in a single step. So all those elements were positioned on top of the
[29:48] elements were positioned on top of the uh on top of the interposer. The
[29:50] uh on top of the interposer. The sniposer is made of silicon by the way.
[29:52] sniposer is made of silicon by the way. And then they were reflowed in an oven
[29:54] And then they were reflowed in an oven at single stage. And then that
[29:56] at single stage. And then that interposer was again reflowed at a lower
[29:58] interposer was again reflowed at a lower temperature onto the PCB. So uh
[30:01] temperature onto the PCB. So uh packaging is relatively straightforward
[30:03] packaging is relatively straightforward and it allows for very high system
[30:05] and it allows for very high system integration and is also scalable.
[30:08] integration and is also scalable. Uh and it's now being uh used in a
[30:11] Uh and it's now being uh used in a chiplet model where you where you can
[30:13] chiplet model where you where you can might imagine this is a interposer that
[30:16] might imagine this is a interposer that uh electrically and firmly interconnects
[30:18] uh electrically and firmly interconnects your various uh photonic circuits and
[30:21] your various uh photonic circuits and and uh electronic circuits. However
[30:24] and uh electronic circuits. However control of such a system is quite
[30:26] control of such a system is quite challenging.
[30:28] challenging. Uh so the chiplet model I spoke about is
[30:31] Uh so the chiplet model I spoke about is essentially a a new paradigm that that
[30:33] essentially a a new paradigm that that people are working on to disagregate the
[30:35] people are working on to disagregate the the various functionalities among
[30:36] the various functionalities among different nodes and uh for photonix
[30:39] different nodes and uh for photonix packaging we arrive at such a cool
[30:41] packaging we arrive at such a cool package model for example where we have
[30:42] package model for example where we have a central controller onto a PCB or a
[30:45] a central controller onto a PCB or a substrate and each of the photonic
[30:47] substrate and each of the photonic integrated circuits are essentially
[30:49] integrated circuits are essentially chiplets which are attached to this PCB
[30:51] chiplets which are attached to this PCB or a substrate.
[30:55] uh some there I want to also show some
[30:58] uh some there I want to also show some highlights of the work that we did here
[31:00] highlights of the work that we did here in Tindle for example in terms of
[31:01] in Tindle for example in terms of highdensity co-ackaged electronic
[31:04] highdensity co-ackaged electronic interposers so this is one that we did
[31:06] interposers so this is one that we did for one of the EU project we're working
[31:08] for one of the EU project we're working on this is a ceramic interposer that we
[31:10] on this is a ceramic interposer that we designed which has 20 electrical layers
[31:12] designed which has 20 electrical layers which has to support 3300 transmission
[31:15] which has to support 3300 transmission lines so designing the design phase of
[31:18] lines so designing the design phase of this project was quite long I I would be
[31:20] this project was quite long I I would be surprised if it took less than two years
[31:21] surprised if it took less than two years because all of those uh lines had to be
[31:24] because all of those uh lines had to be checked for cross talk between one
[31:26] checked for cross talk between one another and uh with this ceramic
[31:29] another and uh with this ceramic interposer uh we could go down to 40
[31:31] interposer uh we could go down to 40 micron line with and spacing. However,
[31:33] micron line with and spacing. However, even with that such a small pitch uh the
[31:37] even with that such a small pitch uh the size the total size of this interposer
[31:39] size the total size of this interposer was quite significant. Here you can see
[31:41] was quite significant. Here you can see by the scale it's 10 cm by 7 cm. So uh
[31:45] by the scale it's 10 cm by 7 cm. So uh ceramic is quite expensive material
[31:47] ceramic is quite expensive material especially when you integrate 20 layers
[31:49] especially when you integrate 20 layers into it. So we were paying quite hefty
[31:51] into it. So we were paying quite hefty price for this. Uh however the the the
[31:55] price for this. Uh however the the the uh from from this you can see that uh in
[31:57] uh from from this you can see that uh in order to make this system work to uh
[32:00] order to make this system work to uh actually to have this interposer
[32:03] actually to have this interposer properly uh integrate the photonic
[32:05] properly uh integrate the photonic circuit and some electronic circuits
[32:06] circuit and some electronic circuits with the environment. There had to be an
[32:08] with the environment. There had to be an iterative a very long co uh co-design
[32:11] iterative a very long co uh co-design between various different layers and
[32:14] between various different layers and that required a significant
[32:15] that required a significant computational power. So this is not an
[32:17] computational power. So this is not an easy thing to do.
[32:19] easy thing to do. Then that uh device was integrated as
[32:22] Then that uh device was integrated as you can see onto the PCB and assembled
[32:25] you can see onto the PCB and assembled uh using standard optical packaging
[32:27] uh using standard optical packaging techniques that I'll be speaking about
[32:28] techniques that I'll be speaking about next week. However, this uh the effort
[32:31] next week. However, this uh the effort necessary to bring this into existence
[32:33] necessary to bring this into existence was quite was quite significant and as
[32:36] was quite was quite significant and as uh photonic packages become more
[32:38] uh photonic packages become more complicated in the future than you can
[32:39] complicated in the future than you can imagine and this is not going to be an
[32:42] imagine and this is not going to be an easy thing to do and require a lot of
[32:44] easy thing to do and require a lot of iterative code design. So the takeaway
[32:46] iterative code design. So the takeaway message just from the electronic
[32:48] message just from the electronic perspective is that uh um essentially to
[32:54] perspective is that uh um essentially to recap uh electric integration is uh from
[32:57] recap uh electric integration is uh from the packaging perspective is about
[32:58] the packaging perspective is about delivering power to the pick and
[33:00] delivering power to the pick and communication between the chip and the
[33:02] communication between the chip and the environment or some other electronic
[33:04] environment or some other electronic IC's that are co-integrated with it. Uh
[33:07] IC's that are co-integrated with it. Uh and with packaging we can profit from
[33:10] and with packaging we can profit from many decades of research into micro
[33:12] many decades of research into micro electronics packaging. So things like
[33:15] electronics packaging. So things like wire bonding, solder bond, sololder ball
[33:17] wire bonding, solder bond, sololder ball bonding and reflow. Those are techn
[33:19] bonding and reflow. Those are techn technologies that were not developed for
[33:21] technologies that were not developed for photonics packaging specifically. They
[33:23] photonics packaging specifically. They were taken from the uh uh you know from
[33:26] were taken from the uh uh you know from the micro electronics world. So we can
[33:28] the micro electronics world. So we can profit from them. And then if you have
[33:30] profit from them. And then if you have RF signals depending on you know where
[33:32] RF signals depending on you know where do you put your fond where RF starts you
[33:35] do you put your fond where RF starts you know you will require specialized
[33:36] know you will require specialized materials and RF lines and design
[33:39] materials and RF lines and design considerations to have them working
[33:40] considerations to have them working properly. And uh as we as we go forward
[33:44] properly. And uh as we as we go forward in time uh higher levels of integration
[33:46] in time uh higher levels of integration are going to be uh quite uh quite more
[33:49] are going to be uh quite uh quite more important. Therefore the code designes
[33:50] important. Therefore the code designes of the electronic thermal and photonic
[33:52] of the electronic thermal and photonic layers will become much more challenging
[33:54] layers will become much more challenging and co-patching is becoming an essential
[33:56] and co-patching is becoming an essential method of actually manufacturing the
[33:58] method of actually manufacturing the devices.
[34:00] devices. And uh a little bit of a perhaps a side
[34:03] And uh a little bit of a perhaps a side note right now, but you have to be
[34:04] note right now, but you have to be careful when you're designing your
[34:05] careful when you're designing your system that any solders underfills or
[34:08] system that any solders underfills or any other electronic layers do not
[34:10] any other electronic layers do not contaminate your optical facets.
[34:12] contaminate your optical facets. Otherwise, you won't be able to
[34:13] Otherwise, you won't be able to optically connect to your chip. This is
[34:15] optically connect to your chip. This is this seems like simple. However, you
[34:17] this seems like simple. However, you know, you need to uh keep a specific
[34:20] know, you need to uh keep a specific distance so that you can actually attach
[34:21] distance so that you can actually attach your fibers afterwards. So, now on to
[34:24] your fibers afterwards. So, now on to the second part uh which is kind of
[34:26] the second part uh which is kind of related uh thermal management. So the
[34:30] related uh thermal management. So the sources of heat in the package are
[34:32] sources of heat in the package are numerous. Uh so there are typically
[34:34] numerous. Uh so there are typically those are the electronic circuits which
[34:36] those are the electronic circuits which are integrated. Lasers are also quite
[34:38] are integrated. Lasers are also quite significant source of heat. Uh any
[34:40] significant source of heat. Uh any heaters on a pick that are used to to
[34:42] heaters on a pick that are used to to modulate the signal are also sources of
[34:44] modulate the signal are also sources of heat. Uh then there are DC connections
[34:47] heat. Uh then there are DC connections uh and RF connections especially they
[34:49] uh and RF connections especially they can be quite uh uh there can get quite
[34:52] can be quite uh uh there can get quite hot. uh then the heat sensitive
[34:56] hot. uh then the heat sensitive components on the pick uh are typically
[34:58] components on the pick uh are typically lasers. If you have a laser integrated
[35:00] lasers. If you have a laser integrated then any change in temperature can vary
[35:03] then any change in temperature can vary the wavelength and power emitted by
[35:05] the wavelength and power emitted by lasers. So you have to stabilize it
[35:07] lasers. So you have to stabilize it quite carefully. And then there are some
[35:08] quite carefully. And then there are some components on the pick itself which are
[35:10] components on the pick itself which are quite uh temperature sensitive for
[35:12] quite uh temperature sensitive for example ring resonators which are
[35:14] example ring resonators which are themselves controlled by by uh uh by
[35:17] themselves controlled by by uh uh by thermal processes. So you have to be
[35:19] thermal processes. So you have to be careful from management. Unlike
[35:21] careful from management. Unlike electronics which can work comfortably
[35:22] electronics which can work comfortably up to 80° and perhaps above without any
[35:26] up to 80° and perhaps above without any any significant drop in performance in
[35:28] any significant drop in performance in photonics you have to really take care
[35:30] photonics you have to really take care of your uh of your heat management
[35:32] of your uh of your heat management otherwise you'll be in trouble. So here
[35:35] otherwise you'll be in trouble. So here is a short video uh if I can make it
[35:38] is a short video uh if I can make it running.
[35:40] running. Sorry.
[35:46] Play video.
[35:48] Play video. Okay. The video unfortunately not play
[35:50] Okay. The video unfortunately not play but uh
[35:53] but uh Oh yeah. All right. Now, now it will
[35:54] Oh yeah. All right. Now, now it will play. Okay. So, perfect. So here you can
[35:56] play. Okay. So, perfect. So here you can see in this video what we're observing
[35:58] see in this video what we're observing is the heat generated by the laser and
[36:00] is the heat generated by the laser and actually light is being absorbed by a
[36:02] actually light is being absorbed by a ball lens is sitting in front of it and
[36:04] ball lens is sitting in front of it and there's also a prism which directs the
[36:06] there's also a prism which directs the light and you can also see that uh the
[36:08] light and you can also see that uh the uh DC tracks that are supplying the
[36:10] uh DC tracks that are supplying the power laser also heating up. So this
[36:12] power laser also heating up. So this little module is a significant source of
[36:15] little module is a significant source of heat and if this is integrated into your
[36:17] heat and if this is integrated into your package then this is like a like a
[36:19] package then this is like a like a shining bulb that you need to control.
[36:22] shining bulb that you need to control. Uh typically historically what was
[36:24] Uh typically historically what was happening people would just place a tech
[36:26] happening people would just place a tech and a heat spreader underneath and
[36:28] and a heat spreader underneath and consider a job done. Uh however this led
[36:30] consider a job done. Uh however this led to some some issues down the line and
[36:33] to some some issues down the line and therefore uh uh the conclusion that we
[36:35] therefore uh uh the conclusion that we arrived at some ago that from management
[36:37] arrived at some ago that from management is quite underappreciated part of
[36:40] is quite underappreciated part of package design but as we go forward with
[36:42] package design but as we go forward with the high levels of integration of your
[36:44] the high levels of integration of your lasers modulators picks and everything
[36:46] lasers modulators picks and everything into a smaller footprints uh thermal
[36:49] into a smaller footprints uh thermal management and design have to be
[36:51] management and design have to be actually quite active in the in the code
[36:54] actually quite active in the in the code design of the entire package.
[36:56] design of the entire package. uh from electric coolers uh I guess many
[36:59] uh from electric coolers uh I guess many people know how how they work so I won't
[37:02] people know how how they work so I won't spend much time on it. Essentially you
[37:03] spend much time on it. Essentially you are driving a current through a set of
[37:06] are driving a current through a set of uh uh um connected uh legs which are
[37:11] uh uh um connected uh legs which are which are using pure effect to drive the
[37:13] which are using pure effect to drive the heat from your from your from one side
[37:17] heat from your from your from one side of your of your cooler onto the other
[37:19] of your of your cooler onto the other side. So one side gets hotter and the
[37:21] side. So one side gets hotter and the other side gets warmer as you drive
[37:23] other side gets warmer as you drive current uh through this device. Of
[37:25] current uh through this device. Of course, if you reverse the uh either the
[37:27] course, if you reverse the uh either the polarity of your current or you reverse
[37:29] polarity of your current or you reverse the tech, then you'll get uh you know,
[37:31] the tech, then you'll get uh you know, you get hot side on the top. But
[37:34] you get hot side on the top. But sometimes you don't want to do that.
[37:36] sometimes you don't want to do that. However, there is a limit to how much of
[37:38] However, there is a limit to how much of a temperature gradient you can generate
[37:40] a temperature gradient you can generate using or a cooling power that you can
[37:42] using or a cooling power that you can sustain using those pel coolers. So, in
[37:45] sustain using those pel coolers. So, in case you require delta t of greater than
[37:48] case you require delta t of greater than for example 70°, then you have to go for
[37:50] for example 70°, then you have to go for multi-stage tech. This is an example of
[37:52] multi-stage tech. This is an example of four stage tech that can go uh can get L
[37:56] four stage tech that can go uh can get L delta T up to 140°.
[38:00] delta T up to 140°. However, there's a fundamental limit to
[38:01] However, there's a fundamental limit to how much you can extract heat because uh
[38:04] how much you can extract heat because uh as you drive current through this
[38:06] as you drive current through this device, you can you also have internal
[38:08] device, you can you also have internal dual heating. So at some point you
[38:10] dual heating. So at some point you essentially are saturating the the
[38:12] essentially are saturating the the performance of the device and you cannot
[38:14] performance of the device and you cannot uh uh cool down anymore. So there's a
[38:16] uh uh cool down anymore. So there's a quite a uh there's a limit uh to how
[38:19] quite a uh there's a limit uh to how much heat you can extract using any part
[38:22] much heat you can extract using any part any particular cooler. So you have to
[38:24] any particular cooler. So you have to select those quite carefully to suit
[38:26] select those quite carefully to suit your uh uh u heat budget.
[38:31] your uh uh u heat budget. Then next thing you have to take care
[38:33] Then next thing you have to take care during design effort is look at your
[38:35] during design effort is look at your thermal stack. So for example on the
[38:37] thermal stack. So for example on the non-integrated uh uh
[38:41] non-integrated uh uh situation such as this where you have a
[38:42] situation such as this where you have a pick that sits on a heat spreader and
[38:45] pick that sits on a heat spreader and your EIC's or other controllers are far
[38:47] your EIC's or other controllers are far away in the PCB then of course you'll
[38:49] away in the PCB then of course you'll have a low thermal cross talk because F
[38:51] have a low thermal cross talk because F FR4 has a quite low thermal conductivity
[38:54] FR4 has a quite low thermal conductivity of just quarter of watts per meter
[38:55] of just quarter of watts per meter Kelvin so there will be very low thermal
[38:57] Kelvin so there will be very low thermal cross talk however you'll suffer high
[38:59] cross talk however you'll suffer high electrical losses for it on the other
[39:01] electrical losses for it on the other hand if you have a 3D integration as I
[39:04] hand if you have a 3D integration as I mentioned of your electronic circuit
[39:05] mentioned of your electronic circuit direct directly on the pick then you
[39:07] direct directly on the pick then you have very low electric losses but you
[39:09] have very low electric losses but you suffer very high thermal cross talk
[39:10] suffer very high thermal cross talk because silicon is quite good thermal
[39:12] because silicon is quite good thermal conductor and the heat has nowhere to
[39:14] conductor and the heat has nowhere to escape through except through the pick.
[39:16] escape through except through the pick. Then in the case of of 2 and a halfD
[39:18] Then in the case of of 2 and a halfD integration where you have everything
[39:20] integration where you have everything integrated in a common interposer and it
[39:22] integrated in a common interposer and it sits on a uh on a heat spreader then you
[39:27] sits on a uh on a heat spreader then you have low losses. However, the cross talk
[39:29] have low losses. However, the cross talk is quite significant especially the
[39:31] is quite significant especially the interposer is made of materials such as
[39:33] interposer is made of materials such as silicon. So again you have to really uh
[39:37] silicon. So again you have to really uh look into your how your uh temperature
[39:40] look into your how your uh temperature inter interactions between your EACs and
[39:42] inter interactions between your EACs and PICSS will affect your system.
[39:45] PICSS will affect your system. Then another thing that's uh worth
[39:47] Then another thing that's uh worth considering is are you firmly shorting
[39:50] considering is are you firmly shorting your device for example if your sub your
[39:53] your device for example if your sub your submount your metal submount which also
[39:55] submount your metal submount which also serves as in this case a heat sink to
[39:57] serves as in this case a heat sink to the to the thermal electric cooler is it
[39:59] the to the thermal electric cooler is it f thermally shorting your device. So if
[40:02] f thermally shorting your device. So if the heat is extracted from your pick,
[40:04] the heat is extracted from your pick, however, it can go back up using for
[40:06] however, it can go back up using for example these sides, these metallized
[40:08] example these sides, these metallized sides, uh typically the way we deal with
[40:11] sides, uh typically the way we deal with that is we just firmly isolate them
[40:13] that is we just firmly isolate them using some plastic spacers.
[40:16] using some plastic spacers. But this is uh uh this is sometimes
[40:19] But this is uh uh this is sometimes overlooked and then the uh but this can
[40:22] overlooked and then the uh but this can limit again the performance of your of a
[40:24] limit again the performance of your of a cooling mechanism.
[40:27] cooling mechanism. Well, if you want to obviously control
[40:29] Well, if you want to obviously control your temperature, you need some sort of
[40:31] your temperature, you need some sort of thermisters uh which are essential
[40:33] thermisters uh which are essential resistors which are very sensitive to
[40:35] resistors which are very sensitive to temperatures and typically in packaging
[40:36] temperatures and typically in packaging we deal with two types. One is a chip
[40:39] we deal with two types. One is a chip type uh which is quite a small chip. The
[40:42] type uh which is quite a small chip. The scale doesn't pay it justice. Uh but is
[40:44] scale doesn't pay it justice. Uh but is this can be quite a small module of the
[40:46] this can be quite a small module of the order of like several hundred microns
[40:48] order of like several hundred microns and it can be integrated either directly
[40:50] and it can be integrated either directly onto a heat spreader. You can see here a
[40:52] onto a heat spreader. You can see here a very small bead that's actually theister
[40:55] very small bead that's actually theister or or you can position your thermister
[40:57] or or you can position your thermister pads quite close to your pick to uh to
[41:00] pads quite close to your pick to uh to register the temperature quite
[41:01] register the temperature quite accurately. Then there's the bead type
[41:04] accurately. Then there's the bead type uh which is non-compact version but uh
[41:07] uh which is non-compact version but uh it's useful when integration with PCB is
[41:09] it's useful when integration with PCB is not possible. It's very difficult.
[41:10] not possible. It's very difficult. However, you can get quite close to your
[41:12] However, you can get quite close to your pick because you can integrate it for
[41:14] pick because you can integrate it for example as in this case into the heat
[41:17] example as in this case into the heat spreader itself. So your bead
[41:18] spreader itself. So your bead essentially sits just below your pick.
[41:21] essentially sits just below your pick. However, as I mentioned, you need a
[41:22] However, as I mentioned, you need a thermostat to stabilize the temperature.
[41:24] thermostat to stabilize the temperature. Uh there are also some other solutions
[41:27] Uh there are also some other solutions that you can have when you want to
[41:29] that you can have when you want to improve your heat spreading
[41:30] improve your heat spreading capabilities. So, PCBs as I mentioned
[41:32] capabilities. So, PCBs as I mentioned are quite uh uh the thermal conductivity
[41:35] are quite uh uh the thermal conductivity is quite low, but you can improve that
[41:37] is quite low, but you can improve that for example by integration of a copper
[41:39] for example by integration of a copper submount underneath the pick and then
[41:41] submount underneath the pick and then again uh on the back side you can
[41:44] again uh on the back side you can integrate an aluminum heat spreader
[41:45] integrate an aluminum heat spreader which is connected the submount. you
[41:47] which is connected the submount. you have very very good uh heat transmission
[41:49] have very very good uh heat transmission between your uh photonic integrated
[41:52] between your uh photonic integrated circuit and your uh thermal stack
[41:54] circuit and your uh thermal stack firmware control stack.
[41:57] firmware control stack. Um
[41:58] Um going back to the 2.5D integration um if
[42:02] going back to the 2.5D integration um if you for example have a silicon reposer
[42:04] you for example have a silicon reposer as mentioned there can be quite a high
[42:07] as mentioned there can be quite a high uh thermal coupling between your EIC's
[42:10] uh thermal coupling between your EIC's and your photonic integrated circuit
[42:12] and your photonic integrated circuit which is why uh silicon is while quite
[42:16] which is why uh silicon is while quite good interposal material in terms of you
[42:18] good interposal material in terms of you know electrical properties it's not an
[42:22] know electrical properties it's not an ideal neck of course next to the price
[42:23] ideal neck of course next to the price it's not ideal as uh during for the
[42:26] it's not ideal as uh during for the design of the thermal stack. That's
[42:28] design of the thermal stack. That's another reason why uh some companies
[42:31] another reason why uh some companies have been turning towards glass as their
[42:33] have been turning towards glass as their interposal material because it can it
[42:36] interposal material because it can it has very low uh thermal conductivity
[42:39] has very low uh thermal conductivity which means if you have your photonic
[42:41] which means if you have your photonic chip and electronic chip integrated side
[42:43] chip and electronic chip integrated side by side then you'll have low uh
[42:46] by side then you'll have low uh horizontal thermal cross talk and you if
[42:48] horizontal thermal cross talk and you if you make these lines very short then you
[42:50] you make these lines very short then you can also have low loss earth
[42:51] can also have low loss earth transmission. Uh however these chips
[42:54] transmission. Uh however these chips will still generate heat. Uh so if you
[42:57] will still generate heat. Uh so if you want to extract the heat from the stack
[42:58] want to extract the heat from the stack then you can integrate through glass vs
[43:01] then you can integrate through glass vs which will actually not only serve as
[43:03] which will actually not only serve as your connection layer between the PCB
[43:06] your connection layer between the PCB and your chips but also can use be used
[43:08] and your chips but also can use be used to extract uh uh extract heat from your
[43:12] to extract uh uh extract heat from your from your electronic circuits. So the
[43:14] from your electronic circuits. So the flow management this case can be solved
[43:16] flow management this case can be solved using VS and this is actually quite a
[43:19] using VS and this is actually quite a good engineering approach that we're
[43:21] good engineering approach that we're actively working on in several projects.
[43:23] actively working on in several projects. And the way you typically fabricate
[43:25] And the way you typically fabricate those VS and glass is you modify your
[43:28] those VS and glass is you modify your glass substrate partially using a laser.
[43:31] glass substrate partially using a laser. Then uh wet etching uh kind of exposes
[43:34] Then uh wet etching uh kind of exposes the uh the you know the cavities. Then
[43:36] the uh the you know the cavities. Then you then put a seed a PVC seed layer and
[43:40] you then put a seed a PVC seed layer and then you electroplate the rest of the uh
[43:43] then you electroplate the rest of the uh of the cavity to fill the fill them with
[43:46] of the cavity to fill the fill them with uh for example gold or copper and then
[43:49] uh for example gold or copper and then of course you have to grind down to
[43:51] of course you have to grind down to expose the bottom surface. So here is
[43:52] expose the bottom surface. So here is how it looks like uh from the side
[43:56] how it looks like uh from the side and the effect of TGVs is essentially
[43:58] and the effect of TGVs is essentially you are improving your vertical thermal
[44:00] you are improving your vertical thermal conductivity. So if an untreated glass
[44:03] conductivity. So if an untreated glass has 1.2 to watts per meter kelvin. In
[44:05] has 1.2 to watts per meter kelvin. In this case, for example, when we
[44:07] this case, for example, when we integrated a uh a ref thermal reference
[44:10] integrated a uh a ref thermal reference pick onto a glass substrate, you can see
[44:12] pick onto a glass substrate, you can see temperatures can reach up to 173°.
[44:16] temperatures can reach up to 173°. Uh then again, if we have uh integrated
[44:20] Uh then again, if we have uh integrated through glass vs but they're unfilled
[44:21] through glass vs but they're unfilled with copper, then our conductivity of
[44:23] with copper, then our conductivity of course drops, which leads to higher
[44:25] course drops, which leads to higher temperatures. However, once those TGVs
[44:27] temperatures. However, once those TGVs are filled with copper, then our
[44:29] are filled with copper, then our vertical thermal conductivity improves
[44:31] vertical thermal conductivity improves quite substantially and the temperatures
[44:33] quite substantially and the temperatures uh drop. So, this is a very good method
[44:35] uh drop. So, this is a very good method to actually firmly control local even
[44:38] to actually firmly control local even you can even locally control your
[44:39] you can even locally control your thermal uh your uh components such as
[44:41] thermal uh your uh components such as PICS.
[44:43] PICS. And we using this method in several
[44:46] And we using this method in several projects. This is just one example of
[44:48] projects. This is just one example of which where we integrate a laser and the
[44:50] which where we integrate a laser and the photonic integrated circuit onto a a
[44:52] photonic integrated circuit onto a a glass glass platform. You can see here
[44:55] glass glass platform. You can see here there are some fuggas vas which uh
[44:57] there are some fuggas vas which uh translate u electrical tracks from the
[45:01] translate u electrical tracks from the top layer to the bottom layer and again
[45:04] top layer to the bottom layer and again the same is done for laser actually
[45:05] the same is done for laser actually there are some bonding uh wire bonding
[45:07] there are some bonding uh wire bonding pads for the laser on the side but the
[45:09] pads for the laser on the side but the heat extraction in this case will be
[45:11] heat extraction in this case will be done using fugas vas and this ensures
[45:13] done using fugas vas and this ensures that due to very low lateral thermal
[45:15] that due to very low lateral thermal conductivity we'll have very small cross
[45:18] conductivity we'll have very small cross talk between the laser and the pick
[45:19] talk between the laser and the pick itself and thanks to the uh filled
[45:22] itself and thanks to the uh filled copper glass vs we can have high
[45:24] copper glass vs we can have high vertical conductivity which will extract
[45:26] vertical conductivity which will extract the the heat sorry extract the heat from
[45:29] the the heat sorry extract the heat from the laser so that uh there is so that it
[45:32] the laser so that uh there is so that it can work at at a normal stable
[45:34] can work at at a normal stable temperature.
[45:36] temperature. So takeaway message from the f thermal
[45:38] So takeaway message from the f thermal part is uh you shouldn't underestimate
[45:41] part is uh you shouldn't underestimate thermal aspect of packages. they're
[45:43] thermal aspect of packages. they're actually quite critically important and
[45:45] actually quite critically important and going forward will be even much more
[45:46] going forward will be even much more important as you as you want to you know
[45:49] important as you as you want to you know obviously uh a thing that I haven't
[45:51] obviously uh a thing that I haven't talked about but is actually quite
[45:53] talked about but is actually quite important is your overall budget because
[45:55] important is your overall budget because uh overall electrical budget like your
[45:57] uh overall electrical budget like your your uh your electricity bill
[45:59] your uh your electricity bill essentially the more power you put into
[46:02] essentially the more power you put into your your package you not only have to
[46:04] your your package you not only have to you know to to drive it but you also
[46:06] you know to to drive it but you also have to extract heat from it. So the
[46:08] have to extract heat from it. So the power bill uh for the for just the heat
[46:10] power bill uh for the for just the heat management is uh can be quite
[46:12] management is uh can be quite significant. That's why many data
[46:15] significant. That's why many data centers are now being built at the
[46:16] centers are now being built at the bottom of the lakes in order to help
[46:18] bottom of the lakes in order to help with that uh that heat management. So
[46:20] with that uh that heat management. So don't overlook it. It's actually quite
[46:22] don't overlook it. It's actually quite important.
[46:23] important. Uh and u essentially the from management
[46:28] Uh and u essentially the from management is an active area of research and using
[46:30] is an active area of research and using glass and microex uh these are areas
[46:34] glass and microex uh these are areas that are uh quite active. we are quite
[46:36] that are uh quite active. we are quite active and uh uh this is one we believe
[46:39] active and uh uh this is one we believe this is a good engineering way this is a
[46:41] this is a good engineering way this is a good engineering approach to firmly
[46:43] good engineering approach to firmly manage your packages coming in the
[46:44] manage your packages coming in the future so thank you very much for uh for
[46:48] future so thank you very much for uh for attention
[46:50] attention and uh if there are any questions we'll
[46:53] and uh if there are any questions we'll take them now very good thanks very much
[46:55] take them now very good thanks very much camel