# EPIC Online Technology Meeting on PIC Packaging

https://www.youtube.com/watch?v=RR-O-anu0SA

[00:00] good afternoon everyone it is three o'clock.
[00:03] three o'clock in the netherlands and we are global today.
[00:07] we have people from california all the way to japan all the world talking about one thing.
[00:12] that makes us very very very very focused of photonic integration packaging and testing.
[00:21] let's bring together the entire supply chain to connect with the photonics industry.
[00:27] when it comes to packaging of photonic integrated circuits.
[00:31] making industry standards has to be the final long-term goal.
[00:34] but what about today.
[00:37] i believe that the short-term goal is that all of us need to be working together.
[00:42] and not reinventing the wheel.
[00:46] so in our epic online technology meeting on monday april 26th we should address where is the industry going for integrated photonics packaging.
[00:56] what are the thoughts around design rules for peak packaging and standard ways of linking the
[01:01] packaging to the testing of the chips.
[01:04] we have invited companies who are working already on defining standard packaging rules and we will discuss what part of the packaging needs to be a standard for everyone.
[01:16] it could be where to place fiber arrays on the chip or perhaps the relative position between the dc and the rf contacts but which packaging rules are the same for all the applications.
[01:29] for example, a company that is packaging fncw lidar like scantinel has different packaging requirements to accompany doing self-tuned ultra-fast transceivers like effect photonics or ultra-fast polymer based modulators like lightweight logic.
[01:47] those design rules can only be properly defined if we invite all actors to the table.
[01:54] just to name a few, we will have in the sunroom nvidia, facebook, molex, sequoia.
[02:02] the e-connectivity broadcom cisco intel and there are issues to discuss and collaborations to start.
[02:12] for example the recurring discussion is around active or passive alignment or both.
[02:15] i put my money on both.
[02:18] do we need micro optics assembled individually with pecan place technology on the top of photonic integrated circuits or do we foresee the direct processing of micro optics as a new layer in wafer level packaging.
[02:35] here my money is on waster level packaging.
[02:38] at the european pilot line picks up sus micro optics is providing micro optics using nano imprint lithography and bandware photonics is using two photon polymerization for ultra high resolution 3d printed micro optics indeed.
[02:56] wafer level packaging is the promised land.
[02:59] we are following recommendations from epic members in the semiconductor industry such as st.
[03:06] microelectronics.
[03:07] or atns remember they had to make similar decisions 40 years ago.
[03:11] we want to move as many packaging processes as possible from die to wafer level but what can we move when and how and which kind of volumes justify such paradigm shift.
[03:26] finally for many new applications that photonics is addressing you need your working demonstrator produce as quickly and inexpensively as possible.
[03:34] that may mean producing a non-optimized package that allows you to show the proof of principle.
[03:43] are there such packaging solutions available today and are they inexpensive enough to offer innovators a genuine test before invest opportunity.
[03:55] if you want to contribute to our deep dive discussion on the next step challenges for big packaging sign up immediately to follow up with our experts in the epic school room on april 26th.
[04:09] thank you very much and please accept my apologies for the a little bit longer introduction that we are used to but the topic today is very important.
[04:15] we really want to address with equipment suppliers all the way to semiconductor manufacturers.
[04:22] what process is dependent on application and what is independent.
[04:26] what decent rules can we have are most important most important what players do we need to bring to the table.
[04:33] it's gonna be a fantastic next two hours.
[04:35] first of all i would like to acknowledge for many of you already know.
[04:39] last week two weeks ago we accomplished a fantastic milestone we are now 700 friends in the family.
[04:42] thank you very much all the members of epic of supporting the association.
[04:49] no matter how fast or how much we grow we'll always know each member individually that's what defined epic and that is never going to change.
[04:56] my name is joseph and talking on behalf of a fantastic and amazing team of epic technology experts.
[05:04] 15 people work at epic couple they have a phd with a great gender balance and with great enthusiasm this is the place for.
[05:11] us to work and we love working for epic.
[05:13] organize events we provide access to a network.
[05:15] we help you raise capital.
[05:17] we have the biggest website to find a job in the whole world in photonics.
[05:20] jobsynphotonics.com.
[05:21] and anybody who is a member of epic has a long list of market reports available for them to help with their technology company strategy.
[05:29] but today today we talk about peak packaging.
[05:31] these are the events that we have announced all the way to summer holidays.
[05:36] have a look at the one that we have on the 7th of june.
[05:39] pixel manufacturing and applications with the main main leaders on vixen manufacturing.
[05:46] looking at what what technologies they need for the packaging of their pixels.
[05:49] that meeting is going to be epic as epic as today's meeting.
[05:53] first of all thank you very much your media partner pick magazine thank you for all the effort you're doing in promoting the activities of epic.
[06:00] but most important let me take a deep breath.
[06:02] this meeting wouldn't be possible with a supporter as sponsors today.
[06:05] first of all fi contact ficon tech.
[06:07] ficon tech is a company actively applying high volume production line to any company who wants to take.
[06:13] peak packaging to the next level equity manufacturing.
[06:16] based on active alignment for sensors for lighter frosty communications all the way to navigation inertial sensors.
[06:21] but if you are looking for a company to take that equipment and make services for that the companies in singapore is an old set of photons.
[06:31] the company is called focus providing manufacturing of photonic into the circuits package process ofs is your panel for a specialty fiber and telecom fiber.
[06:40] you're looking for a customized fabric fiber solution go to ofs that help you.
[06:45] if you're looking for a european company setting up stone in something never done before offering packaging of photonic interview circuits into volumes.
[06:55] fix is a success story all the way from schedule the other partner of choice.
[06:59] if you are looking for thermoplastic material you're looking for the material to make the optics wafer level optics the micro optics sustained resistable to every environment safix here in the room.
[07:11] if you're looking for a partner to help you with the back-end process and the wire bonding.
[07:14] of any photonic internet circuit or any opto-electronic device.
[07:17] your partner is imtech.
[07:19] what you're looking is my for micro optics.
[07:23] micro optics is the company we have here is access all the way to switzerland developing micro optics and mems combined.
[07:30] being able to help you with the needs for the packaging solutions but you're looking for semiconductor equipment manufacturer or a company to help you with the wafer bonding.
[07:39] they are in fluorine and ink they are in austria the company is called ebg.
[07:44] and if you don't you need further help on choosing if you want to go for active and passive alignment you want a non-stop shop to to help you with the right equipment for your manufacturing process.
[07:54] you have to go to burtsburg the company is iphoteg.
[07:58] iphotec will help you defining the whole process and setting in your place the machine of your needs for the volume production of integrated photonics.
[08:06] and setting me in my place and helping me helping me with everything is my good friend i'm better r d manager dr anna gonzalez.
[08:13] congratulations on all.
[08:16] The hard work you have put on this.
[08:17] Tell us what's going to happen in the next two hours.
[08:19] Thank you very much, Jose, for this introduction.
[08:21] Yes, I could not be happier today because we have really had us a very nice meeting.
[08:25] So we are going to have discussions about the standardization versus a customized packaging.
[08:31] Also, we are going to talk about how to reach these large volumes.
[08:37] Also about new materials, everything.
[08:40] And well, we are expecting a lot of discussion with all the companies presented today at the meeting.
[08:44] All the supply chain in photonic packaging and assemblies here today.
[08:51] So yes, we have all the companies doing vertically integrated networking solutions.
[08:55] Optical communication market is a very, very important one for us.
[08:57] We have all the companies doing services for packaging and assembly, or the companies doing equipment.
[09:04] Companies doing semiconductor manufacturing materials, everything.
[09:10] And well, last but not least, all the European initiatives that are in which we are participating.
[09:17] So then we have photon hub for these companies that are thinking about developing a product in photonics and we can help them financially and also with the expertise and with a with training.
[09:30] Also we have a JPEG spine online for these companies thinking about going to pilot production with indium phosphide chips.
[09:37] Ahs and also there is an open call now we can help them.
[09:42] And then we have Pixar for packaging and assembly of all these chips.
[09:45] And then we have Passion that is developing an entire a structure for architecture for a for optical communications in which we have pixels integrated with silicon photonics and method.
[10:00] Methappies for all this company that want to develop a product for medical applications based on photonics.
[10:07] And that's it back to you Jose.
[10:10] Anna has a huge passion for pilot production of photonics being done in Europe.
[10:13] She's doing a fantastic job on that congratulations and I'm working with the European Commission.
[10:18] on this this slide only corresponds to the companies who registered for the meeting today.
[10:23] so you're an epic member you forgot to register for this meeting that resulted in your logo not appearing on this slide.
[10:28] don't let this happen again register for the online meetings that are interesting for you.
[10:33] of course they are free of charge.
[10:33] this meeting is also live stream in youtube so hello youtubers of the world.
[10:37] thank you very much for being with us today.
[10:39] please use the chat to post all your questions.
[10:42] i will read them in the room and you have any questions you have any chance of linking with the company you want to get in touch with any of the participants today.
[10:48] throw me an email hosting the spot to atepec that's asset.com and i will be more than happy to make that introduction.
[10:54] and this is of course also valid for the people here with me in the zoom room.
[10:57] use the chat we have a private chat use it to connect to each other.
[10:59] this meeting is about connecting.
[11:03] if after the meeting you didn't get a chance to speak to that person that you really wanted to drop me an email hosted.com and i would love to make that introduction.
[11:10] let's get the meeting started.
[11:14] a meeting about packaging in epic could only start one way.
[11:18] could start with the person who directs
[11:21] the picks up by the line and is bringing everyone working together on using the same design rules for the packaging thinking about packaging all the way from design perspective.
[11:32] peter o'brien thank you very much for starting for kicking off this fantastic meeting today.
[11:38] the floor and the attention of everyone goes to the beautiful city of cork goes to the international institute goes to the director of picks up the floor is yours jose.
[11:48] thank you very much can you hear me okay.
[11:50] loud and clear yeah perfect thanks.
[11:53] thanks very much and anna and everyone in epic for organizing this.
[11:56] so it's great to see some faces again and as josue said um it's what's important i want to talk about today is not what we do in this you know this packaging services and picks up because really we're not we're not there to you know we're there to support industry.
[12:10] but really what i want to talk about is the move towards standardization and looking at lower cost packaging and you know how we're how we're working both in europe and globally to to
[12:21] achieve that.
[12:22] so you've probably seen this before um.
[12:25] the kind of packaging capabilities that we originally developed and picks up and we're continuously adding to those.
[12:31] so a whole range of optical electrical thermal mechanical and they're working very well and we're engaging with now you know about 150 um companies across the world and from multinationals to startups smes um and a whole range of applications and as josue said we have to be very careful that we're not you know customizing reinventing the wheel um and making sure that we we really kind of like develop their standards in that way.
[13:02] so i think this view graph really captures that and essentially what you have on the left hand side is what we call the foundry pdk.
[13:09] so this is the process design kit so typically that would include things like modulators and different types of waveguides and different functionality on the actual photonic chip and um there's building blocks there's
[13:23] There's a library and for example up to designer with synopsis.
[13:27] Make that available so it's relatively straightforward process to be able to lay out a photonic device.
[13:33] Go to a foundry and that's validated that PDK is validated.
[13:38] So what we've been trying to do picks up besides you know developing what the packaging capabilities and offering to people offering those capabilities to people industry.
[13:47] And is really to kind of try and put a standard process around that.
[13:51] So over the last number of years what we've been doing is developing what we call an ADK.
[13:55] And that's an assembly design kit.
[13:58] So in that ADK we've got a whole range and it goes back to that previous view graft I showed fiber attach micro optics flip chip with electronics different types of electrical packaging ribbon.
[14:09] And I also mentioned flip chip but different types of wire bonds laser integration.
[14:13] And we're continuously adding to those.
[14:16] And we basically it complements the the PDK and when you bring those together and again we've been working with synopsis because they're part of
[14:23] our pilot line formalizing that into a standard offering.
[14:27] so again it's a software driven adk much like the pdk so designers can can pull from the library um and uh build out their their package.
[14:36] so ensure that the chip is laid out that it can be packaged.
[14:39] and we don't want that just to be from a from a pixar perspective we want to make sure that the companies across the europe and across the world and other foundries like um aim photonics and i'll give an example of how we're working with aim we take a similar approach.
[14:53] and then on the label people then for different applications to uh to to lay out the chip that it's suitable for packaging.
[15:00] so this is just one example and this is one of our demonstrators we have a number of demonstrators to show how all this can be done.
[15:08] so this is basically the pdk so you lay out your chip but it's laid out in such a way the adk interfaces with that.
[15:17] so as i say this is a capability we've developed up in pixap where we got the different types of electrical ribbon standard wire bonding flip chip.
[15:24] these are drivers for the the modulators on the silicon photonic chip.
[15:27] you can see this hybridly integrated laser and micro optics.
[15:31] and then they're the the the the amplifier the receiver.
[15:36] and again this is a demonstrator to show how all of that works.
[15:39] and what's really important is that the chips are laid out for packaging so we've worked with foundries in europe.
[15:45] we have these uh what we call reference chips so they're following these design rules.
[15:49] and and basically if you follow these design rules this adk that since in the synopsis software the chips can be packaged.
[15:57] and as i say we want to ensure that it's not just pixab.
[16:01] other packaging providers you know they they can avail of this type of layout uh situation so this is a very nice example.
[16:08] so when the chips are laid out in a formalized way and they follow the respect the design rules.
[16:13] here you can see for example ficontech are using these chips to validate equipment installs because these are standardized layouts.
[16:20] so the customer who buys this machine does
[16:24] not have to use their own product
[16:25] because you know you're assuming that
[16:28] the product will be
[16:29] following these adks so then therefore
[16:32] you can use this kind of agnostic or
[16:33] generic reference chip to validate the machine
[16:37] so that's just one example of how these reference picks
[16:39] not just are useful for validating packaging processes but also equipment
[16:43] and other materials like fiber arrays
[16:46] micro optics etc etc so this principle
[16:49] of this type of generic reference break has proved very very interesting and we're starting to work with other foundries around the world
[16:55] so this is a very nice example over the last year we've worked with aim photonics the foundry in the us
[17:00] and stefan preble tom brown and david harmay in name
[17:04] and again they've kind of copied our approach so as you can see in this particular chip
[17:08] uh it's basically like a swiss army knife if you want to call it a whole array of optical electrical ios
[17:14] edge couplers grading couplers
[17:16] bonds for flip chip wire bonding or f lines photodiode
[17:19] heaters and we're currently working on investigating how we can integrate lasers into this so two and a half d
[17:25] type integration.
[17:27] and again it's a standardized design.
[17:29] following the adk rules.
[17:31] so finally just i want to mention a new,
[17:33] very exciting project we're working on.
[17:35] called photonic leap.
[17:36] and it's kind of following that kind of adk approach.
[17:37] we're bringing in new technologies and this is driven around surface mount.
[17:41] and using micro optics so we're developing processes for integrating micro lenses onto picks.
[17:46] and again taking that surface mount so really reducing the cost.
[17:49] of packaging by by about order of magnitude if not more.
[17:55] so that enables us then to do things like multi-project wafer runs because as josue said it's wafer level packaging.
[18:02] and we can standardize the layout so our ultimate objective is to move towards adks and design rules.
[18:05] and then we can scale up from multi-project runs to large-scale wafer runs.
[18:09] and also the layout is compatible with wafer level testing both optical and electrical.
[18:15] this is type of ball grid array so again standardization.
[18:18] we're trying to drive that towards standardization.
[18:22] so i'll leave it at that and open it for questions.
[18:23] thanks.
[18:25] thank you very much peter super.
[18:27] interesting presentation as always.
[18:29] okay so we have been hearing a lot about the standardization right.
[18:33] and yes pixar has been working a lot in trying to standardize standardized processes at all the levels of the supply chain so it's not always not only about the packaging right.
[18:45] it's also that we need to talk with the foundries and we need to talk with other actors to make it possible.
[18:51] um what would you say that are the where should we put more effort here to get really all this supply chain uh working like only one and to go to these large volumes.
[19:05] well i think actually what we're beginning to find now is a lot of the foundries have different layout scenarios.
[19:11] so and you can standardize packaging to some degree but to another degree you have to be able to interface with foundries and you know the question is can foundries adopt their processes so do you change packaging to adopt each foundry and by.
[19:27] that I mean, you know, silicon and Indian phosphide are probably two very different, uh, scenarios.
[19:33] But even within silicon photonics, we're beginning to see, um, different layouts, uh, different, you know, oxide layer thicknesses, uh, you know, certain scenarios of electrical integration are quite different.
[19:44] And another area that is kind of like a secret sauce, if you want to call it, is things like epoxies.
[19:49] So, and one of the big challenges that we're finding at the moment, you know, when you start a project with a company, they really just want to get their parts made, prototyping.
[19:58] But then they move to the next level where they're looking at reliability and things like solar reflow compatibility.
[20:03] Proxies are very, very, you know, challenged in that environment, and they can start to fail.
[20:10] They start to move, you have CTE differences.
[20:13] So that's another area.
[20:15] So I think it's important to start to get the material suppliers involved as well.
[20:18] So it's not just the foundries and the packaging houses and the equipment providers.
[20:22] It's the kind of, you know, the different types of suppliers of different epoxy materials, and we're also looking.
[20:28] at solder so using solder instead of
[20:30] epoxy so metal solders and metallizing
[20:33] fiber arrays and things like that so
[20:35] that's the next area that needs to be
[20:36] developed so materials are important
[20:39] very good that you mentioned about
[20:40] materials because we have in the room a
[20:42] few companies say
[20:43] that i'm sure they can help you but
[20:46] let's come back to the
[20:47] standardization and the standardization
[20:50] topic
[20:50] because i would like to give now the
[20:52] floor to john from a bay photonics
[20:55] hello john how are you doing everything
[20:57] fine
[20:59] yes everything's fine thanks hope you
[21:00] can hear me maybe you could comment
[21:03] uh about the approach uh that you have
[21:06] at bay photonics say
[21:07] that probably is not related to a
[21:09] standardization but
[21:10] more about customizable customized
[21:13] packages
[21:14] right yes um we whilst
[21:17] the processes might be standard becoming
[21:21] standard
[21:22] most of the applications and most of the
[21:24] individual requirements
[21:26] are pretty much custom and from that
[21:28] perspective we're looking on how to
[21:30] combine
[21:31] capabilities associated with uh rf
[21:34] design on board
[21:35] optical design on board how to include
[21:38] micro optic devices
[21:40] into each package to make the
[21:43] assembly low cost perhaps hermetic
[21:46] and make it in a way that's suitable for
[21:49] manufacture using the standard equipment
[21:53] that is becoming available
[21:55] for assembly and test so from our
[21:58] perspective
[21:59] pdks might be a great start but
[22:01] unfortunately it goes a lot further than
[22:03] that
[22:04] and you're involving so many more
[22:08] areas of physics to actually get results
[22:11] and you're using
[22:12] the expertise of people that have worked
[22:14] in photonics and electronics for
[22:17] 20 30 years to understand how to make
[22:20] those solutions a reality within
[22:24] a package so standardization for us from
[22:27] the design and prototype stage
[22:29] doesn't really exist right now and can't
[22:32] really see it going that way
[22:33] unfortunately
[22:34] well i i i strongly contest that because
[22:38] the foundries we work with the large
[22:39] foundries
[22:41] they basically pdks are the way they
[22:43] operate
[22:44] and you know i think it's important
[22:47] one of the challenges is when you look
[22:49] at an application do you
[22:51] do you bend to the application
[22:52] requirements are
[22:54] do you ask the application engineers to
[22:56] say these are the rules
[22:57] in electronics that's the way you do it
[23:00] you say this is the way
[23:01] it's designed and really photonics for
[23:04] too long really
[23:05] has been highly customized and it's
[23:08] you know so adapting to the way
[23:11] boundaries work for example in silicon
[23:12] photonics
[23:14] they are extremely rigid and they don't
[23:16] change
[23:17] it's billions invested in those lines so
[23:19] it's
[23:20] not possible to modify those so having
[23:23] adks and pdks
[23:24] essentially is the only way they can
[23:26] operate and having it standardized
[23:29] modifying those processes are enormously
[23:32] expensive
[23:33] yep and completely agree with that and
[23:35] uh
[23:36] we don't anticipate asking foundries or
[23:39] semiconductor or
[23:40] um pick designers to modify their design
[23:44] design techniques indeed quite often
[23:46] pics are designed
[23:48] a lot before they actually come to us
[23:50] and ask so now how are we going to
[23:51] assemble and package it
[23:53] uh so we then have to modify our
[23:55] approaches uh
[23:56] to allow the capability of a
[23:58] standardized
[23:59] pick um design method yeah
[24:03] garani we can really ask the founders if
[24:05] we want
[24:06] for example we have here a milan from
[24:09] university of southampton
[24:11] hello milan how are you doing
[24:15] hello hello anna hello everyone i'm
[24:18] doing well
[24:19] you have a question for peter right and
[24:21] also maybe you can get your opinion
[24:23] from a i mean as cornstar as well
[24:26] yes about this standardization i mean
[24:30] yes i mean we are talking about
[24:32] standardization for a long time and i
[24:35] think
[24:35] i agree that you know i think we will
[24:37] meet uh
[24:38] we'll need some standardization in
[24:40] silicon photonics
[24:42] uh the the question i had uh for for
[24:44] peter is more about the costs
[24:46] so in one of his slides i think he
[24:49] mentioned that he reduced the cost of
[24:51] packaging
[24:52] so in your opinion peter what do you
[24:55] think
[24:55] what proportion of the entire product
[24:57] costs do you think is reasonable
[25:00] to be used for packaging and wafer scale
[25:02] testing
[25:03] uh in the overall production line
[25:06] yeah well it drops with volume but right
[25:09] now packaging is is well
[25:10] and test is over 50 and if you look at
[25:14] electronic packaging it's down around
[25:15] say 10
[25:16] 20 i i do believe that um
[25:19] we need to move i think mems packaging
[25:22] is somewhere where
[25:23] we can start to move towards that's why
[25:25] things like surface mount
[25:26] type approaches are important so we
[25:28] standardize the uh the design format
[25:31] um and moving down to maybe 30 percent
[25:34] of the cost
[25:35] you have very expensive materials like
[25:36] fibers very expensive and they're
[25:39] they are to some degree customize you
[25:41] know they're they're handmade almost
[25:43] um so so that that's a that's a real
[25:46] challenge so
[25:46] avoiding those like for example global
[25:48] foundries and ibm i think alexander will
[25:50] talk about their v-groove integrated on
[25:52] their pick
[25:53] now that's a that's basically a pdk
[25:55] integrated from a packaging perspective
[25:57] that really drops the packaging costs
[25:59] down
[25:59] so using that type of approach you know
[26:02] you're you're moving down to maybe
[26:04] 30 but at the moment it's it's well
[26:06] above 50
[26:07] 60 percent and for including test um
[26:11] and that really comes down to the uh you
[26:13] know
[26:14] the lower volumes and one thing i would
[26:16] say is that
[26:17] generally you know years ago we engaged
[26:20] with people who came to us with picks
[26:22] designed majority of people i would say
[26:25] by far the majority of people come to us
[26:28] before to design any pick now
[26:30] and we we basically say do this and do
[26:32] not do that
[26:33] and in some cases we can't work with
[26:35] them because the pics have been designed
[26:37] such that they cannot be packaged
[26:40] so that's what drives the course way up
[26:41] and i think that what gives a reputation
[26:43] of packaging
[26:44] has been so expensive um but if you
[26:47] follow those rules
[26:48] you know and the pdk the adk is a great
[26:51] way of doing it because
[26:52] it's in the software you don't have to
[26:54] read a book or a manual and and try and
[26:56] interpret that
[26:57] and that can bring the cost down below
[26:59] to 50 and it's moving down towards you
[27:01] know
[27:02] i i think men's is a good way of you
[27:04] know looking at it it's it's not
[27:06] very low cost electronic it's summer in
[27:08] the middle
[27:09] okay uh thank you very much and just one
[27:12] more quick question
[27:13] regarding the wafer scale testing um
[27:16] how long do you think this should be
[27:18] done i mean is this like a few minutes
[27:20] per wafer
[27:21] or you know like uh well
[27:24] okay so this this comes down to are you
[27:26] doing functional testing so you're
[27:27] actually testing the full functionality
[27:29] of what you're making or are you doing
[27:30] cell testing
[27:31] so and and there are lessons we can
[27:33] learn from the electronics world
[27:35] so are we looking at a portion of the
[27:36] chip are we checking checking
[27:38] you know waveguide coupling are we are
[27:40] we just looking at a modulator a test
[27:42] structure are we looking at the full
[27:44] part but you know ultimately it's going
[27:46] to come down to ease of access so
[27:48] probing so
[27:49] for example our surface mount wafer
[27:51] level type structure
[27:52] that without the photonic leap has it's
[27:55] got a ball grid array at the bottom so
[27:56] you can probe electrically and then the
[27:58] optical axis is from the top so you can
[27:59] easily move across
[28:01] and that's you kind of got to work from
[28:03] you know from the uh what you want to
[28:04] make
[28:04] ultimately and work back and say how can
[28:06] we make a package that achieves that
[28:08] so something like a surface mount ball
[28:09] grid array will enable that
[28:11] so we're looking at you know seconds
[28:13] really for from a test
[28:14] i i would say that kind of scenario
[28:18] thank you so much okay thank you very
[28:21] much
[28:22] for this discussion now i would like to
[28:24] give the floor to another company that
[28:26] is doing also is providing also
[28:27] packaging services
[28:29] so sander from c e atc
[28:32] do you think it's a good moment now to
[28:34] explain what are the services that you
[28:36] are providing
[28:38] uh yes yeah perfect so i i just
[28:40] forwarded a slide but i would say that
[28:42] we are not really a packaging company we
[28:45] are more
[28:46] a company where we develop the
[28:48] technologies to integrate chips into
[28:50] packages
[28:51] maybe if you want to share this this
[28:53] light oh i i thought
[28:55] i would have fought it but i can't share
[28:57] it of course there's the green button
[28:59] down
[29:00] yeah yeah but then i have to open it
[29:01] give me a minute
[29:08] sorry
[29:22] if you can go to presentation mode
[29:26] a computer would let me and yes here it
[29:28] is
[29:29] yeah so i work at citc so
[29:32] we are the chip integration technology
[29:34] center we are located in inagan
[29:37] in the semiconductor valley in the
[29:40] netherlands i would say
[29:42] and last year we started a podium which
[29:45] is in consortium of several companies
[29:48] it consists of citc fix techema and pi
[29:53] and we focus ourselves on developing
[29:56] technologies to integrate
[29:57] photonics into into packages
[30:00] so we provide the packaging services
[30:03] from the entire process chain
[30:04] so we as ctc we would develop
[30:06] technologies and
[30:08] in the end fix could do the packaging
[30:11] themselves
[30:12] so we focus more on the materials
[30:15] and on high performance diet attach flip
[30:18] chip bonding technologies which could be
[30:20] later be used by fix
[30:22] and where then tahima npi provides the
[30:25] equipment and tooling for that
[30:30] yeah okay and what will you say that are
[30:32] the collaborations that you are looking
[30:34] for in our network are you looking for
[30:36] packaging companies to
[30:38] do more the r d um so i think we
[30:42] were interested in companies who would
[30:44] like to develop their
[30:46] yeah their concepts or their ideas
[30:48] towards a industrial
[30:50] path or to bring into high volume
[30:52] manufacturing
[30:53] things and we are also interested in
[30:56] developing new materials
[30:58] such as high performance diet attach
[31:01] so we're bringing better performance to
[31:03] the performance of the dice so
[31:05] better cooling or better temperature
[31:07] control
[31:08] and higher reliability and positioning
[31:10] those kind of technologies
[31:14] okay thank you very much okay so then if
[31:16] there are no more questions or more
[31:19] comments about this part uh thank you
[31:21] very much peter for this presentation
[31:23] and thank you everyone that
[31:24] participated in this interesting
[31:26] discussion and now it's my pleasure to
[31:28] introduce you to michael levy from
[31:30] lightweight logic
[31:32] so just please michael if you want the
[31:34] floor is yours
[31:46] okay michael we can see your slides i
[31:49] don't know if you are mute
[31:55] no everything fine
[32:01] and now there is some something happens
[32:03] because we cannot hurt you michael
[32:12] hello michael
[32:17] okay so yes maybe you can remove your
[32:20] headphones
[32:22] i can yes no perfect
[32:26] so can you see the slides i go into
[32:28] presentation mode
[32:29] not anymore all right so let me just uh
[32:32] share the screen again
[32:36] does that work yes now it works very
[32:38] well
[32:39] all right let me move to the what i'm
[32:41] going to talk about is
[32:42] a white paper we just wrote it's on our
[32:44] website if anyone he wants to
[32:46] look at it's the combination of the work
[32:49] that was done in the last couple of
[32:50] years on integrated photonics roadmaps
[32:53] and in these few slides i'm going to
[32:56] give a quick update of those road maps
[32:58] and i'm also going to ask a question
[33:00] at the end and some of the issues that
[33:02] revolve around
[33:03] packaging integrated photonics packaging
[33:06] so let me uh as we've just used up a
[33:08] little bit of time let me move through
[33:10] these very quickly this was the roadmap
[33:14] that was done in 2016. now real quickly
[33:17] now it's a very busy slide they're on
[33:19] our website if you want to go into
[33:21] details feel free to do that afterwards
[33:23] but you can see
[33:24] we predicted in 2016 what was going to
[33:27] happen in 2020. this is combination of
[33:30] both europe and the us
[33:31] and some imprints from asia and you can
[33:34] see on the right-hand side a lot of the
[33:35] things that were predicted actually
[33:37] turned out correct you know transceivers
[33:39] at 400 g
[33:41] uh metrics of links or less than five
[33:43] dollars per gigabit i'm not going to go
[33:44] through every one of these but you can
[33:46] see there were some really nice
[33:47] predictions that really worked out and
[33:50] so that was great
[33:52] and then in 2020 another roadmap was put
[33:55] together
[33:55] and you can see from this roadmap
[33:58] there's some predictions for
[33:59] 2023 in that sort of range you can see
[34:02] it goes out to 2028
[34:04] and what you're seeing on these roadmaps
[34:06] is um
[34:07] some three different areas you can see
[34:09] for example 2023
[34:11] there is expectation you're going to see
[34:13] 1.6 terabit
[34:15] per second modules you know metrics are
[34:18] less than a dollar per gigabit so some
[34:19] really fast devices
[34:21] lots of integration but these road maps
[34:24] they show the dates on the horizontal on
[34:26] the top and on the vertical they show
[34:28] some of the technologies
[34:30] you can see the lower green block to the
[34:32] left
[34:33] and then you see some metrics in the top
[34:35] left you also see black font
[34:38] that's what we as from a roadmap
[34:41] standpoint
[34:42] expect to see on current base commercial
[34:45] efforts
[34:46] and you can see the purple brick walls
[34:48] similar to the red brick walls that you
[34:49] find in the electronics road map
[34:52] but in this case these are technology
[34:54] cost barriers
[34:55] in photonics we may have solutions to
[34:58] work through the brick wall and come up
[35:00] with great solutions but they may not be
[35:02] in a cost
[35:03] structure needed for real
[35:05] commercialization
[35:06] and on the right hand side in the red
[35:08] font you're going to need some major
[35:10] industry effort to get to these type of
[35:12] metrics
[35:13] and so that's sort of how the roadmap is
[35:15] sort of put together for a 2020
[35:17] standpoint
[35:18] and you can see if you try and look at a
[35:20] trend of where these purple brick walls
[35:22] are
[35:22] you see some technologies are easier
[35:25] than others like for
[35:26] on the top it's going to be really
[35:28] difficult to design 1600 gigabit per
[35:30] second modules on the associated
[35:32] packaging that comes with that
[35:33] and also to meet some of those metrics
[35:35] of less than a dollar per gigabit per
[35:37] second
[35:38] we know from a device standpoint it's
[35:40] going to be tough to design
[35:41] devices that have 3db you know so
[35:46] eos21 gigahertz bandwidth greater than
[35:49] 50. so looking towards how do you get to
[35:52] 70 and 100 gigahertz is actually not
[35:54] going to be easy
[35:55] in fact that was the subject of an epic
[35:57] workshop last week which was really
[35:58] interesting
[35:59] and then you've got lsi challenges if
[36:01] you're doing the rays of vixels for
[36:03] structured
[36:04] lights 3d arrays that sort of thing and
[36:06] so
[36:07] you can see where some of the challenges
[36:09] are going to be
[36:11] some technologies obviously do better
[36:13] than others
[36:14] so let's go to you know where i'm
[36:16] representing that's
[36:18] lightwave logic we're doing
[36:19] electro-optic polymers
[36:21] high-speed modulators i mean we're part
[36:23] of what i would call the high-speed and
[36:25] low power club
[36:26] and so we can see that the performance
[36:28] of these are pretty well but we also
[36:29] have to think about how you're going to
[36:31] package these guys
[36:32] just because you go fast doesn't mean
[36:34] you've got all the solutions
[36:36] we know polymers are additive to
[36:38] integrated photonic
[36:39] platforms and this was a slide that
[36:42] karen showed last week there's various
[36:44] different approaches
[36:45] of electro-optic polymers i'm not going
[36:47] to belabor this because this is really a
[36:48] packaging
[36:50] road map discussion but you can see
[36:52] there's different ways to address
[36:54] you know chip scale semiconductor wafer
[36:57] scale type packaging with polymers
[37:00] so let me move to the last slide really
[37:02] fast and this is brand new for this
[37:06] workshop if you like i put to this
[37:08] together over the last week
[37:10] and by all means i'm not the person that
[37:13] should be putting in you know 10-year
[37:14] roadmaps together
[37:16] but what i would like to see from this
[37:18] forum
[37:19] is perhaps folks can take this blank
[37:22] packaging roadmap
[37:23] and help us fill it out and you can see
[37:27] what i've done is on the top
[37:29] is a horizontal bar that goes out to
[37:30] 2030.
[37:32] on the vertical on the left i bought
[37:34] some of the traditional
[37:36] packaging metrics you've got traditional
[37:38] gold box
[37:39] you've got surface mount you've got chip
[37:41] on board wafer scale
[37:43] on the lower left hand corner you've got
[37:44] co-packaging layer one chip on carrier
[37:47] co-packaging layer two component and so
[37:50] what i would like to see is how we would
[37:53] fill this out in terms of key metrics
[37:56] so that as a you know packaging industry
[37:59] for integrated photonics we all have a
[38:02] road map
[38:03] that's reasonably non-competitive but
[38:05] tells us where we're going to go
[38:07] and what some of the obstacles may be
[38:10] and so i leave this
[38:11] talk at this point i certainly would
[38:14] like to see this filled out
[38:15] i've started it to give everybody an
[38:17] idea and if we don't want to use as an
[38:20] application
[38:21] you know transceivers with link reaches
[38:24] and metrics and i've left them at the
[38:25] top three horizontal sort of arrows
[38:28] then the lower two four five
[38:32] arrows i put some metrics in i don't
[38:34] know if they're completely correct
[38:36] but i think there's opportunity to fill
[38:38] this in
[38:39] to you know look at what peter was
[38:41] saying you know the adks i mean it's a
[38:43] really interesting positioning
[38:45] i mean i do know working with founders i
[38:47] mean you have to accept pdks we pay a
[38:49] lot of money to develop your own pdk
[38:51] with the foundry
[38:52] i think adks are going to be coming more
[38:54] important and perhaps this should be
[38:56] part of the roadmap
[38:57] but um in terms of integrated photonics
[39:01] roadmaps
[39:02] i think we need one for packaging not
[39:04] just the pick chips
[39:06] and i think the packaging should be
[39:08] related to the pick chips and i'll leave
[39:09] it at that
[39:11] thank you very much uh the meeting last
[39:13] week was exceptional and michael you
[39:16] i i think many people were very
[39:18] interested about this
[39:19] need for ultra fast modulators but today
[39:22] we i really want to see how we can all
[39:25] together
[39:27] give the right information for people
[39:28] developing the adk
[39:30] the first thing that comes to my mind is
[39:32] that
[39:33] in the last years when we talk about
[39:36] different applications
[39:37] the biggest need that we had were
[39:40] reducing the cost of fabulous race and
[39:42] please peter o'brien from pixab correct
[39:44] me if i'm wrong we were working very
[39:45] hard on
[39:46] on trying to reduce the cost of fiber
[39:48] race but now
[39:49] what is seeing with discussions with the
[39:52] gold package optics community
[39:54] that this is less of a challenge uh
[39:56] michael where do you stand on this
[39:58] is that in your opinion the the need for
[40:00] fiverr race with the discussion that you
[40:02] are having with many of the people in
[40:03] the road maps
[40:04] is still a big challenge and i want to
[40:06] go to peter o'brien for him to comment
[40:07] on this
[40:11] michael
[40:14] i think michael can't hear me or oh i
[40:17] can hear you i thought you were asking
[40:18] peter a question
[40:19] first you and then peter so when it
[40:22] comes to fiber
[40:23] race as a challenge is that it's
[40:25] something that we have seen growing in
[40:27] the in the discussions because in my
[40:28] mind have seen it
[40:29] decaying a little bit uh
[40:33] fiber arrays are important you're going
[40:34] to see i mean the special arrays of
[40:37] fiber connectors have improved we've got
[40:39] to figure out how to get better arrays
[40:41] connected to pick chips
[40:42] i mean certainly as peter indicated
[40:44] we've seen pdks and fabs that deal with
[40:47] v-grooves that's a
[40:48] traditional approach we've seen some
[40:50] great in connections to fiber arrays i
[40:52] mean that's come on in the last few
[40:54] years
[40:55] um this is not going away jose it's not
[40:58] going to be just a single fiber and wdm
[41:00] the wavelengths in the single fiber
[41:02] we're going to have to figure out to do
[41:03] single arrays of fibers and even
[41:06] two-dimensional arrays of fibers
[41:07] so that means the packaging has to be
[41:09] more complex that means that the
[41:11] foundries
[41:12] and the packaging centers have to think
[41:14] through some level of standardization
[41:17] i'm not saying it should be completely
[41:18] standardized but this is tricky
[41:21] i mean we all know with fiber arrays you
[41:23] know with the mt connectors the mpo
[41:25] connectors it wasn't easy to develop 20
[41:27] years ago
[41:28] when you start looking at
[41:29] two-dimensional solutions it gets
[41:31] quite complex quickly and at this point
[41:33] i'll let peter join in because peter's
[41:35] uh
[41:36] doing this on the front line here
[41:38] excellent peter tell us
[41:39] how is that is that a decaying demand a
[41:41] growing demand are there
[41:43] solutions or need to decrease the cost
[41:44] of fiber reassembly
[41:46] well it's it's yeah so in a lot of data
[41:49] columns you see standard numbers of
[41:50] channels so you might have
[41:51] you know uh four or eight or something
[41:54] like that but there's also another
[41:56] challenge that's coming up
[41:57] um you know uh where we see many other
[42:00] optical channels required so there's a
[42:02] term you may have heard
[42:04] or you will hear more about it's called
[42:06] the shoreline density
[42:07] and so essentially the number of optical
[42:10] channels you can get off the edge of a
[42:11] pick
[42:12] um and this is a real problem because if
[42:14] you think about it
[42:15] you're limited by 127 pitch and so that
[42:18] that's one thing so the physical
[42:19] constraints
[42:20] on the number of channels you can
[42:22] squeeze out of an optical fiber array
[42:24] that's just a design perspective but the
[42:26] other thing is fiber arrays
[42:28] are intricate you know to make and
[42:30] they're you know
[42:31] so as you go to higher higher numbers of
[42:34] channels that's a problem
[42:35] so one of the ways you can get around
[42:37] that is uh you know you mentioned
[42:39] the v-grooves on on the silicon
[42:40] photonics um
[42:42] but for example another approach we're
[42:44] looking at this is putting micro lenses
[42:46] down on the pick
[42:47] so you expand the mode and then you can
[42:50] have a connector with a with a molded
[42:52] micro lens
[42:53] and that's basically like a ribbon fiber
[42:55] will slot into that so
[42:57] you've kind of got a v-groove on the
[42:59] connector side with molded optics
[43:01] and and you don't have this glass block
[43:03] with v-grooves that you polish
[43:05] all these kind of things so one approach
[43:07] to avoid the use of micro
[43:09] micro uh sorry fiber arrays is to put
[43:12] micro lenses and then you can make a
[43:13] plugable connector
[43:14] and we we actually have a program around
[43:16] that um
[43:18] an international program around a
[43:20] standardization we have
[43:22] you know molex and and many other
[43:24] companies and we're working together
[43:26] on that so micro optics is one way um
[43:30] and v-grooves is another way so you want
[43:33] to avoid these very expensive fiber
[43:35] arrays and the other thing is
[43:36] when you put fiber arrays together in
[43:38] v-grooves they're not always aligned
[43:40] uniformly you get variations and all
[43:42] these kind of problems so
[43:44] it's as i say you've got the design of
[43:46] the chip
[43:47] and interfacing with these fiber arrays
[43:49] and then you actually making fiber
[43:50] arrays
[43:51] is not easy so for me what we discussed
[43:54] in different forums is that uh first the
[43:57] problem with the six
[43:58] axis alignment of the fiverr arrest
[43:59] which is a challenge but we discuss also
[44:01] the interposer approach
[44:03] i have seen companies doing the plc
[44:05] technology team photonics by the ways in
[44:07] the room
[44:08] doing psc technology developing
[44:09] interposers for that and try to be
[44:11] less restricted on the distance between
[44:13] the fighters how did you stand on this
[44:15] peter and
[44:16] adrian bilat from team is in the room so
[44:18] i would like to
[44:19] comment on that but first you peter how
[44:21] do you stand on this interposer is that
[44:23] something that your opinion is going to
[44:24] catch on in the market
[44:26] okay so there's a number of things there
[44:27] loss so what's the loss because you've
[44:29] got to get into the intervals and get
[44:30] out of the interposer so
[44:32] you've got to get a good justification
[44:34] for that and cost
[44:36] and uh just the actual process so you've
[44:38] got an extra step
[44:39] so it it has to be justified in terms of
[44:42] process
[44:43] cost and and performance so if you can
[44:46] take all those boxes
[44:47] uh definitely how many boxes can you
[44:50] take
[44:51] hi well thanks jose for asking that's a
[44:53] very good question
[44:55] uh well we hope to take all of them in
[44:57] specific cases so we are well aware of
[44:59] you know what peter
[45:00] described in terms of food print loss
[45:03] and other things like this
[45:05] and what we've reckoned so far is that
[45:07] interposers are
[45:08] like most useful for for specific cases
[45:10] especially with many
[45:12] many ios that's uh that's a case in
[45:14] point
[45:16] and we hope that with this new
[45:17] technology that we call evanescent
[45:19] coupling we can we can
[45:20] take most of the boxes you know i don't
[45:22] know if i can show a slide or two
[45:24] always this is your one one slide and
[45:27] ultra fast photonics way
[45:29] okay great great so i'm doing my best to
[45:32] put it on so okay but this is
[45:35] this is pretty much the slides hope you
[45:37] can see it yes so edge and top
[45:39] well you know them that's uh edge
[45:42] couplers dragging couplers well the
[45:44] first one is evanescent and that's where
[45:45] we hope to tick the boxes
[45:47] so here the idea uh is to go like in an
[45:50] evanescent way like to couple
[45:52] the interposer mode directly to the
[45:55] silicon photonics layer
[45:56] or any other layer of the high index
[45:58] contrast and
[46:00] through the tub so it requires some um
[46:02] some extra steps like etching the back
[46:04] end offline the cladding
[46:06] but that way you can you can have like
[46:08] be compatible with passive alignment
[46:10] with the visual
[46:11] alignment machines like just the camera
[46:13] through the interposer
[46:15] and um optically you can transmit both
[46:17] both polarizations
[46:19] and over a broad spectral band um
[46:23] like be compatible with with a wdm for
[46:26] instance to talk yet about the active
[46:27] and passive alignment i want to talk
[46:29] later but the question here is loss
[46:31] 1.5 dv is that suitable peter o'brien is
[46:35] that something that you think is on the
[46:36] line what is in your opinion
[46:38] they lost ideally from chip to fiber
[46:41] that's that's pretty acceptable actually
[46:43] you know db loss is pretty good
[46:44] and it's very good actually the question
[46:46] is will a foundry open up its uh
[46:48] photonic layer to you so um will it will
[46:51] a cmos foundry say yeah that's good
[46:53] we'll open up our waveguides
[46:54] under the waveguides compatible with
[46:56] that design and those discussions need
[46:58] to be had
[46:59] so and many founders would not do that
[47:01] they're they're they're reluctant to
[47:03] open up the uh
[47:04] they might be buried very deep that's
[47:06] one of the challenges we face
[47:08] so is there is this evanescent coupling
[47:11] is it compatible
[47:12] you know if you go to a custom foundry
[47:13] they might do that for you that might be
[47:15] using e-beam or something
[47:17] but will a large-scale foundry make that
[47:19] process compatible
[47:20] um and then you know we're experiencing
[47:23] some of the glasses you know the the
[47:24] distance and
[47:25] if you have any contamination it's very
[47:27] sensitive to that so
[47:29] 1db is good 1.5 db what's it over large
[47:31] volumes and will a foundry
[47:33] open up its uh photonic layer for you
[47:35] you know what i i do believe that we do
[47:37] have more power than what we feel and it
[47:39] is the osats
[47:40] the companies doing the the outsourced
[47:42] semiconductor assembly and test
[47:44] that need to go on the foundry and
[47:46] saying our customers
[47:47] demand this so you need to adapt your
[47:49] process for that on that but they may
[47:51] not be able to do it josue they might be
[47:54] fixed
[47:54] like if you see some foundries now
[47:56] they're making their their silicon
[47:57] photonics
[47:58] on the backbone of a an rf line for
[48:01] example
[48:01] and it's not easy to change it so you
[48:04] know rather than having a custom
[48:05] photonic
[48:06] line they actually have a kind of a
[48:07] quasi photonic electronics or f
[48:09] line and it's very rigid so
[48:12] what do you think so when i've worked
[48:15] with
[48:16] foundries for pick chip silicon
[48:18] photonics in general
[48:20] i mean boundaries will have their pdks
[48:22] if if you
[48:23] ask for something a little bit custom
[48:26] maybe you want to change a process
[48:27] changing metal
[48:28] change a little technique it actually
[48:31] costs quite a bit of money because the
[48:32] family has to go develop your
[48:34] particular process and so the the lowest
[48:37] cost and easiest way to work with
[48:38] boundaries is to work with that pdk
[48:41] if you've got a silicone photonics
[48:42] that's slightly custom
[48:45] it's going to cost a lot of money to
[48:47] change
[48:48] uh ask the family to do those things and
[48:50] i think it'd be the same
[48:52] if you're on the packaging side if a
[48:54] foundry has pdks for regroups and you
[48:57] want to do something slightly different
[48:58] it's going to cost money to do that and
[49:00] so the the question
[49:02] is is what's the most efficient way from
[49:05] a packaging standpoint we can work with
[49:08] foundries that
[49:09] do want to keep fairly rigid some of
[49:12] some of the smaller players are a little
[49:13] bit more flexible
[49:14] especially if you do silicon photonics
[49:17] and mems type players i mean a lot more
[49:19] flexible but still
[49:20] we have to really be careful about this
[49:22] as we move forward
[49:24] one more thing i want to add to the
[49:25] table i'm a technology guy so anna is
[49:28] more worried about cost
[49:29] me less i peter has a very interesting
[49:32] computer peter hartzman from citc
[49:35] in the netherlands the company
[49:36] developing technologies for packaging
[49:37] solutions
[49:38] peter what's on your mind because i
[49:40] think it's a very important point
[49:42] yeah just a quick question i guess to uh
[49:44] peter o'brien that will be
[49:45] you mentioned the uh shoreline density
[49:48] you also mentioned the difficulty in
[49:50] making fiber arrays
[49:52] uh do you see a perspective for
[49:53] multi-core fibers to get the
[49:55] optical connection to the chip well yeah
[49:58] so multi-core fibers
[50:00] if if they if the pitch is very
[50:02] accurately uh defined
[50:03] to the point because they're surface so
[50:06] you can't have a 2d array
[50:08] of waveguides well it'd be very
[50:09] challenging to have a 2d wave
[50:11] at the edge and foundries are tending to
[50:14] move a lot to edge coupling
[50:16] but they're you you know for grating
[50:17] couplers and and that type of approach
[50:20] multi-core would be of potential
[50:23] uh routes to to overcome that um
[50:27] so so you know yes but not for edge
[50:29] coupling
[50:31] okay we actually we actually have one of
[50:34] the
[50:34] i think the market leader the multicore
[50:36] fibers today for datacom we say ofs
[50:38] is in the room john earnhardt are you
[50:40] with us jung
[50:43] good afternoon answering anna's approach
[50:46] about cost reduction
[50:47] is multi-core fibers for you a potential
[50:50] solution for
[50:51] the what we're addressing here
[50:52] multi-channel coupling from from forever
[50:55] bundle to chip
[50:57] uh it's it's something we're very active
[50:59] in still in early stages
[51:01] in terms of product acceptance uh in
[51:04] other non-telecom markets we're very
[51:07] active in multi-core
[51:09] it involves some similar technology in
[51:11] terms of manufacture
[51:14] one of the issues is still how do you
[51:16] get in and out of the multi-core
[51:18] and uh and the cost associated with that
[51:21] through fan ends fan outs
[51:23] you know possibly there's a micro optic
[51:26] solution
[51:27] in my opinion this is a beautiful
[51:29] beautiful r d project but i am not sure
[51:31] about the cost approach on that but
[51:33] peter have you done already something on
[51:35] this is there any activities going on
[51:37] trying to go from multi-core fiber
[51:39] from where you get a race i've seen
[51:41] something from bangworth photonics are
[51:42] you doing something on that
[51:46] yeah um no not multi-core fiber no um
[51:50] no we're not we're really kind of
[51:52] focusing strongly now and fight in micro
[51:54] optics
[51:55] so uh taking the beam off expanding it
[51:58] um and relax the alignment tolerances to
[52:01] a plugable type connector
[52:03] so we're there's there's a lot of issues
[52:05] people are finding with bonding of
[52:07] fibers
[52:08] especially i mentioned epoxies um reflow
[52:11] they move
[52:12] it's a very large kind of rigid
[52:14] component and so
[52:16] so we're not is the answer
[52:19] not really no back to another point back
[52:22] to michael
[52:23] you are developing right now like well
[52:25] logic is some of the fastest
[52:27] modulators that that we have in photonic
[52:29] internet circuits
[52:31] with polymer technology packaging a
[52:32] modulator is is a challenge especially
[52:35] when you're going to the 70 gigahertz
[52:36] plus
[52:37] modulation speed is there in your
[52:39] opinion today
[52:40] a a room for a test package
[52:44] so a test package that is not optimal
[52:46] but it could
[52:47] be taken to your customers for doing the
[52:49] test before invest approach
[52:52] uh yeah absolutely i mean test packages
[52:54] is a normal sort of approach
[52:57] um your traditional high speed
[53:00] opto devices like modulators were in
[53:02] gold box packages
[53:04] and they have been for the last 20 years
[53:06] and you know gold box
[53:08] can be sort of adapted into a test
[53:11] vehicle so people can see that
[53:13] but really you know as we talk about
[53:15] integrated photonics you're not really
[53:16] going to be talking about gold boxes
[53:18] anymore
[53:19] but the test package vehicles are
[53:21] obviously very important
[53:23] and you have to look towards you know
[53:25] wafer scale semiconductor scale
[53:27] type packaging that go with integrated
[53:30] photonics and that is the direction
[53:33] while gold boxes are still you know the
[53:35] classic vehicle
[53:36] they're certainly large and we have to
[53:38] move on from that as
[53:40] as i've indicated from you know a
[53:42] packaging roadmap
[53:44] perspective so yeah there are vehicles
[53:46] jose
[53:47] we have three comments in the room the
[53:49] first one we're gonna go
[53:50] to assay ase i'm very interested about
[53:53] them because they're a semiconductor
[53:55] manufacturing
[53:56] is brad from asc what's on your mind
[54:02] bradford asc
[54:05] yes brad factor good good afternoon
[54:08] everybody i very much appreciate hearing
[54:11] all the talks
[54:12] um i have a few comments one is
[54:15] that well first of all can you hear me
[54:16] okay jose
[54:18] yes loud and clear yes um
[54:22] my first comment is i very much
[54:24] appreciate
[54:25] uh peter and pixap's work for the
[54:28] industry
[54:29] even though today i don't get to see
[54:32] that much of
[54:33] it hasn't come to fruition uh yet
[54:36] at least uh in our large uh factory
[54:39] infrastructure
[54:41] um the second
[54:45] uh the second comment i have based on
[54:48] uh resonates with uh the comments made
[54:51] by
[54:52] multiple people is that there's a large
[54:55] a huge opportunity
[54:56] in the wafer level packaging and that
[54:59] uh and feeding on to michael
[55:03] webby's comments is that the smaller you
[55:05] make the package
[55:07] the better uh will be the electrical uh
[55:10] performance so the less one has to worry
[55:13] about
[55:15] um parasitics so the smaller the
[55:18] features in the package
[55:19] smaller package the easier it is to uh
[55:23] master the electrical performance and
[55:26] uh so yeah i appreciate uh all the
[55:28] comments today and i'm
[55:30] actively listening to to our speakers
[55:32] and the future comes
[55:33] thank you so much brad you're one of
[55:35] semiconductor manufacturers in epic we
[55:37] have several in the last year many
[55:38] semiconductor companies join
[55:40] peter before you answer the question of
[55:42] brad i wanted to be complimented
[55:43] from something that i found out a couple
[55:45] of months ago enrique slaffer from atns
[55:48] are you with us
[55:50] yes i would like you to tell us because
[55:52] you are
[55:53] the market leader on pcvs and you are
[55:55] entering
[55:56] photonics silicon photonics and you want
[55:58] to find a way that silicon photon is
[56:00] suitable to your pcbs
[56:02] i want you to tell us and especially
[56:04] peter o'brien
[56:05] what is your vision and let's see if him
[56:07] and the rest of the companies in the
[56:09] room
[56:09] can help you here thank you for a short
[56:13] introduction
[56:14] may i show some slides one and will
[56:17] traverse photonics way
[56:20] okay perfect just so this light that you
[56:24] may have in mind uh can everyone see my
[56:28] screen
[56:28] yeah yes presentation
[56:32] okay this is just a short introduction
[56:35] about our optical pcb
[56:37] approach yeah how we would like
[56:41] to integrate photonics in a stack up of
[56:43] a pcb
[56:44] so you know uh 18s is a
[56:47] pcp maker as jose already explained
[56:51] and we also dealing that we integrate
[56:55] at the moment electrical components
[56:58] active components and passive components
[57:01] i just i want to activate my mouse
[57:04] on the right hand side that this is more
[57:06] or less a cross section
[57:08] through the layer stack up of a pcb
[57:12] and this in this dark area here is a
[57:15] an integrated uh active or passive
[57:18] component you see we can
[57:21] we can interconnect it with galvanic
[57:24] copper
[57:24] yeah from one side from both sides
[57:27] depends on the design
[57:28] yeah uh more thousands
[57:32] of components can be integrated in a in
[57:35] a very small area that we also can
[57:38] reduce
[57:39] more or less the the signal traces here
[57:42] the path between the signals
[57:44] and this is just a short explanation how
[57:47] we
[57:47] apply such a process means we
[57:50] we start with the standard core ff4
[57:54] which is suitable for a transmission of
[57:57] electrical signals
[57:59] we integrate the component we
[58:02] laminate it together in a standard pcb
[58:05] stack up
[58:06] and then we can uh apply
[58:09] the the routing layers here unlimited
[58:12] number
[58:13] uh however it's it's it's it's it's
[58:17] possible for
[58:18] for the customer design and also bright
[58:21] applied the structuring
[58:22] uh and now we see here with with
[58:26] with this coming higher uh data transfer
[58:29] speed
[58:30] yeah that on one hand side with the
[58:34] with the existing dielectric material
[58:36] with copper and so on
[58:38] we're coming more and more to the
[58:39] physical limits okay
[58:41] we we have to set more lanes probably in
[58:44] parallel
[58:45] but then we we waste more and more power
[58:49] consumption there
[58:50] and the idea is that we are jumping more
[58:53] or less from
[58:54] the integration of the electric
[58:56] components yeah
[58:58] to integrate the electrical and the
[59:00] optical components as well
[59:03] it means it's a kind of all-in-one
[59:05] package but we are talking about
[59:07] panel level format not just uh waiver
[59:10] level
[59:12] format so it means this might be
[59:15] a very big impact in terms of costs yeah
[59:18] to integrate electrical and optical
[59:21] components as well
[59:22] to increase the data transmission speed
[59:25] the bandwidth and
[59:27] by a higher level of integration
[59:30] that we can reduce the energy
[59:32] consumption as well
[59:34] and this is more or less a higher level
[59:35] sketch here uh
[59:37] we have more or less a substrate or a
[59:39] pcb
[59:40] it depends just on the on the uh
[59:44] on the structure yeah we we can go
[59:47] down to uh to five micron line in space
[59:50] for instance
[59:51] secaria and that we integrate
[59:54] yeah um well as a electro optical
[59:58] circuit board
[59:59] which we're actually in it's under
[01:00:01] development together with
[01:00:03] uh with fraunhofer eats it aim yeah it
[01:00:06] means to
[01:00:07] integrate a class
[01:00:10] module yeah which which optical
[01:00:14] uh components and that we interconnect
[01:00:17] it also to the periphery
[01:00:19] you know to electricity components
[01:00:23] that's in few words the concept yeah
[01:00:26] what
[01:00:26] we aiming for you cheated on the amount
[01:00:29] of slides you didn't cheat on the length
[01:00:31] of the message and was very clear
[01:00:32] peter don't answer yet because the
[01:00:34] question is not yet fully formulated
[01:00:36] there's one more company they need to
[01:00:38] bring to the mix and the company is
[01:00:39] developing thermoplastic materials and
[01:00:41] you will understand why we have somebody
[01:00:43] from
[01:00:43] savik in the room florian yang correct
[01:00:47] that's correct florian is developing the
[01:00:49] the thermoplastic material i want to
[01:00:51] put together with the semiconductor
[01:00:53] manufacturers we're going to be
[01:00:54] something fantastic together savik
[01:00:56] eh what's your story florian can you
[01:00:58] hear me guardian here
[01:01:00] close and clear perfect thank you jose
[01:01:03] so um
[01:01:03] slavic for those who don't know us we
[01:01:06] are the second valuable
[01:01:07] chemical brand in the world globally
[01:01:11] and we are developing in this case
[01:01:14] specific thermoplastic resins high
[01:01:16] performance health performance materials
[01:01:19] that are used and have been used for
[01:01:21] decades
[01:01:22] in this industry and um just a few
[01:01:25] comments uh peter gave before
[01:01:27] are actually the reason why we are here
[01:01:28] we want to get involved as a material
[01:01:30] supplier
[01:01:31] um we are working on micro moded optics
[01:01:33] in that area
[01:01:35] and we do combine the advantages of the
[01:01:37] thermoplastic
[01:01:38] molding process with the ctq's of the
[01:01:41] industry like reversal ability
[01:01:43] low cpe low dimensional change after
[01:01:47] reflow and these kind of things
[01:01:50] so we have been a member of epic for a
[01:01:52] few years
[01:01:53] um now and it's really um of high value
[01:01:56] for us to learn where the industry is
[01:01:58] moving and how our materials could
[01:02:00] potentially fit
[01:02:01] in that in that nature in an environment
[01:02:04] um as said we did start decades ago um
[01:02:07] the main application space
[01:02:09] were actually lenses and optical
[01:02:11] elements in uh packable transceivers we
[01:02:13] have been there for more than 30 years
[01:02:16] and now with the industry moving more to
[01:02:17] onboard optics and co-package optics
[01:02:20] we also have developed materials that do
[01:02:22] as i said
[01:02:23] pass briefly soldering and moldable
[01:02:26] opening up new
[01:02:28] application spaces for the industry
[01:02:31] we do not only supply these materials
[01:02:34] but we also help our customers
[01:02:36] to design with plastics because it's
[01:02:38] very different from thermosets or
[01:02:40] glass as used today how to micromode
[01:02:43] our materials and we have global r d
[01:02:46] capabilities with thermo optical
[01:02:48] apps where we support our customers
[01:02:49] molding lenses if needed
[01:02:51] or we bring in molding partners we have
[01:02:53] at hand
[01:02:54] i'm doing review serving doing lifetime
[01:02:57] studies on
[01:02:58] performance and all these kind of things
[01:03:03] we also go one step further after the
[01:03:05] lens production we look at
[01:03:07] how to place the lenses or the optical
[01:03:09] elements um
[01:03:10] on the pcb which adhesives should be
[01:03:13] used and
[01:03:15] these kind of things so we are in
[01:03:17] contact already with
[01:03:18] uh plenty of the attendees today or
[01:03:21] their customers
[01:03:23] we do want to get more engaged with
[01:03:25] others obviously
[01:03:26] to first of all learn what exactly is
[01:03:28] needed but second we see
[01:03:30] how our materials can bring value to the
[01:03:33] industry and that's fantastic now back
[01:03:34] to peter brian peter so we have here the
[01:03:37] semiconductor manufacturers
[01:03:38] saying that they do have technology
[01:03:40] based on semiconductor through the
[01:03:42] silicon virus and through classifiers
[01:03:43] we have the material the company saying
[01:03:45] we are serving those semiconductors with
[01:03:47] thermoplastic materials
[01:03:48] where does photonic internet circuits
[01:03:50] here fit and what can we do together
[01:03:54] well actually one of the things about
[01:03:56] working together is
[01:03:57] um when i look at the different
[01:03:58] technologies they all
[01:04:00] have um you know merits and and there's
[01:04:03] challenges
[01:04:03] but actually um i don't know whether i'm
[01:04:05] answering the question exactly as you
[01:04:07] ask it but
[01:04:08] actually something we're starting to see
[01:04:09] is around the system
[01:04:11] so we look at the individual parts of
[01:04:13] the package and we say okay we've got
[01:04:15] fiber
[01:04:16] um but we also have substrate so
[01:04:19] for example we've seen companies who can
[01:04:21] only afford for their application to
[01:04:23] work with pcb
[01:04:24] so we say oh and you must have a cte
[01:04:26] matched you know
[01:04:28] ceramic or something like that but
[01:04:29] actually it's not viable in some cases
[01:04:31] so
[01:04:31] they need to use a pcb one of the
[01:04:34] problems there is that the pcb will warp
[01:04:37] as a result the pick warps as a result
[01:04:40] if you're aligning fibers for example or
[01:04:42] micro lenses
[01:04:43] you're going to get misalignments so
[01:04:45] we've seen in our own measurements
[01:04:46] with a pcb and flip chip pick you're
[01:04:49] looking at over a five millimeter which
[01:04:51] is common for a pick you're looking at
[01:04:53] about three to five microns
[01:04:54] across that that that length of uh
[01:04:57] facets
[01:04:58] that means that the the chip is gonna
[01:04:59] misalign so if you have micro optics
[01:05:02] and albeit they're they're stable with
[01:05:05] reflow etc
[01:05:07] and the boards that you're sitting on
[01:05:09] may actually cause a massive problem
[01:05:11] and i think where this is really going
[01:05:13] is we need to develop
[01:05:15] much more integrated models so the
[01:05:18] thermal model and the mechanical model
[01:05:20] the optical model and even the
[01:05:22] electrical models start to work together
[01:05:24] so you get data out of your thermal
[01:05:26] mechanical model it feeds it into z-max
[01:05:28] for example
[01:05:29] so um another scenario we're seeing in
[01:05:31] cryogenic
[01:05:32] it's very extreme packaging but for
[01:05:34] quantum so the chip shrinks you get ctes
[01:05:37] you get the substrates all these things
[01:05:39] this that's an extreme example but it's
[01:05:41] going the other temperature direction
[01:05:43] so you need to start to develop more
[01:05:45] accurate models
[01:05:46] so and bringing the design this kind of
[01:05:49] multi-physics
[01:05:50] is really really important and rather
[01:05:53] than just looking at the optics and
[01:05:54] saying that interface
[01:05:56] you know the pcb the carrier may
[01:05:58] actually affect it as well
[01:05:59] so this kind of multi gonna design is
[01:06:02] very very important and again
[01:06:03] i think it's something we should be kind
[01:06:05] of standardizing and starting getting
[01:06:07] the the
[01:06:07] the software companies working with us
[01:06:09] much more closely
[01:06:11] you say role model fight ens you saw
[01:06:13] what they want to be in one two and
[01:06:14] three years in my mind you play a very
[01:06:16] important role in that peter o'brien i
[01:06:18] already made the connection
[01:06:19] i'm very excited about this and now i
[01:06:21] would like all of us
[01:06:23] to go to canada to go to bromont our
[01:06:26] next speaker is alexander jantapolcinski
[01:06:28] from ibm in braman thank you very much
[01:06:31] for joining this
[01:06:32] meeting tell us what you bring to the
[01:06:33] table and afterwards we have another
[01:06:35] fantastic q a the floor is yours
[01:06:39] excellent do you hear me loud and clear
[01:06:41] excellent
[01:06:42] so thank you very much for the
[01:06:43] opportunity to present a summer for
[01:06:44] offering so we are ibm
[01:06:46] we are the largest north american base
[01:06:47] osat
[01:06:49] oh sorry just one second i have to put
[01:06:51] bad focus
[01:06:52] okay excellent so we are located in
[01:06:54] canada uh
[01:06:55] in this northeast corridor we have 850
[01:06:59] 000 square feet of manufacturing
[01:07:00] facility we do mostly advanced flip chip
[01:07:02] packaging and also silicon photonics
[01:07:04] we can assemble any wafer source we're
[01:07:06] the master of complexity and advanced
[01:07:08] packaging
[01:07:08] we also have outstanding
[01:07:10] characterization capabilities we have a
[01:07:11] great fa lab work class
[01:07:13] we can help for design for manufacturing
[01:07:15] design for test and we can enable a
[01:07:16] better time to market
[01:07:18] in our ecosystem we have this main
[01:07:20] facility uh where we produce
[01:07:21] volume prediction but we also have a
[01:07:23] dedicated development facility
[01:07:25] so we have a 160 000 square feet of this
[01:07:28] development
[01:07:29] facility where we have copies of the
[01:07:32] manufacturing line in this development
[01:07:34] facility but we can play
[01:07:35] we can introduce novel processes novel
[01:07:37] materials without
[01:07:39] perturbing the main production on the
[01:07:41] main main plant
[01:07:42] and this enables us to develop those new
[01:07:44] processes
[01:07:45] for example for photonic packaging and
[01:07:47] once they're ready we can just transfer
[01:07:49] those to the main projection
[01:07:53] waters are offering of course ibm uh
[01:07:55] chronogel those big mainframe those big
[01:07:57] uh technological programs uh for ibm is
[01:08:00] one-third of our business
[01:08:02] a two-third of our business is about
[01:08:03] datacom satcom telecom
[01:08:06] you have here an example we are in the
[01:08:08] this rf and 5g
[01:08:10] sector we do those phaser antenna
[01:08:12] modules
[01:08:13] uh we we do oh sorry i forgot to start
[01:08:16] my video
[01:08:17] um uh we do do though those phase area
[01:08:19] those data controllers those
[01:08:21] antenna we do provide those big switches
[01:08:24] for those
[01:08:24] uh telecom those high performance
[01:08:27] computers
[01:08:28] uh component for the data com
[01:08:30] infrastructure
[01:08:31] and we see more and more about the
[01:08:32] system and package when you have a lot
[01:08:34] of iterations integration inside the
[01:08:36] same device so we can see like a small
[01:08:38] pcb board
[01:08:39] when many functions are included for
[01:08:41] example rf and optical
[01:08:43] together in this system and package and
[01:08:45] we see more and more
[01:08:46] about those traction in those encryption
[01:08:49] card and rf over fibers
[01:08:50] for example and of course we do support
[01:08:52] custom design for our customers
[01:08:57] next slide so when we're thinking
[01:09:00] packaging so the packaging is really
[01:09:02] about integration and you can have a
[01:09:03] segregation of various function
[01:09:05] inside the same system package so this
[01:09:08] is why the header integration is very
[01:09:10] important
[01:09:10] and here we have some pictograms of
[01:09:13] virus
[01:09:16] aspect to consider in your packaging and
[01:09:18] basically we have a department
[01:09:19] for all of these for example for
[01:09:21] simulation for optical performance and
[01:09:23] more copper design
[01:09:24] for for merger and test for electrical
[01:09:27] thermal management we are expert in
[01:09:28] those high power high thermal envelope
[01:09:32] msn package we can do substrate design
[01:09:35] we do of course high reliability where
[01:09:37] it specializes in those high grade
[01:09:39] electronics and photonics
[01:09:41] chip package integration cost and yield
[01:09:43] we have this amazing predictive
[01:09:44] manufacturing and modeling capacity
[01:09:46] that rely on huge data sets so we're
[01:09:48] really able to virtualize or
[01:09:50] or qualification and and be able to
[01:09:53] access correctly
[01:09:54] uh in the stress in the package and
[01:09:56] correctly understand what happening
[01:09:57] so the packaging is the critical for
[01:09:59] success and we have to have this
[01:10:00] co-design packaging in mind
[01:10:02] when we try to have this pick chip with
[01:10:04] electrical
[01:10:05] chip interfacing and asic and here you
[01:10:07] have a little example of a switch
[01:10:09] example here we have some example of
[01:10:13] products that we do assemble so of
[01:10:15] course we do those large flip chip mcm
[01:10:17] where over 20 000 c4 electrical
[01:10:20] connection of this uh
[01:10:21] die are made to the substrate so this is
[01:10:23] the ibm server we of course have those
[01:10:25] multiple chip module or mcm or
[01:10:27] heterosynchronous system and package
[01:10:29] where
[01:10:30] very high complexity is made of course
[01:10:32] we do custom design
[01:10:33] we also have this coreless where you can
[01:10:35] remove the film core and you have better
[01:10:37] electrical properties and of course we
[01:10:39] do all
[01:10:40] two chip scale package 2.1 d when you
[01:10:43] have those extremely high density
[01:10:45] laminate on the on the substrate we have
[01:10:48] also those enterposer the 2.5 and 3d
[01:10:50] enterprise lag and also we have
[01:10:52] photonics and today i will discuss about
[01:10:54] a bit more about the photonics offering
[01:10:58] so a review about photonics is instead
[01:11:00] of having a
[01:11:01] custom design a retro line and an active
[01:11:03] alignment and
[01:11:04] with manual low volume and doing one or
[01:11:07] a few connections at a time
[01:11:08] we believe believe that to lower the
[01:11:10] packaging cost is to increase the
[01:11:11] scalability and
[01:11:12] be able to reuse standard design uh use
[01:11:15] automation
[01:11:16] that will will rely on self-alignment
[01:11:19] and perform multiple connection at the
[01:11:20] time
[01:11:21] and this leveraged the microelectric
[01:11:22] packaging infrastructure know-how and we
[01:11:24] had a few comments
[01:11:25] earlier and of course packaging and
[01:11:27] tests dominate the cluster
[01:11:29] of integrated photonics when we compare
[01:11:31] it to microscopes and this is why this
[01:11:32] is
[01:11:33] very important to have a good packaging
[01:11:35] and test in mind
[01:11:36] uh to tackle this cost structure
[01:11:39] here you have some of our photonic test
[01:11:41] vehicle so of course ibm is very
[01:11:43] ip protective so we don't show any of
[01:11:45] our customer design
[01:11:47] this is ibm test vehicle that we use to
[01:11:49] demonstrate our packaging processes
[01:11:52] and and as we i did mention there's a
[01:11:54] pdk from the wafer and there's
[01:11:56] 80k for the assembly design kit so we
[01:11:58] have our assembly design kit
[01:12:00] we shared it under cda with the the
[01:12:03] wafer fab i will just present a few of
[01:12:05] the the
[01:12:06] test vehicle here so we have this high
[01:12:08] fiber cut application this was a 68 by
[01:12:10] 68 millimeter
[01:12:11] with under 100 single mode fibers with
[01:12:13] nine uh optical uh
[01:12:15] engines those empty lenses were low
[01:12:17] backs uh so
[01:12:18] mostly to to validate that the
[01:12:20] downstream process doesn't doesn't
[01:12:22] alleviate
[01:12:23] the the optical coupling here we have
[01:12:26] also our polymer uh technology so this
[01:12:28] is
[01:12:28] edible coupling uh basically so we have
[01:12:30] a 25 micron optical port density
[01:12:33] at the chip so this is for those people
[01:12:36] that need uh
[01:12:37] thousands of autocal port on the same
[01:12:39] chip so this is the
[01:12:40] extremely high density uh of uh optical
[01:12:43] connection
[01:12:44] we also have this integrated connector
[01:12:46] where a standard
[01:12:47] fiber array with the empty rail is
[01:12:49] secured to the lid and we have this
[01:12:51] spring latching mac mechanism that do
[01:12:53] the mating between the two empty
[01:12:54] ferrules
[01:12:55] uh to uh to be able to package a big
[01:12:57] complex products for example
[01:12:59] and we also have a solar reformable
[01:13:01] fiber so basically as you can see this
[01:13:03] this little transceiver engine with with
[01:13:05] your fiber array
[01:13:07] so you have 12 uh single mold fiber here
[01:13:09] that are attached and this is a surface
[01:13:11] mount technology it can be reflowed
[01:13:13] refillable uh so this is the you can
[01:13:16] hear
[01:13:16] see how our fiber are put inside the
[01:13:18] v-groove with the mold coupler
[01:13:20] and we have here a strain relief of the
[01:13:23] of the ribbon
[01:13:24] uh that is secured to the to the lid
[01:13:26] here
[01:13:28] so when we're thinking about quick
[01:13:30] packaging so of course the best way is
[01:13:31] having a monolithic integration as shown
[01:13:34] in figure a
[01:13:34] and b where all the function are inside
[01:13:36] the same peak and
[01:13:37] this is very good especially if you can
[01:13:39] have all your your functionality because
[01:13:41] you can remove all those
[01:13:42] esd protection and have extremely good
[01:13:45] uh
[01:13:46] electrical integration in this
[01:13:48] monolithic version
[01:13:50] between a and b is basically if you have
[01:13:52] your chip overhang to give access to the
[01:13:53] optical region
[01:13:54] or you have a hole or opening inside the
[01:13:57] substrate
[01:13:58] to give access to this optical kitchen
[01:14:00] but sometimes it's not possible to have
[01:14:02] everything in your pick so you have your
[01:14:04] electrical dye in your pick diet that
[01:14:05] are made on separate no then you have to
[01:14:07] do a
[01:14:07] integration and kind of mcm fashion
[01:14:10] as you can see in c and d in the c
[01:14:12] version they're layout
[01:14:14] on the m same way as indeed they're more
[01:14:16] in the face-to-face
[01:14:17] configuration where the peak was
[01:14:18] inserted inside a little cavity
[01:14:20] and this is needed when the distance
[01:14:22] between the electrical dye and the pig
[01:14:23] diet need to be very very small
[01:14:25] and in a face-to-face configuration and
[01:14:27] sometimes
[01:14:28] it's preferable to not have uh opening
[01:14:30] and just have
[01:14:31] interposer that jack up the electrical
[01:14:33] die and having the same
[01:14:35] face-to-face configuration but the peak
[01:14:37] is not answered inside
[01:14:38] the the subjectivity or you can have it
[01:14:41] or organic interposer here
[01:14:43] that basically will per permit to have
[01:14:45] some reduction layer
[01:14:46] still have a very good face-to-face
[01:14:48] configuration through the the
[01:14:50] the interposer but still you will be
[01:14:53] able to drive power
[01:14:54] when there's a huge overlap area between
[01:14:57] the electrical
[01:14:58] pick dye and the g and h are 2d
[01:15:00] packaging and all of those
[01:15:01] packaging configuration are available at
[01:15:04] vermont
[01:15:05] so i will start first with our polymer
[01:15:08] alibi coupling so those are some optical
[01:15:09] results this has been
[01:15:10] presented uh in december uh
[01:15:14] oh sorry so those are the news results
[01:15:16] had been uh published in december that
[01:15:18] the glock
[01:15:19] so this is our new uh uh coupler for the
[01:15:21] o band that has been
[01:15:23] put at imf so mf in sagapo so this is a
[01:15:27] the whiffer fab
[01:15:28] where polymer pick are coming and as you
[01:15:31] can see here
[01:15:32] they have the spectrum so the o band
[01:15:34] spectrum with the four
[01:15:36] cd cwdm4 uh lambda so the four
[01:15:41] lambdas where you can encode information
[01:15:43] for the o-band and as you can see
[01:15:45] uh we are all between one and one point
[01:15:47] five db
[01:15:48] uh for the full spectrum and this is the
[01:15:51] essential loss per facet but it includes
[01:15:52] everything
[01:15:53] so the single mold fiber to the polymer
[01:15:55] coupling uh
[01:15:56] the polis so at this end so this is a
[01:15:59] standard
[01:15:59] empty ferrule because it's custom made
[01:16:01] for the polymer and it's made to a
[01:16:03] standard empty so the fiber of the mt to
[01:16:06] the polymer
[01:16:06] coupling insertion loss is considered
[01:16:09] the polymer propagation loss because
[01:16:11] polymer has a bigger probation loss and
[01:16:13] also the polymer to pick coupling
[01:16:16] and everything is included in this
[01:16:17] instruction loss so it's really
[01:16:19] from from one end to the end and this is
[01:16:22] amazing results
[01:16:23] and this is by doing uh uh adiabatic
[01:16:26] coupling so it's basically
[01:16:27] self-alignment pushing the ribbon inside
[01:16:30] some guiding structures
[01:16:31] and having the waveguide of the polymer
[01:16:35] aligned to the nanowire invert
[01:16:37] non-non-linear inverted taper of the
[01:16:39] picture and here you have your or test
[01:16:42] vehicle when you're the polymer is here
[01:16:43] highlighted
[01:16:44] and they're in blue and they're pick
[01:16:48] power region is in red we also have some
[01:16:51] repeatability so we did
[01:16:52] 48 samples and here you have our
[01:16:55] reputable measurements
[01:16:57] for tntm so again self-alignment
[01:16:59] automatic process for the
[01:17:00] for the power polymer to pick interfaces
[01:17:03] and also the polymer to the ferrule
[01:17:05] but we use active alignment at this
[01:17:07] phase to remove
[01:17:08] uh the empty to empty loss it's it's
[01:17:10] less than half a db
[01:17:12] but we want to have remove this half db
[01:17:14] to just have the
[01:17:15] pure the pure connection from the
[01:17:17] polymer to the pick
[01:17:18] and as you can see we have amazing uh
[01:17:20] very good distribution
[01:17:22] we are all between 1 and 1.5 our lowest
[01:17:25] measurement 1.8 so this is very very
[01:17:26] good reason
[01:17:27] and we're using polymer so this is a
[01:17:30] complex module for superior risk
[01:17:31] and can go to extremely dense pitch and
[01:17:34] it's uh
[01:17:35] can be as it's using a high throughput
[01:17:37] pick and place tool for assembly
[01:17:40] then i will show our v-groove coupler
[01:17:42] that peter has uh mentioned uh
[01:17:44] previously
[01:17:45] so basically the main idea here is
[01:17:46] having a fiber array that can
[01:17:48] you can place down inside some v-groove
[01:17:51] structure
[01:17:51] and at the end of the vigor structure
[01:17:53] you have a remote coupler a remote cover
[01:17:55] is a suspended membrane where
[01:17:56] metamaterial
[01:17:57] is is is pattern and this metamaterial
[01:18:00] is
[01:18:00] mode converter is designed for for
[01:18:02] engineering mode engineering for max
[01:18:04] tolerances
[01:18:05] because if you look at all the
[01:18:06] tolerances for for example the v-groove
[01:18:08] width
[01:18:08] the fiber diameter the fiber core
[01:18:11] concentration concentricity
[01:18:12] and you put all those variation in this
[01:18:16] top
[01:18:16] uh right image you can see this uh monte
[01:18:19] carlo distribution
[01:18:20] off and you can see that at the end your
[01:18:23] your core to the
[01:18:24] to the mold copper structure alignment
[01:18:26] will be within one micron
[01:18:28] when you consider all the self-alignment
[01:18:31] process and we have designed
[01:18:32] our mold coupler to have this one micron
[01:18:35] acceptance
[01:18:36] uh to be a rely on self-alignment to to
[01:18:39] correctly
[01:18:40] uh couple the light in as you can see
[01:18:43] we there's two portions so there's one
[01:18:45] for the structural adhesive that will be
[01:18:47] a mechanical and stable business it's
[01:18:48] solder reflectable
[01:18:49] so it will held the fiber in place and
[01:18:52] keep them aligned
[01:18:53] and it's extremely chosen for
[01:18:55] manufacturing purpose it's a quick uv
[01:18:57] attack
[01:18:57] five seconds and then the complete cure
[01:19:00] is done in the batch process tool
[01:19:01] without impacting the throughput of the
[01:19:04] high pick and place tool
[01:19:05] and we have an optical adhesive that in
[01:19:07] for this where the multicopper is used
[01:19:09] and this
[01:19:09] this one is choose to for the optical
[01:19:11] performance and to reduce also
[01:19:13] all the stress in the package here we
[01:19:15] have our coupling so you can see we're
[01:19:17] sub db coupling
[01:19:18] we have point set db for the te 1.4 for
[01:19:21] the tm we have a little bit more
[01:19:23] uh sensibility but we coupled both
[01:19:25] position and it's also
[01:19:26] a pic compatible pick and place tool as
[01:19:29] the fiber just fall down inside the
[01:19:31] array
[01:19:32] it's reflectable and one other thing
[01:19:34] that i had to mention we do have those
[01:19:36] ray with
[01:19:37] pre-clock pm fibers so we can have pm
[01:19:40] fibers in the cylinder area
[01:19:41] and basically make our pm fiber fall
[01:19:43] down the v-groove
[01:19:44] and align them as we say away as a
[01:19:46] regular single mo fiber so we can
[01:19:48] extremely efficiently include our pm
[01:19:51] fibers
[01:19:52] in our array for packaging and
[01:19:55] here in the middle graph you also have a
[01:19:58] back reflection as you can see we're
[01:19:59] all better than 31 db and this is very
[01:20:02] important
[01:20:02] especially when you have your lasers and
[01:20:04] other aspects so you have here
[01:20:06] the reflection of all the features from
[01:20:08] the input fiber and from the
[01:20:10] multiplier structures and as you can see
[01:20:12] where
[01:20:13] back perfection loss is very very good
[01:20:17] uh of course we do a flip chip photo
[01:20:19] link so so
[01:20:20] a google phone you can put receiver pad
[01:20:22] we can bump them and here is our test
[01:20:24] vehicle for flip chip photonics
[01:20:26] so this was a 200 micron pitch
[01:20:27] interconnect you have a
[01:20:29] opening for the v-groove area where the
[01:20:31] fiber fell you can see here
[01:20:33] without the protective cover just to
[01:20:35] show how the v-groove area
[01:20:36] and here you have a repeatability so
[01:20:39] this is our
[01:20:40] assertion loss the total institution
[01:20:41] loss so it does include the empty loss
[01:20:44] of the connector at the end of this
[01:20:46] fiber array and as you can see our
[01:20:47] average is 1.6 db
[01:20:49] this was done with a self-alignment
[01:20:51] automated process
[01:20:53] for over 168 samples as you can see
[01:20:55] we're all over 3 db
[01:20:57] this is very good it was using a formic
[01:21:00] acid flip chip bonding
[01:21:01] because you need a fluxless solution to
[01:21:03] require and maintain the
[01:21:04] facet cleanliness and and groove
[01:21:08] cleanness to have the fiber that will
[01:21:11] correctly sit
[01:21:11] sit down inside the v-groove and this is
[01:21:14] we use a temporary adhesive attacking
[01:21:16] fluid basically to
[01:21:17] hold the pick while going through first
[01:21:19] and we do do have a fornic acid furnace
[01:21:22] at our main plant and we also have a
[01:21:24] smaller air in v1
[01:21:25] in the development center and as you can
[01:21:28] see we have no voiding cracking the
[01:21:29] inter metallic under solder and this
[01:21:31] formic acid is available at burma
[01:21:34] here we have some of our reliability
[01:21:36] data so of course we are sold or
[01:21:38] refillable this was using
[01:21:39] our uh how we call it a high sensitivity
[01:21:42] hardware so basically where any
[01:21:44] misalignment is is is
[01:21:46] is has a huge instruction loss change so
[01:21:49] we're not in the
[01:21:50] in the in the in the acceptance range
[01:21:52] we're more the high
[01:21:54] change range to be able to monitor any
[01:21:55] slight mils alignment
[01:21:57] and basically you can see here that we
[01:21:58] have five uh soldering flow and
[01:22:00] basically we're
[01:22:01] within the mating error uh we also did
[01:22:03] some thermal cycling so first we use the
[01:22:05] telcor just standard but we
[01:22:07] then move to jedick-like standard as the
[01:22:10] or optical or photonic engine would be
[01:22:12] very close to a hot asic and we need to
[01:22:14] be able to withstand higher temperature
[01:22:16] so we we are redefining those those
[01:22:18] specifications as telcor is maybe a
[01:22:20] little outdated
[01:22:21] and and we need maybe to have more
[01:22:23] co-packaging because we are the
[01:22:24] co-packaging
[01:22:25] expert of photonics and electronics and
[01:22:27] we need to have those higher grade
[01:22:29] uh uh uh electronics like
[01:22:32] great for photonics and then we have
[01:22:34] also a damp heat
[01:22:36] demonstration for over 2000 hours
[01:22:40] so okay so our expertise we have those
[01:22:42] advanced nodes we can do those approval
[01:22:44] material sets we
[01:22:45] can help for protecting to prototyping
[01:22:47] to high volume vectoring
[01:22:49] we are the leader in microchiring and
[01:22:50] co-package photonics
[01:22:52] we you are the leader in complex mcm and
[01:22:54] a complex
[01:22:55] system and package we can enable a
[01:22:57] better time to market
[01:22:58] uh you're you're already using the
[01:23:00] benefit of our existing model and design
[01:23:02] team
[01:23:03] we can also do beyond ground zoo we can
[01:23:05] do a customization and characterization
[01:23:07] for for your application
[01:23:09] and and basically our business model we
[01:23:10] are a co-design partner we we have those
[01:23:12] building blocks uh
[01:23:13] that that are in within our adk and
[01:23:16] they're
[01:23:17] it's an integrated supply chain we're
[01:23:18] with wafer farm so all the ecosystem is
[01:23:20] provided and we can
[01:23:21] help you to design and everything will
[01:23:23] be manufacturable
[01:23:25] so we put our packaging know-how at your
[01:23:26] service and we focus really on your
[01:23:29] application and performance
[01:23:30] and thank you for your time and if you
[01:23:32] have any questions please
[01:23:34] do not hesitate to contact me yes alex
[01:23:36] there are plenty of questions in the
[01:23:37] chat but uh
[01:23:38] well we are really really impressed for
[01:23:41] your presentation thank you very much
[01:23:42] for this i
[01:23:43] i well we didn't meet in one year but i
[01:23:46] i see you have been busy
[01:23:48] and then let let me
[01:23:51] start with our epic question and
[01:23:54] what we can do for you what we can do
[01:23:57] you are here
[01:23:58] in front of all the ecosystem the
[01:24:00] photonic ecosystem do you have any
[01:24:02] challenge
[01:24:03] um or any unmet need
[01:24:06] right now yeah so so we are
[01:24:09] osat we have those building blocks they
[01:24:11] are made for volume manufacturing but
[01:24:13] what we see
[01:24:14] is there's a need for for co-packaging
[01:24:16] standards i have seen a lot of
[01:24:17] discussion about having those
[01:24:19] pick samples to ease so this is
[01:24:21] something of high interest for us
[01:24:23] also we are a lot involved in this oif
[01:24:25] initiative to define those
[01:24:27] cpo standards and packaging uh
[01:24:31] in this those those ground rules to
[01:24:33] design a pick package
[01:24:35] and and we we try to contribute with in
[01:24:37] a packaging perspective
[01:24:39] in this that domain so yeah
[01:24:42] okay so then let's go to our chat but
[01:24:44] thank you very much for the
[01:24:45] answer and maybe we can start with
[01:24:48] michael uh michael levy uh
[01:24:50] you have a question or a comment uh
[01:24:52] regarding the
[01:24:53] eight keys yeah um
[01:24:58] peter talked about the adks and you
[01:24:59] mentioned it briefly in your talk
[01:25:02] you have a lot of different um packaging
[01:25:05] competencies
[01:25:06] in bromont it's really impressive i mean
[01:25:08] the slides are great
[01:25:10] um and so you could really sort of
[01:25:12] impact a lot of the packaging trends
[01:25:15] but what do you and your team think
[01:25:18] about
[01:25:18] adks um just like the pdks and foundries
[01:25:22] i mean
[01:25:23] do you see this as something that's
[01:25:25] going to be growing and important
[01:25:27] as we look towards you know co-packaging
[01:25:30] solutions and standardization
[01:25:32] absolutely you're totally right uh adk
[01:25:35] are very social and currently our
[01:25:36] strategies is more
[01:25:37] what we have demonstrated and also
[01:25:39] there's this concept of having a
[01:25:41] reliable
[01:25:42] reliable process so we're developing
[01:25:44] those packaging ground rules
[01:25:46] and when you look at your adk it's awful
[01:25:48] because when you look at the space that
[01:25:50] fibers
[01:25:51] need on the v-groove on the chip it's
[01:25:54] huge
[01:25:54] it's you jude huge so you need to have
[01:25:57] those those
[01:25:57] bleed out clearance you need to have
[01:25:59] those those features uh
[01:26:01] to to to package the chips and they're
[01:26:03] they're they're
[01:26:04] taking a lot of space so so this is very
[01:26:06] important
[01:26:07] and we do have our adk and we
[01:26:10] would have this process and we have a
[01:26:13] reliability demonstration we also have
[01:26:15] those extremely
[01:26:17] aging demonstration we do have those
[01:26:19] laser aging
[01:26:20] as as peter has mentioned all would add
[01:26:22] as if those those
[01:26:23] plasticity or creeping are very
[01:26:25] detrimental so we had to
[01:26:27] to validate that and say we have proven
[01:26:29] that our fiber attached can
[01:26:30] can withstand centuries of alignment
[01:26:32] it's soldery flowable there were a lot
[01:26:34] of work in having those
[01:26:36] secret sauce and material selection
[01:26:39] and this was a huge effort to have those
[01:26:42] and they
[01:26:42] are now ready in the adk
[01:26:45] no thank you thank you great answer
[01:26:48] okay thank you very much now maybe we
[01:26:50] can go to seuss micro optics because
[01:26:53] wilfred has a has a question here and
[01:26:56] wilfred maybe
[01:26:57] now is a good moment to explain a little
[01:26:59] bit what is jesus micro optic doing
[01:27:02] uh well yes thank you uh i know well i
[01:27:05] was more wondering about the the thermal
[01:27:07] management and
[01:27:08] and so first of all again uh great
[01:27:11] slides are very impressive especially
[01:27:13] the passive alignment
[01:27:15] we're worried a little bit about this
[01:27:16] but but i'm um
[01:27:20] i'm more thinking about when you
[01:27:21] integrate the light sources you have to
[01:27:23] do
[01:27:24] more thermal management so i saw a lot
[01:27:25] of copper and copper cores
[01:27:28] in your in the devices that you showed
[01:27:30] and um
[01:27:32] and i'm wondering how you how this is
[01:27:34] going to be in the future are you
[01:27:35] integrating uh
[01:27:37] the light sources as well because the
[01:27:39] lasers directly in the photo diets or
[01:27:42] is it more all just passive optical
[01:27:45] components
[01:27:46] and i don't know you wanted me to show
[01:27:48] some slides or should i do that now or
[01:27:50] should i do that if you have one yes if
[01:27:52] you have one slide to explain a little
[01:27:54] bit then
[01:27:55] okay then i do the technology that is me
[01:27:58] so uh share this one slide
[01:28:03] so yes um so we we are we are making
[01:28:06] micro optics so there was not much micro
[01:28:08] optics in the last slide
[01:28:10] in the last slides nevertheless um picks
[01:28:13] is still
[01:28:14] a large part of our business we do a lot
[01:28:16] of picks these days
[01:28:17] and we do we do a lot in
[01:28:20] the standard lenses the run-of-the-mill
[01:28:23] what we call protruding lenses for for
[01:28:25] all types of collimation efforts then we
[01:28:27] do a lot of recessed lenses especially
[01:28:29] for pick applications where
[01:28:31] we recess the lens you can assemble them
[01:28:33] easily with other components
[01:28:35] then of course we do all these lenses
[01:28:37] that are used in the
[01:28:38] already used directly assembled onto the
[01:28:41] pick we're also
[01:28:42] looking at wafer level packaging these
[01:28:44] days but the alignment accuracy that is
[01:28:46] required there
[01:28:47] is is is very tricky to achieve but
[01:28:50] nevertheless there are projects where we
[01:28:52] look into this on wafer level
[01:28:54] and we have also some special features
[01:28:57] here
[01:28:57] like you see here on the right on the
[01:28:59] right side so we have these integrated
[01:29:01] mirrors so if you need a 90 degree turn
[01:29:03] uh on the micro lens so that means this
[01:29:05] is an integrated device
[01:29:07] and also these gold pads for for
[01:29:11] also for achieving a reflow
[01:29:14] based process uh easily packaged
[01:29:18] and then last but not least we also
[01:29:21] can etch this deep reactive iron etching
[01:29:24] through holes into the silicon micro
[01:29:26] lenses and
[01:29:27] for for more or less self-aligned
[01:29:31] packaging with swiss alignment pins so
[01:29:33] all of this has been done
[01:29:36] many of these features are high volume
[01:29:38] but most of these features are already
[01:29:39] done in volume
[01:29:41] and i would see how how ibm
[01:29:44] sees this how how we can help with these
[01:29:47] features in their packaging efforts
[01:29:49] and and the other question i had like i
[01:29:52] said before
[01:29:53] how are the light sources handled in in
[01:29:54] the thermal management if you integrate
[01:29:56] the light sources on on chip
[01:29:58] thank you so i will try to answer
[01:30:02] my my best um for for the laser source
[01:30:04] uh currently what is the best way to do
[01:30:06] is to have those external
[01:30:08] laser in fibers so you typically have pm
[01:30:11] fibers that include
[01:30:12] we do have a program to have those flip
[01:30:14] chip laser
[01:30:15] on the pick chip and we're working on
[01:30:18] that but the
[01:30:19] currently for the solution for for
[01:30:21] production is to have those uh
[01:30:23] laser end fibers uh to include um then
[01:30:26] about
[01:30:26] those micro optics and and and we we
[01:30:29] prefer to have
[01:30:30] uh uh not use any of micro optics and
[01:30:32] having those fiber to v-groove
[01:30:34] and everything will be like encapsulated
[01:30:36] and and we prefer that because it's
[01:30:38] you don't need any aromatic packaging
[01:30:40] and also if you have any
[01:30:42] uh optical facet that can can be open it
[01:30:45] can be complemented you can have
[01:30:46] condensation it's it will
[01:30:48] lead you to those aromatic or quite a
[01:30:50] hermetic packaging which can be uh
[01:30:52] more costly and then of course when
[01:30:54] you're thinking about high power laser
[01:30:56] injection and and when you see the power
[01:30:59] that are the people and vision for for
[01:31:01] laser in uh and and
[01:31:03] you look at the the specs of those power
[01:31:05] uh
[01:31:06] contamination and surface cleanness is
[01:31:08] very important
[01:31:09] and and and so this is yeah so we have
[01:31:11] to keep that in mind
[01:31:14] did i answer correctly your questions
[01:31:15] yeah thank you yeah well
[01:31:17] i what we see is see our clients
[01:31:20] they they usually use uh or i
[01:31:24] i see a trend that these are already
[01:31:26] integrated devices so the laser is
[01:31:28] directly
[01:31:28] packaged co-packaged with the with uh
[01:31:31] with the pick more or less so
[01:31:32] and um i know what
[01:31:36] it's very interesting and very great
[01:31:38] what you should but but
[01:31:39] i don't is there like a parallel
[01:31:41] development in the market that some
[01:31:43] people go for
[01:31:44] more integration others go more for
[01:31:47] fiber-based lasers or
[01:31:49] um or pigtailed lasers even so i'm not
[01:31:52] sure
[01:31:52] what is then in the end the the better
[01:31:55] way to go
[01:31:57] yeah the laser will always be the the
[01:32:00] weakest link
[01:32:01] because they're the active they have
[01:32:02] this they will age
[01:32:05] badly compared to the other device so
[01:32:06] this is why we prefer to have those
[01:32:08] external laser bank
[01:32:09] banks or external laser source into your
[01:32:11] pick and then you can
[01:32:12] replace those uh laser as they they they
[01:32:15] fade out
[01:32:16] uh but of course as we see more and more
[01:32:19] of pick packaging eventually having
[01:32:21] those
[01:32:21] embedded laser inside the defaulting
[01:32:23] device will
[01:32:24] will help a lot in uh for for
[01:32:26] self-testing and and
[01:32:28] other features so we see that in the
[01:32:29] roadmap uh to have a
[01:32:31] embedded laser for for pic packaging
[01:32:34] uh but currently our solution for for
[01:32:37] volume production is to have
[01:32:38] a laser in fibers alexander question
[01:32:41] from youtube from the youtube universe
[01:32:43] this question is coming from
[01:32:44] from ficontech the company having epic
[01:32:47] providing the active alignment based
[01:32:48] manufacturing equipment for
[01:32:50] manufacturing of the electronics
[01:32:51] josue para has a question about the
[01:32:53] optical adhesives
[01:32:55] the adhesive for the fiber array unit to
[01:32:58] b group is very important to not exert
[01:33:00] the stress
[01:33:01] in the membrane of the peak around what
[01:33:04] cte and shrink percentage values are
[01:33:07] appropriate
[01:33:09] i know it's a very technical question
[01:33:11] yeah tell us as much as you can because
[01:33:13] we really can't help you here
[01:33:15] okay so what i can disclose we did the
[01:33:17] excess extensive
[01:33:19] survey of all the material that exists
[01:33:21] within this universe and within this
[01:33:23] galaxy so we test them
[01:33:24] all and in fact we didn't modify what
[01:33:26] was existing to meet our application
[01:33:29] uh so i cannot disclose their properties
[01:33:31] because this is our circuit sauce and
[01:33:33] there was a lot of effort in developing
[01:33:34] those those materials and of course yes
[01:33:36] you're totally right the city and
[01:33:38] addition and
[01:33:39] and humidity impact and those roofable
[01:33:41] compatibility of ferraris
[01:33:43] were very important in their in their
[01:33:45] analysis and
[01:33:46] evaluation i i like when you ask a
[01:33:49] question and you don't get an answer but
[01:33:50] you still make it feel that you said
[01:33:52] something here
[01:33:53] you know what i'm gonna get from that
[01:33:54] from your answer that we can
[01:33:56] really come to you individually and i
[01:33:59] will make some introductions here de la
[01:34:01] is watching
[01:34:01] because i think we have some room for
[01:34:03] cooperation back to ana
[01:34:08] well there are still one question i
[01:34:10] think peter you have a question right
[01:34:13] yeah what alexander's just answered it
[01:34:15] and that membrane it's really
[01:34:17] really nice but it looks very delicate
[01:34:20] so with the cta of the polymer under
[01:34:23] reflow
[01:34:23] i've seen some papers you published
[01:34:25] alexander and where you get bending and
[01:34:27] things like that but
[01:34:28] is is it a real challenge you basically
[01:34:30] had to make a customer boxy
[01:34:32] would that be a fair point yes we did uh
[01:34:36] we have a custom material and it is very
[01:34:38] expensive material but we use like
[01:34:40] so small quantity so it doesn't have any
[01:34:42] price and back
[01:34:43] but yes there was a huge effort in
[01:34:45] developing those and finding those
[01:34:46] materials
[01:34:48] okay that's thank you thank you
[01:34:51] okay and then well thank you very much
[01:34:53] for this for this talk for the
[01:34:55] discussion on time it
[01:34:57] just was super interesting let's move in
[01:34:59] the agenda and it's my pleasure to
[01:35:01] introduce
[01:35:02] a girl from frankfurt very chai so carl
[01:35:05] if you
[01:35:06] if you are ready the floor is yours
[01:35:11] yeah ana thank you very much for
[01:35:14] introducing me here
[01:35:16] uh can you see my slide now yes very
[01:35:19] well
[01:35:20] so i will give a talk on polyamide flex
[01:35:24] for high speed rf chip interconnect so
[01:35:26] it's a
[01:35:26] completely different topic now is
[01:35:28] regarding the rf
[01:35:30] and so i'm coming from found over
[01:35:35] hhi hundred hertz institute it's located
[01:35:38] in berlin
[01:35:39] and it's part of the over
[01:35:42] europe these 75 institutes
[01:35:46] which are located in germany
[01:35:49] um the front of a heinrich here center
[01:35:51] to it has seven departments so it's
[01:35:53] mainly divided into two parts
[01:35:55] one is video encoding so vision imaging
[01:35:58] technologies
[01:35:59] video communication application
[01:36:02] artificial intelligence
[01:36:03] and then the communication part wireless
[01:36:06] fiber optical sensor system photonic
[01:36:08] networking system
[01:36:10] and photonic components so i'm working
[01:36:13] in the photonic
[01:36:14] components group and the photonic
[01:36:16] components group
[01:36:17] is doing detectors lasers
[01:36:21] we have a indium phosphide peak foundry
[01:36:23] so we have a complete indium phosphite
[01:36:25] fabrication line with epitaxy with
[01:36:28] several epitaxis
[01:36:30] we do polymer hybrids polymer picks
[01:36:32] terahertz sensing and
[01:36:34] prototype packaging and of course we do
[01:36:36] also the
[01:36:37] marcendor modulators fast maternal
[01:36:39] modulators based on indium phosphide
[01:36:41] this is a group where i'm working in
[01:36:44] and here is the motivation of this talk
[01:36:47] here
[01:36:48] so the evolution of the optical
[01:36:50] transceivers it always goes faster
[01:36:52] low power and smaller size with these
[01:36:54] pluggables and what michael levy
[01:36:57] already mentioned that nowadays the
[01:36:59] electrical line rate
[01:37:01] goes towards this high
[01:37:05] power trades of 100 gigabot and more
[01:37:08] so what we see is really uh
[01:37:12] if we target now boat rates larger than
[01:37:14] 90 giga
[01:37:15] volt and we want to have low power
[01:37:18] we need really to have this
[01:37:20] heterogeneous integration
[01:37:21] with a holistic design approach and that
[01:37:24] it means
[01:37:25] co-design of pic ic and the rf interface
[01:37:31] so what we faced here in the past at
[01:37:35] 2016 we saw or people
[01:37:38] other people saw this this border here
[01:37:41] regarding the power consumption of the
[01:37:43] devices which have been built
[01:37:45] and we started there also to do this
[01:37:48] co-design with our modulators with our
[01:37:51] emls together with special designed
[01:37:55] seagate driver ics
[01:37:57] um really co-designed impedance
[01:38:01] impedance use these impedances which are
[01:38:03] really
[01:38:04] bringing us to the low power consumption
[01:38:06] and what you see here is that we could
[01:38:08] bring down
[01:38:09] the the power power consumption
[01:38:12] tremendously
[01:38:13] towards this area here so
[01:38:16] what we have to do now and if we want to
[01:38:20] go to
[01:38:20] 90 gigabot at low power the requirements
[01:38:24] for the rf
[01:38:25] chip interconnects are really demanding
[01:38:28] then
[01:38:28] so what we have to do is co-design so
[01:38:31] as i already mentioned it and the
[01:38:34] co-packaging of driver and i see
[01:38:36] driver ic and the pick i think it's
[01:38:40] absolutely necessary and this allows
[01:38:43] them the low
[01:38:44] power designs for example one can use
[01:38:46] all the open collector designs
[01:38:48] to do that what has to match the
[01:38:51] required rf impedance
[01:38:52] and when i speak about rf impedance it's
[01:38:56] not only the standard impedance it's
[01:38:58] really
[01:38:58] the impedance what the device needs to
[01:39:01] bring down the power consumption and to
[01:39:04] speed it up
[01:39:05] for example for the modulator what we
[01:39:07] are doing we have here the two times 25
[01:39:09] ohm differential
[01:39:10] drive and then the the the driver ic has
[01:39:13] to
[01:39:14] be adapted to that um when it's a good
[01:39:17] thermal mechanical isolation
[01:39:20] think about if you have a pig on tech
[01:39:22] and you want to do
[01:39:23] rf interconnect to a driver which is
[01:39:26] passively cooled
[01:39:27] on the module and of course you have to
[01:39:30] do multi
[01:39:31] multiple channels so you have to do a
[01:39:32] race so the polyimide
[01:39:35] rf flex line fulfills these requirements
[01:39:38] so what we do here this is a rf flex
[01:39:41] line
[01:39:42] this is now a one millimeter cpw line
[01:39:45] here in the cross section um the
[01:39:47] polyimide it's it's
[01:39:49] more or less it's a thin film technology
[01:39:51] for the for the for the
[01:39:52] code layer the device is about 25 micron
[01:39:56] thick
[01:39:57] and what we achieve here if you do such
[01:40:00] a measurement
[01:40:01] is way beyond 110 gigahertz what we can
[01:40:04] measure at the moment so
[01:40:05] this is only 0.5 db so it's it's a
[01:40:09] really very nice and impressive from the
[01:40:12] rf performance
[01:40:14] and what we envisioned here this is now
[01:40:17] a let's say
[01:40:17] older 3d design study if you go for a
[01:40:20] flex um
[01:40:22] for a for such a poorly i might flex
[01:40:24] it's
[01:40:25] not only uh capable for having now um
[01:40:30] let's say normal in the integration
[01:40:34] from the driver to the pick but you can
[01:40:36] have for example here
[01:40:38] at two planes two different planes for
[01:40:40] the optic here in blue
[01:40:42] and the electric in the first floor for
[01:40:45] example and just you combine it here
[01:40:46] with the rf
[01:40:48] flex lines just to give an example what
[01:40:50] is possible with such a
[01:40:52] arrangement so what we do we do this
[01:40:54] customized design we do it on a four
[01:40:57] inch wafer fabrication after fabrication
[01:41:01] we release these devices and here on the
[01:41:03] right hand side you can see what we get
[01:41:05] there if you
[01:41:06] apply it then on a test device so
[01:41:09] left and right are silicon ics and
[01:41:13] or indium phosphide and just as a
[01:41:16] connection test and
[01:41:18] still we are way beyond the measurement
[01:41:22] or a measurable 110 gigahertz
[01:41:25] a 3 db frequency here
[01:41:29] so this rf flex line enables
[01:41:32] heterogeneous integration
[01:41:34] and of the best of breed pick and ic
[01:41:36] technologies that means
[01:41:37] we can choose really the best technology
[01:41:39] here the connecting of the rf flex line
[01:41:42] is done by
[01:41:43] gold stud bumps solar spheres like you
[01:41:46] can see it here with our suck
[01:41:48] solders for example gold tin sodas so we
[01:41:51] did also
[01:41:52] gold pillars and used uh anisotropic
[01:41:54] conductive film
[01:41:56] and this rf flex lines as i already
[01:41:59] mentioned before
[01:42:00] this envisions really also small size 3d
[01:42:03] rf assemblies
[01:42:04] you can bend it really very sharp very
[01:42:07] narrow
[01:42:08] bend radius of just 100 microns
[01:42:12] and and and so without compromising you
[01:42:15] the rf
[01:42:15] performance so for broadway it's more
[01:42:18] than 90 gigahertz
[01:42:19] poly i might flex is one of the best
[01:42:22] internet uh
[01:42:23] one of the best rf interconnect
[01:42:25] technologies
[01:42:26] uh what i can think of at the moment
[01:42:29] yeah
[01:42:29] thank you very much that's what i wanted
[01:42:31] to tell you today
[01:42:34] thank you very much carl super
[01:42:35] interesting presentation
[01:42:37] tell us what you know what is the epic
[01:42:39] question tell us about what kind of
[01:42:41] collaboration so how
[01:42:43] our members could help you with these
[01:42:45] developments that you just showed
[01:42:48] well the main point is that that we are
[01:42:49] doing of course a chip
[01:42:51] development so pick designs so this is
[01:42:54] our main
[01:42:55] main interest and of course this this
[01:42:58] flip chip technology what we are also
[01:43:01] doing because
[01:43:02] you need to do the flip chip technology
[01:43:04] now um
[01:43:05] for this integration steps and we do
[01:43:08] that also in different projects like
[01:43:11] peter mentioned it before with photonic
[01:43:13] leap so there
[01:43:14] a lot of people are working together
[01:43:16] with us already
[01:43:17] towards this high board rate but i think
[01:43:19] the high boat rate is really the most
[01:43:22] important there the most important thing
[01:43:24] is really
[01:43:25] to think about the rf integration and so
[01:43:28] rf integration from the driver's side
[01:43:31] from the peak side and also from the
[01:43:33] from the
[01:43:34] from the integration really the rf
[01:43:38] um interconnect technologies and what i
[01:43:41] saw is
[01:43:41] that that for the modules
[01:43:45] the flex is already let's say in the oif
[01:43:49] uh for for for com
[01:43:52] for for connecting the the rf
[01:43:56] from the module to the pcb but what we
[01:43:59] need now is really to bring
[01:44:01] all these rf technologies also inside
[01:44:03] the package
[01:44:04] and well i think this is something we do
[01:44:08] it because i think or we think that it's
[01:44:10] necessary and bring the
[01:44:12] performance what we need and the power
[01:44:14] reduction and
[01:44:16] low power consumption and so i think we
[01:44:20] welcome all people
[01:44:21] um which are interested to to look into
[01:44:24] have a look into this technology
[01:44:27] i see comments here in the chat from
[01:44:28] michael levy and from john from bay
[01:44:30] photonics say
[01:44:31] do you want to comment maybe
[01:44:34] yeah this is michael i i really like the
[01:44:37] fact that
[01:44:38] uh you're you're emphasizing rf design
[01:44:42] i mean we're looking at you know
[01:44:44] high-speed polymer modulators at 70
[01:44:46] gigahertz
[01:44:47] and really the rf becomes really tricky
[01:44:51] and becomes a key factor in both the
[01:44:53] device design
[01:44:55] as well as what the package will look
[01:44:57] like
[01:44:58] and you have to really design both
[01:45:00] together so i
[01:45:01] totally agree this is really important
[01:45:04] and i think peter said the same thing
[01:45:06] earlier rf is as we go forward in higher
[01:45:09] data rates has become
[01:45:10] key in how you address the packaging
[01:45:13] issues
[01:45:14] not only the device issues but the
[01:45:15] packaging issues too so yeah i
[01:45:18] totally support that okay
[01:45:21] john do you want to come in as one yes i
[01:45:23] would i mean we're already undertaking
[01:45:25] this on certain projects where you're
[01:45:27] having
[01:45:27] to model uh i o from the pick
[01:45:31] through the connectivity to the i o
[01:45:34] on the the package and also the
[01:45:38] surrounds around the chip the driver and
[01:45:41] the package
[01:45:42] so we're already undertaking programs
[01:45:44] that include that
[01:45:45] involving various different rf
[01:45:46] simulation tools
[01:45:50] hey thank you and we have a question
[01:45:52] from
[01:45:53] a gerund a from fix say jerome do you
[01:45:55] want to make the question by yourself
[01:45:58] yes i was really wondering carl how do
[01:45:59] you see the assembly of these
[01:46:02] flex lines in a production line so is it
[01:46:04] like a flip chip pick and place tool but
[01:46:06] then i can imagine you can assemble one
[01:46:08] side
[01:46:10] but the other side might be at a
[01:46:11] different height so how do you like
[01:46:13] recognize the different parts then
[01:46:15] and do the assembly process
[01:46:18] well you're right you you come to the
[01:46:20] tricky part at that point
[01:46:21] i mean what what we envision here is
[01:46:24] that
[01:46:24] you do let's say sub assemblies in a
[01:46:27] flip chip technology
[01:46:29] and then you use these sub assemblies
[01:46:31] and bring that into the
[01:46:33] device and mount it there doing only
[01:46:35] this
[01:46:36] so you can do flip chipping of the ic
[01:46:39] and the pick
[01:46:40] and then you just turn that
[01:46:43] device later on flip it again and and
[01:46:46] connect it into your
[01:46:47] module for example so there are ways to
[01:46:50] do that and
[01:46:51] to to achieve that single devices might
[01:46:54] be a little bit more
[01:46:56] critical because these all this
[01:46:58] alignment stuff
[01:47:00] if if you do it in the lab this is what
[01:47:03] we do at the moment
[01:47:04] and there you can show the performance
[01:47:05] but then of course
[01:47:07] i mean um i i would love to have a
[01:47:10] let's say a a flex line bonder
[01:47:13] which can which can handle that directly
[01:47:16] uh
[01:47:16] from from from from a large uh like like
[01:47:20] with a bonder
[01:47:21] doing it with a flex line but at the
[01:47:23] moment this is not available so we
[01:47:25] maybe this is a new uh research topic
[01:47:30] okay thank you very much for your
[01:47:32] thought carl and thank you very much for
[01:47:33] this discussion and
[01:47:35] uh don't mute yourself because now it's
[01:47:38] my pleasure to introduce you
[01:47:39] so now let's talk about the large scale
[01:47:42] manufacturing and yesterday
[01:47:44] from the promise the producers
[01:47:48] thank you anna i hope i can still share
[01:47:51] some insights that haven't been told
[01:47:53] there earlier
[01:47:54] so as last speaker um
[01:47:57] i think for the people that know that
[01:47:59] don't know fakes yet
[01:48:01] we are doing volume uh production of
[01:48:03] tonic integrated
[01:48:04] assemblies from prototype up to like
[01:48:07] volume so we focus on like die
[01:48:09] preparation
[01:48:10] thermal packaging polarization
[01:48:11] maintaining fiber so all the stuff that
[01:48:13] is required
[01:48:14] to make a photonics module and to help
[01:48:16] up uh with our
[01:48:18] customers um we are also and i think
[01:48:21] it's not really stressed out so far
[01:48:24] we're not only doing packaging for like
[01:48:25] telecommunication kind of
[01:48:27] devices but also for visible wavelength
[01:48:30] range
[01:48:31] for red green and blue devices that are
[01:48:34] being used in the biomedical
[01:48:36] area as well as mid infrared devices so
[01:48:38] it's like completely different mode
[01:48:40] fields
[01:48:40] different wavelengths different power
[01:48:42] requirements
[01:48:43] so it's not only all about the exact
[01:48:45] same like cost and metrics as that are
[01:48:48] applicable for the data communications
[01:48:50] environment
[01:48:52] we also recognize that a pig by itself
[01:48:54] is definitely not a product
[01:48:56] you always need to interface with the
[01:48:57] fibers and i think it was brought up
[01:48:59] earlier
[01:49:00] by carlos like all fibers and
[01:49:02] polarization maintaining fibers
[01:49:03] are costly parts and if you're looking
[01:49:05] to the scale up to high volume
[01:49:08] they're not reduced a lot in terms of
[01:49:10] like the cost so there's still quite
[01:49:11] some manual labor
[01:49:12] involved in doing this this fiber
[01:49:15] polishing
[01:49:16] and determination around it we also do
[01:49:19] the
[01:49:19] interfacing with the electronics so it
[01:49:21] means we need to have like high density
[01:49:23] electrical printed circuit boards
[01:49:25] that are really going and combining the
[01:49:28] photonics and the electronics
[01:49:30] on the same carrier as well as the
[01:49:31] thermal stabilization i mean attack is
[01:49:33] not like a critical part
[01:49:35] but it's costing several euros apart if
[01:49:38] you want to integrate it so if you have
[01:49:40] designs that can live without it
[01:49:42] it's taking out quite some of the cost
[01:49:44] and all to all
[01:49:45] like if you're looking to silicon
[01:49:47] photonics and silicon photonics roadmaps
[01:49:50] people are claiming like 10 cents per
[01:49:51] square millimeter or even less than that
[01:49:54] and if you're looking to that packaging
[01:49:55] will always remain like 60 to 80
[01:49:59] of that packaging cost so i don't see
[01:50:01] that changing and i think for us
[01:50:03] it's really the question to from our
[01:50:05] customers how can we create an
[01:50:07] acceptable cost roadmap from the the
[01:50:09] first prototypes
[01:50:10] that they can get from a multi-project
[01:50:12] wafer up until the volume production
[01:50:14] where they're making like thousands or
[01:50:16] millions of devices on the same process
[01:50:20] if you're looking to like the automation
[01:50:22] so that's like a few slides that i have
[01:50:24] on that so we work together with
[01:50:25] frauenhove and xemtech to get like the
[01:50:28] fiber arrays to be built
[01:50:29] using an automated tool recognizing the
[01:50:32] stress rods rotating them
[01:50:33] and putting them in the fiber v grooves
[01:50:36] so that we have like a step and repeat
[01:50:38] process so we can build like a few
[01:50:40] channel fiber rays
[01:50:41] but also with like hundreds of channels
[01:50:43] next to each other
[01:50:46] if you're looking to the the the fiber
[01:50:49] array so we are now having like a
[01:50:50] variety of these fiber arrays
[01:50:52] already on stock so people can just use
[01:50:54] it off the shelf
[01:50:55] and and take it from there and we also
[01:50:58] work together with like team photonics
[01:51:00] to make spot size converters that we can
[01:51:02] directly attach
[01:51:03] using our fiber to chip attachment
[01:51:05] methodology so we're using the exact
[01:51:07] same
[01:51:07] strategies to assemble spot size
[01:51:09] converters that people can use since
[01:51:12] like depending on the platform that
[01:51:13] you're using for example
[01:51:15] quite some indium phosphide chips or
[01:51:17] silicon phonics chips
[01:51:18] don't have spot size converters on the
[01:51:20] chip so you need to have an external
[01:51:21] mean
[01:51:22] to blow up the mode field before you can
[01:51:24] couple it efficiently to a fiber
[01:51:28] for the automation we also work with phi
[01:51:31] contacts so they're also on board today
[01:51:33] and we have a very nice machine that is
[01:51:35] like doing a temporary alignment of a
[01:51:37] fiber array coupling in light to the
[01:51:39] silicon chip
[01:51:41] so we have like a signal and then on the
[01:51:43] right side here
[01:51:44] we can get a gain element automatically
[01:51:46] attached to the silicon photonics chip
[01:51:48] and it means like this part is a
[01:51:51] temporary chip chip
[01:51:52] or a chiplet configuration and it really
[01:51:55] allows us to make like a step and repeat
[01:51:57] process to scale up the automation
[01:51:59] and to take away the manual labor that
[01:52:01] is required
[01:52:02] to do the assembly of a complete device
[01:52:05] so you can add complexity
[01:52:06] of different chip materials without
[01:52:08] adding a lot of cost to your complete
[01:52:10] system
[01:52:12] the same we're doing as well with fine
[01:52:14] tech but then for the flip chip
[01:52:16] application so we have manual bonders
[01:52:18] we're here unwrapping our
[01:52:20] automated bomber that came in last week
[01:52:22] to really scale up
[01:52:24] the fine placement accuracy so we do
[01:52:26] active alignment
[01:52:28] passive alignment with automated tools
[01:52:30] around it
[01:52:31] and of course as peter was stating
[01:52:32] earlier design for assembly design
[01:52:35] guidelines that's going to be the key
[01:52:37] for like the prototypes
[01:52:38] that people are adhering to it and it's
[01:52:40] taking out the
[01:52:41] the cost of the engineering on the first
[01:52:44] prototype since that's what you want to
[01:52:46] save on
[01:52:47] later on customers can customize since
[01:52:49] like a
[01:52:50] biological company that has a consumable
[01:52:54] sensor is something different than a
[01:52:56] product that we are making
[01:52:58] and which needs to survive on a
[01:53:00] satellite for 15 years
[01:53:02] when it's flying in orbit and it's not
[01:53:04] serviceable so we also see that our
[01:53:06] customers are having like different
[01:53:08] requirements when it comes to packaging
[01:53:10] but the design guidelines are helping at
[01:53:12] least to like
[01:53:13] start with the same background in the
[01:53:15] initial phase
[01:53:16] and before you're splitting off your
[01:53:18] customized development work
[01:53:21] and we also see if you're not adhering
[01:53:23] to design guidelines if it's not working
[01:53:25] on paper
[01:53:26] it's also creating a mess when we are
[01:53:27] trying to assemble it
[01:53:29] and these simple kind of like wire
[01:53:31] bonding schemes
[01:53:32] even though in electronics it's standard
[01:53:34] to have the contact pads only at the
[01:53:36] periphery
[01:53:36] for the photonics people are like trying
[01:53:38] to figure out how to get
[01:53:40] all the chip functionality onto the
[01:53:42] small
[01:53:43] chip area that they're getting dedicated
[01:53:45] to them
[01:53:46] and we're also therefore not stating
[01:53:47] that we have design rules but we have
[01:53:49] design guidelines so we're
[01:53:51] we're providing guidance and if you want
[01:53:53] to like go away from it
[01:53:54] feel free to do so but that's really
[01:53:56] customization and that might not be
[01:53:58] automatable in the end
[01:54:01] so if you're looking to cos drivers
[01:54:03] during the scale up so what we're seeing
[01:54:05] in the beginning it's really about the
[01:54:07] amount of customized engineering that is
[01:54:09] required
[01:54:10] so we have characterization package
[01:54:11] standards that are really enabling the
[01:54:13] customers
[01:54:14] to get like fiber arrays on one or two
[01:54:17] sides of the chips
[01:54:18] printed circuit boards on the other two
[01:54:20] sides of the chips
[01:54:21] so you can do some testing if you're
[01:54:24] then looking to
[01:54:24] like commercialization and scale up
[01:54:27] we're really seeing
[01:54:28] hematicity is it a requirement or is it
[01:54:31] not especially for indium phosphite
[01:54:33] with active materials you have nice big
[01:54:35] platforms
[01:54:36] but there's no real data yet on how
[01:54:38] hermetic should these parts be
[01:54:40] packaged and i know people are working
[01:54:42] on silicon dioxide preservation layers
[01:54:45] but it's not being qualified yet so
[01:54:47] people are still demanding
[01:54:48] a gold box kind of package and we're
[01:54:51] still looking to like
[01:54:52] hundreds of euros for such gold blocks
[01:54:56] and
[01:54:57] depending on like the size and the
[01:54:58] complexity there might be quite some nre
[01:55:02] from the investment required as well to
[01:55:05] get these first prototypes down
[01:55:07] also if you're looking to like ceramic
[01:55:10] and organic interposers
[01:55:12] the bandwidths they're significant
[01:55:14] microstating already
[01:55:15] 70 gigahertz or even like 100 gigahertz
[01:55:18] so we need to go to higher frequencies
[01:55:21] but what we're also seeing is that
[01:55:22] the pad and gap distances between the
[01:55:25] electronic connections
[01:55:27] they need to change since when we do the
[01:55:29] packaging for example of some processors
[01:55:31] we have like thousands of connections
[01:55:34] that need to be made with a flip chip
[01:55:36] methodology
[01:55:37] and we need to have interposed materials
[01:55:39] that are capable
[01:55:41] of fanning out all these signals from
[01:55:43] the photonics chips
[01:55:44] if you're looking to fiber arrays yes we
[01:55:47] can assemble polarization maintaining
[01:55:49] fiber array
[01:55:50] but still it's more expensive than using
[01:55:52] single mode fiber array and it's also
[01:55:55] it's the the fiber cost itself but also
[01:55:57] the assembly steps that we're doing to
[01:55:59] it
[01:55:59] so it should be like a careful decision
[01:56:02] whether you can use one over the other
[01:56:03] so for prototyping
[01:56:05] people are using pm that's not an issue
[01:56:07] but it's really when you're scaling up
[01:56:08] how do you deal with that so far i
[01:56:11] didn't hear anybody talking about
[01:56:13] isolators since what we're seeing is
[01:56:15] that isolators are really critical
[01:56:18] in protecting the lasers and getting a
[01:56:20] stable light source
[01:56:21] and you can get them on an individual
[01:56:23] channel and you can assemble them in the
[01:56:24] fiber array
[01:56:26] but still you want to have like an array
[01:56:28] style and not an individual channel
[01:56:29] style
[01:56:30] where the price is scaling per channel
[01:56:32] that you're adding
[01:56:33] spot size conversions i briefly touched
[01:56:35] on that already
[01:56:36] what we're doing with team photonics so
[01:56:38] like you can get it on the chip
[01:56:40] and that would be the preferred choice
[01:56:42] and then it's already monolithically
[01:56:44] integrated graded
[01:56:45] but if it's not there we need to have an
[01:56:47] additional component
[01:56:48] that is being assembled active
[01:56:50] integration
[01:56:51] we're seeing of course edge coupling as
[01:56:54] well as flip chip approaches coming from
[01:56:56] the top
[01:56:57] we see different directions also
[01:56:59] multi-core fibers in the research
[01:57:01] or even multi-core fibers on the edge
[01:57:04] with like
[01:57:04] two rows on top of each other with fraud
[01:57:07] hover hhi
[01:57:08] doing like two layers of poly boards
[01:57:11] redirecting the signals
[01:57:12] we don't know yet how to like increase
[01:57:15] the shoreline
[01:57:16] um to the maximum extent and what is
[01:57:19] actually required
[01:57:20] but we are seeing that from a photonics
[01:57:22] perspective
[01:57:23] we're already getting in quite some
[01:57:25] requests targeting like 64
[01:57:27] to 128 channels so it means that there's
[01:57:30] a real demand for these very high
[01:57:32] channel counts
[01:57:32] that are not yet being like widely
[01:57:34] adopted in the data communications
[01:57:36] fields
[01:57:37] and for us in the end it's all about the
[01:57:39] automatability of the process steps
[01:57:41] and one of these examples is already the
[01:57:43] polishing
[01:57:44] from my background i've been seeing
[01:57:46] connector companies
[01:57:48] making millions of identical connectors
[01:57:50] all with manual labor
[01:57:51] and they still found it very hard in
[01:57:53] terms of process stability
[01:57:54] how to get a fully automated system
[01:57:56] around that and i think that's going to
[01:57:58] determine
[01:57:59] the the real existence and the value add
[01:58:02] during the scale up
[01:58:04] i think a nice example of this is like a
[01:58:06] um
[01:58:07] a component from a biological product
[01:58:10] that we have been assembling
[01:58:12] where over here there has been like a
[01:58:13] pixel and a photodiode array
[01:58:16] flip chip on top of a silicon nitride
[01:58:19] carrier so the light is coupled in and
[01:58:21] out using a grating
[01:58:22] coupler using the vixel is making sure
[01:58:25] you have a local source
[01:58:27] which is insensitive to back reflections
[01:58:29] when it comes to the
[01:58:30] the light source and you don't need to
[01:58:32] do any kind of fiber attaches
[01:58:34] and keep everything polarization stable
[01:58:36] on the chip so it's taking quite a lot
[01:58:38] of these boxes
[01:58:39] to really go for something which is low
[01:58:41] cost and that makes sense
[01:58:43] for this application also if you're
[01:58:45] looking to the customers
[01:58:46] like we started by doing the integration
[01:58:48] on a small printed circuit board
[01:58:50] where in the end it's just on a lead
[01:58:52] frame with an over molded compound
[01:58:54] but like getting this over molded
[01:58:56] compound and the lead frame there
[01:58:58] takes an investment of like half a
[01:58:59] million to a million
[01:59:01] before you have everything tool so you
[01:59:03] need to have like a road map
[01:59:04] from the prototypes how to get to like a
[01:59:06] volume part
[01:59:07] and to do the de-risking in between
[01:59:11] so if you're looking to the epic
[01:59:12] question where can we help you and where
[01:59:14] can you help us
[01:59:15] i think well where can you help us it's
[01:59:17] really in all these nice
[01:59:18] orange boxes where we can use your
[01:59:22] support
[01:59:26] there's a lot of beautiful orange boxes
[01:59:28] here it was conning skin
[01:59:30] coloring yes last year friday so that's
[01:59:32] fantastic
[01:59:33] congratulations on what you are
[01:59:34] achieving jeroen daos
[01:59:36] fix this is one success story of europe
[01:59:39] i love
[01:59:40] i love to have an osat and especially i
[01:59:42] love what you say in the beginning it is
[01:59:44] not only about
[01:59:44] account telecom we're working with the
[01:59:46] visible wave guides also with the
[01:59:48] visible wavelengths
[01:59:50] to address other markets such as medical
[01:59:52] for me one key question and there's a
[01:59:54] lot of questions in the chat as well but
[01:59:55] one quick question is
[01:59:57] what set of fourth part of the package
[01:59:58] is application
[02:00:00] independent and which one is application
[02:00:02] dependent and how you
[02:00:04] how do you address this not to have to
[02:00:06] reinvent the wheel for every customer
[02:00:08] so what you're seeing is that like a ref
[02:00:10] packaging is
[02:00:12] packaging or technology independent
[02:00:15] but you need to have trace lines which
[02:00:17] are matching very nice to get
[02:00:19] the right impedance at the right pitches
[02:00:21] so once we have like the right cross
[02:00:23] section of a
[02:00:24] trace line we can use it and reuse it in
[02:00:27] different pcb configurations
[02:00:29] but you can imagine that each time we
[02:00:31] need to layout a pcb
[02:00:32] it's costing like several hours of time
[02:00:35] to lay out the printed circuit board
[02:00:37] and you need to do a custom run at a pcb
[02:00:40] foundry
[02:00:41] um and for prototypes yeah that that's
[02:00:44] like the the high barrier so when you're
[02:00:45] in volume
[02:00:46] that's all fine but it's really for the
[02:00:48] prototyping we have a few questions for
[02:00:50] you the first one is coming from
[02:00:52] iphotec controvers what's on your mind
[02:00:57] console you are muted and i have a mac
[02:00:58] to celebrate such accomplishment
[02:01:03] but yes you are still muted so bottom
[02:01:06] left
[02:01:06] of the zoom window
[02:01:10] we really want to hear you a meeting on
[02:01:12] packaging is not a meeting until we
[02:01:14] don't have good territory
[02:01:15] loud and clear okay so what is your
[02:01:17] question what i can tell you
[02:01:19] what we are doing what i think about
[02:01:21] fiverr assembly
[02:01:22] or what's the question yeah your
[02:01:24] question you what you put in the in the
[02:01:26] chat about silicon micro packages
[02:01:28] yeah yeah that's a question uh
[02:01:33] you know we started the company we do
[02:01:34] these golden boxes which was sold to
[02:01:36] finisa
[02:01:37] approximately 20 years ago and since
[02:01:40] then
[02:01:40] we have never ever built any golden
[02:01:42] boxes anymore
[02:01:44] and so a lot of people are now using
[02:01:47] block encapsulation or they're using
[02:01:50] silicon micro packages
[02:01:52] and this was one of my questions is
[02:01:54] there still a market
[02:01:55] for gold boxes for example not only
[02:01:59] because of costs but also also because
[02:02:01] of size
[02:02:03] for example we have a medical customer
[02:02:04] they are doing implants
[02:02:06] and for sure they will never implant a
[02:02:09] gold box under your skin
[02:02:11] so they are using very small hermetic
[02:02:13] housings
[02:02:14] built in a mems trap which i'm not
[02:02:17] allowed to mention
[02:02:18] uh so what do you think about these
[02:02:20] let's say type of
[02:02:22] hermetic housings you don't i
[02:02:25] i think that's a great questions and
[02:02:28] that's also the discussion we are having
[02:02:29] with our customers
[02:02:31] since it the the package that you're
[02:02:33] choosing
[02:02:34] needs to line up with all the processes
[02:02:36] that you have so for example if you're
[02:02:38] looking to rgb combiners also the
[02:02:40] the gallium arsenide and the gallium
[02:02:42] nitride needs to be nicely protected but
[02:02:45] that can be done with a local means by a
[02:02:47] glob top
[02:02:48] or by like a local cap that you're
[02:02:49] soldering on top so you don't need to
[02:02:51] have the whole
[02:02:52] module to be hermetic with hermetic
[02:02:54] features but only very localized at the
[02:02:56] places where you have sensitive
[02:02:57] components
[02:02:59] exactly that's also as you mentioned
[02:03:01] redmi blue uh
[02:03:02] that's we we're doing for augment
[02:03:04] reality uh customers so they're using a
[02:03:07] very small size ceramic
[02:03:08] package so yeah long story short i think
[02:03:13] i think the industry is moving away from
[02:03:15] these these gold boxes
[02:03:17] and they are looking for much cheaper
[02:03:18] and much smaller
[02:03:20] let's say sub packages or however you
[02:03:23] would
[02:03:23] call it but the only more localized
[02:03:27] hematicity instead of having a golden
[02:03:30] box packaging the whole module
[02:03:33] a concert as a as a customized equipment
[02:03:36] supplier like iphotec is could you also
[02:03:38] add
[02:03:39] okay tell me tell me what is
[02:03:44] uh you know we're not building these
[02:03:46] machines
[02:03:47] so we are working together with the
[02:03:49] usual suspects some of them were already
[02:03:51] mentioned
[02:03:52] so we are let's say we are modifying
[02:03:54] these machines we are
[02:03:56] we just shipped the machine we are just
[02:03:58] now shipping the machine
[02:04:00] to asia which is capable of doing 300
[02:04:03] million bonds
[02:04:04] per year very high precision one micron
[02:04:06] fully automated
[02:04:08] but we are not we are not in the
[02:04:10] business of fico tech or
[02:04:12] fine tech or to give up so actually
[02:04:14] these
[02:04:15] companies are supplying their machines
[02:04:18] uh to us
[02:04:19] i visited you in portfolio and i saw
[02:04:20] that i saw their machines of some of
[02:04:23] your partners and how you customize them
[02:04:24] for different applications
[02:04:26] so my question is the same one i asked
[02:04:28] to jeroen you are making
[02:04:30] application dependent automated
[02:04:33] solutions
[02:04:34] uh what is in your opinion right now the
[02:04:37] part of the package that is
[02:04:39] application dependent for lidar for
[02:04:41] medical and which one is the application
[02:04:43] independent the one that we can continue
[02:04:45] repeating for all applications
[02:04:47] to be honest our customers if you're
[02:04:50] talking about standard standardization
[02:04:53] um i i don't see any path
[02:04:56] towards standardization yet not for our
[02:04:59] customers you know it's not my
[02:05:00] my opinion but our customers for example
[02:05:04] if you're thinking about
[02:05:05] solid state lidars uh augmented reality
[02:05:08] etc so these these customers they are
[02:05:11] doing their own designs
[02:05:12] and they will they will keep it as a
[02:05:14] secret so they will never
[02:05:16] at last at least for the time being they
[02:05:19] will not work together with other
[02:05:20] companies sharing their know how
[02:05:22] so for example uh you know flip chipping
[02:05:25] in soa or flip chicken
[02:05:27] flip tripping and dfb laser isolator
[02:05:30] non-isolator
[02:05:31] usually no lenses flip tripping them
[02:05:35] with an accuracy of 0.5 micron and
[02:05:37] that's what we are working
[02:05:39] on with several customers right now so
[02:05:42] it's really their proprietary design
[02:05:44] how the the wafer and the pedestals and
[02:05:47] metallizations will look like
[02:05:49] so we are helping these customers you
[02:05:51] know how in terms of a family
[02:05:54] the let's say fertilization stack should
[02:05:56] look like
[02:05:57] but they will really keep it as a secret
[02:06:00] and
[02:06:00] so we we have you know all these
[02:06:03] projects are covered by by ndas
[02:06:05] so maybe it's a little bit different
[02:06:07] from datacore because datacom is really
[02:06:10] high volume business
[02:06:11] facebook etc amazon they are driving
[02:06:14] standardization
[02:06:15] because they they want to bring the cost
[02:06:17] down you know that's the bottom line
[02:06:18] that's the only the only thing they are
[02:06:21] interested is
[02:06:22] it's costs on the other side augmented
[02:06:24] reality so let's say
[02:06:26] not so mature markets people
[02:06:29] are trying to do their propriety stuff
[02:06:31] and they will not care
[02:06:33] that's what i'm seeing for my customers
[02:06:36] from my knife point of view i think you
[02:06:38] gunther eugene
[02:06:39] and alexander from ibm bramant you are
[02:06:42] the only ones
[02:06:43] being able to enable to define what kind
[02:06:45] of the package is application dependent
[02:06:47] because
[02:06:48] as gunther says only you know only you
[02:06:51] know i'm not sure how you can use that
[02:06:52] because it's very highly nda protected
[02:06:54] right
[02:06:56] yeah definitely but uh what we're seeing
[02:06:58] is since also with like uh gunter was
[02:07:00] just dating with lidar
[02:07:02] we are working as well of course a lot
[02:07:04] with with lidar companies and everybody
[02:07:06] is secretive about what you have on the
[02:07:08] chip
[02:07:08] but things like alignment loops that you
[02:07:10] have on the chip itself
[02:07:12] allow us to make sure that we can do the
[02:07:14] packaging of the chip in an automated
[02:07:16] way
[02:07:16] and reading out the losses without
[02:07:18] knowing what's actually on the chip
[02:07:20] so there's some some way already to get
[02:07:22] like a highly protective
[02:07:25] secret area on the chip well we only
[02:07:28] need to focus on the assembly task and
[02:07:29] we can build with ficontech
[02:07:31] an automated machine that is capable of
[02:07:33] scaling up such process steps
[02:07:40] yes for sure i think that's a standard
[02:07:42] more or less so nobody
[02:07:44] is using this type of alignment
[02:07:48] people have they have their photo diets
[02:07:50] directly integrated on the chip or they
[02:07:52] have an
[02:07:53] optical loop that's pretty much we are
[02:07:55] standard
[02:07:56] i think i think the main difference here
[02:07:59] is maybe
[02:08:00] comparing fix with ipotek i think fixes
[02:08:03] very much focus on how to bring
[02:08:06] light into and out of the chip so they
[02:08:09] are more on the
[02:08:10] let's say fiber assembly side
[02:08:13] we are more on the on the die placement
[02:08:16] side so
[02:08:17] fiber assemblies we are only doing small
[02:08:19] scale i don't know 100 samples 500
[02:08:21] samples per year
[02:08:23] we are more focused on how to
[02:08:26] flip trip soas directly
[02:08:30] in between wave guides on a wafer level
[02:08:32] for example
[02:08:33] 6 8 right now 12 inch levels or very
[02:08:37] high
[02:08:37] volume very full automated processes
[02:08:41] so i cannot comment as much on the on
[02:08:44] the fiber
[02:08:44] attach i think here it's much more
[02:08:47] experienced and how to do these type of
[02:08:49] assemblies
[02:08:51] michael levy call me naive here but when
[02:08:53] i see this discussion between jerome
[02:08:55] dao's concert
[02:08:56] i do believe that there is a need to
[02:08:58] align all this industry and have an
[02:09:00] assembly design
[02:09:02] kit but they are telling that their
[02:09:04] customers will not
[02:09:06] like that kind of guidebook you have
[02:09:08] been working
[02:09:09] on this with the roadmaps how do you
[02:09:11] think we can address this chicken
[02:09:12] egg question it's a great chicken and
[02:09:15] egg and it's not a
[02:09:16] easy issue to resolve and
[02:09:19] frankly the photonics business whether
[02:09:21] it's devices or packaging or even system
[02:09:24] design has been
[02:09:26] pretty custom and and really fights
[02:09:28] standardization all the way
[02:09:30] and so yeah what what has been said
[02:09:32] today is true
[02:09:34] uh standardization adks are going to be
[02:09:37] difficult
[02:09:38] because everybody has their proprietary
[02:09:40] solution but within that
[02:09:42] there are some common themes that need
[02:09:44] to be addressed
[02:09:45] whether it's you know things that are
[02:09:48] front and center from our standpoint is
[02:09:51] low-cost hermeticity
[02:09:53] i mean traditionally hermeticity was in
[02:09:55] gold boxes right so
[02:09:56] but can you get hermeticity in a
[02:09:58] low-cost scenario
[02:10:00] using you know semiconductors dielectric
[02:10:03] materials so that
[02:10:04] you know the devices can can withstand
[02:10:07] all sorts of situations
[02:10:09] i think these types of things are going
[02:10:11] to come to the front
[02:10:13] and i think we will see some adk
[02:10:16] movement
[02:10:16] just like peter indicated earlier but i
[02:10:19] also have to accept you know when you
[02:10:21] start looking at arvr
[02:10:23] automotive lidar some of these medical
[02:10:25] applications folks really want to
[02:10:27] protect
[02:10:28] their proprietary packaging but i think
[02:10:30] within that we're going to get get some
[02:10:32] common themes you know level one level
[02:10:34] zero
[02:10:36] in packaging um speak if you like
[02:10:39] and some of those techniques whether
[02:10:41] it's fiber alignment or flip chip bump
[02:10:43] in
[02:10:43] are going to be common and we can
[02:10:44] actually do think about
[02:10:46] adks and i think they will be more
[02:10:48] popular as we move forward but it's
[02:10:50] going to be a fight there's no question
[02:10:51] about it
[02:10:52] no i i love watching those the final
[02:10:55] question of the meeting
[02:10:56] the final question with the meeting goes
[02:10:58] to francois miner from hypox the company
[02:11:00] developing silicon night
[02:11:01] and mems together francois what's on
[02:11:03] your mind
[02:11:05] well the question was to jaron because
[02:11:07] he was bold enough to
[02:11:08] speak of isolators which is uh the
[02:11:12] the great untold story about integrated
[02:11:14] optics
[02:11:15] and and and the need to collimate light
[02:11:18] and free space in order to get through
[02:11:20] an optical isolator
[02:11:22] um uh and uh i was curious to see
[02:11:26] how you saw this uh uh taking place
[02:11:29] in in in an airy type form
[02:11:32] or at least uh you you touched on it
[02:11:35] very quickly so i was kind of curious to
[02:11:37] see what's your position on optical
[02:11:38] isolators
[02:11:41] at this point in time we're just like a
[02:11:43] consumer of optical isolators as well as
[02:11:45] micro optical isolators but these are
[02:11:47] just like
[02:11:48] single channel devices we're now
[02:11:51] investigating whether we should be
[02:11:53] making
[02:11:53] like our own isolator similarly as we're
[02:11:56] doing with the fiber arrays
[02:11:58] that is really as a building block that
[02:12:00] everybody can just use it
[02:12:02] taking like a fiber attached already to
[02:12:04] an isolator
[02:12:05] and then you can connect it directly to
[02:12:07] a pic or we can connect it for you
[02:12:10] i i do believe that that's one of the
[02:12:12] huge amount needs right now to
[02:12:14] standardize the isolator especially for
[02:12:15] the amazing work that you're doing fix
[02:12:17] on the hybrid laser assembly was a topic
[02:12:19] for another discussion because today was
[02:12:21] truly fantastic
[02:12:22] first with all the discussions i put
[02:12:24] together this slide
[02:12:25] for me there are four demands here and
[02:12:27] one we really had to have an assembly
[02:12:28] design kit for the osats to be able to
[02:12:31] offer the technology all in line
[02:12:32] and agree with consider it's going to be
[02:12:34] a hard task but we love those
[02:12:36] the second demand is on the rf
[02:12:37] connectors we've seen the modulators are
[02:12:39] getting faster and faster
[02:12:40] like when logic ignored it already has
[02:12:42] 70 gigahertz plus modulators
[02:12:44] we need to have novel rf connectivity
[02:12:46] for that
[02:12:47] they said the third one is test before
[02:12:49] invest packaging for many different
[02:12:51] applications that we are targeting
[02:12:52] indeed
[02:12:53] we are talking about 3d sensing we are
[02:12:54] talking about medical devices
[02:12:56] all these new end users need to find a
[02:12:58] way to test before investing a standard
[02:13:00] package
[02:13:00] application dependent is a huge amount
[02:13:03] need and the fourth one
[02:13:04] micro optics are coming here to reduce
[02:13:07] cost effectivity for the fiber array
[02:13:10] assembly i do believe this is a huge
[02:13:12] market for all of us it's been two hours
[02:13:14] actually two hours and
[02:13:16] 13 minutes so let me apologize for those
[02:13:18] 13 minutes i think it's been
[02:13:19] a really great meeting what i want from
[02:13:22] you now is to make sure
[02:13:23] that you connect with each other there
[02:13:25] has been here a lot of discussion
[02:13:27] a lot of things can be shared other
[02:13:28] things cannot be shared but everybody
[02:13:30] here is looking for
[02:13:32] partners potential partners so please
[02:13:34] make sure that you get introduced to any
[02:13:36] of the participants you
[02:13:37] think you can explore some business with
[02:13:39] today was the third meeting of the
[02:13:40] series four
[02:13:41] i would like to remind you that
[02:13:42] beginning of june we have a pixel
[02:13:44] packaging meeting and that's always
[02:13:46] the gold star of our meeting so please
[02:13:48] make sure for those of you active in
[02:13:50] packaging pixels
[02:13:51] that you register as soon as possible
[02:13:53] and you tell anna you want to give a
[02:13:54] presentation because i think she's going
[02:13:56] to have a headache selecting the
[02:13:57] speakers for that
[02:13:58] until the next time my name is jose i'm
[02:14:00] really happy for
[02:14:01] all these meetings and on behalf of epic
[02:14:03] take care no first of all
[02:14:05] wash your hands wear a mask and get
[02:14:07] vaccinated as soon as possible because i
[02:14:09] can't wait to start traveling again
[02:14:10] see you soon bye