# BORROWED FROM SEMICONDUCTORS, BUILT FOR PHOTONICS: THE PACKAGING MOVE AI CONNECTIVITY NEEDS

https://www.youtube.com/watch?v=8F1WZ-elTDk

[00:00] And Matt, that attention of everyone is yours.
[00:02] Cool. Thank you very much. Uh, thank you everyone for attending.
[00:06] So, yes, I am essentially the packaging person at Lumenum.
[00:11] Um, I've been there for about a year and priorities to that I was at Intel for 21 years or so all in packaging.
[00:16] Uh, my career spanned uh simple flip chip client packaging certifying solutions for the client um product.
[00:25] Uh, among those I supported the first uh dual die MCP in the client space.
[00:31] Um so the very early beginnings of heterogeneous integration I I had a hand in.
[00:33] Um and then I also developed advanced packaging flows uh working on our fauos flows ODI uh and my career wrapped up actually with um I was thrilled yesterday when uh uh Nick presented and I saw some of my work on the glass cord substrates.
[00:47] Um my meteor proof of concept which was the first client product packaged on a glass core substrate was uh one of the small pictures in his presentation.
[00:55] So um I have lived and breathed advanced packaging.
[00:58] So yesterday uh when the
[01:02] repeated theme came up that advanced packaging was necessary, I was like this is fantastic.
[01:05] This is some job security um to to take me through the end of the career.
[01:10] Um so today I'm actually speaking to the heart of the session.
[01:12] Um it's specifically about how I applied some advanced packaging techniques um to use that to put 35 devices together with with uh CMOS die and deliver a uh a compact optic engine.
[01:30] So I I wanted to start really with how we got to uh uh what I'll show you here in another slide or two, but it was really beyond our core laser business.
[01:40] The question was how can Lmentum provide a solution for the demands of a AI scaleup?
[01:46] Um I was at ECTC last week.
[01:49] I believe it was a prerequisite to have a presentation to talk about the demands of AI scale up and how it's requiring co-packaged optics.
[01:55] I think I saw the same slide 22 times uh last week.
[01:57] So I'm going to uh skip all that.
[02:03] Covered.
[02:03] Ad nauseam, this we all know it.
[02:06] Co-packaged optics is necessary and coming.
[02:11] Um, so beyond silicon photonics, we believe that our Vixel technology is well positioned to provide an alternate source, um, for scale-up applications.
[02:20] So Vixels, uh, were demonstrated for 3D sensing.
[02:23] So if you have an iPhone, you have pixels.
[02:26] Um, the face recognition is you get a bunch of lasers shot at your face every single time you look at your phone.
[02:33] Uh, I was not thrilled when I learned that of course, but hey, that's the world we live in.
[02:39] Um, Vixels themselves, you know, there's billions of devices out there, so it's got an established high-volume manufacturing ecosystem.
[02:49] Um, it's compatible for short, short range, uh, links.
[02:52] Um, so this isn't something for scale across.
[02:53] It's not going to go across town.
[02:55] Um, but for within rack and rack-to-rack, Vixels should be more than a perfect solution.
[03:00] Um, another benefit, it's capable of high bandwidth at low
[03:05] High bandwidth, I mean high, we're talking 50 64 gigabytes um per second.
[03:11] So, it's the um wide and slow solution as opposed to fast and narrow um which we heard about uh yesterday.
[03:19] And then also the thing is it provides an alternative to silk ponics.
[03:21] Um it can add diversity to our what we're offering, but it also can provide diversity to customers.
[03:28] uh you often don't want to be sling the sourced on a technology or just have one solution.
[03:34] There is so much demand today that no one solution uh is can satisfy everything.
[03:39] It's just not possible.
[03:41] So alternate ways of solving this currently current problem uh need to be uh looked at and we believe that uh vixels um provide one of those.
[03:49] But the question came up with is how to package these vixels in a manner that's compatible with these systems.
[03:54] Um, and this was actually uh this is the very first thing that I worked on when I started at Lmentum.
[04:00] Um, the work was actually in flight when I got there and um I will uh
[04:06] be very uh gracious to my co-workers,
[04:08] but it was very clear they were not packaging um engineers because there are some very creative solutions on those PowerPoint slides that were in fact not manufacturable.
[04:15] Um they were just simply not compatible with no sat flow and there were also technologies that did not exist.
[04:23] Um, so really what I came in to do was figure out how to do this with something that fits into um, a standard packaging flow.
[04:30] And for that I suggested the process of a fan out wafer level package.
[04:36] Um, so if you're not familiar with fan out wafer level package, if you have a phone, you have at least a dozen of them on you at all times.
[04:44] Um, it's a very standard uh, high volume very demonstrated technology.
[04:49] Um it was initially created to take a very tight pitch die or device and fan essentially fan it out to go to a wider pitch to be easier for surface mount.
[04:59] Uh that's the core of the uh technology.
[05:03] However, it also can be applied to stitch multiple dies together um and bring them together
[05:07] and do heterogeneous integration.
[05:10] So in my package here um I have it broken up uh vertically but my very top layer is a combination of uh vixels photo dodes uh a TIA and a driver.
[05:20] Now for my prototype which is what's illustrated here um the TIA and driver are commercially available.
[05:26] So they are driving a limited number of channels.
[05:28] Um realistically if I was if um they had given me a lot more money for this project um I would have had a custom ASIC and I would have multiple drivers and TIS throughout the chip and then I'd be able to drive all the channels.
[05:41] But for the prototype um we're using commercially available um drivers.
[05:46] Those are the two bookends.
[05:48] And then in between that we have alternating row of vixel chips and photo diode chips.
[05:51] Um so you got your transmit and your receive.
[05:55] Um, and then that is all encased in a uh mold material.
[05:59] Um, just basically provides some uh mechanical stability to that top layer.
[06:03] And then below that I have two layers of RDL.
[06:05] Um, medium
[06:08] design rules.
[06:10] I mean we're not talking super dense routing.
[06:11] I think it was 1010 line spacing.
[06:14] Um, and then below that I have a standard BGA second level interconnect.
[06:17] Um, this was point4 millimeter pitch.
[06:19] Um, so here we were looking for an application to go to a PCB or a substrate.
[06:24] Um, however, there's no reason why I couldn't spin this package and come up with something that's compatible to go on a die stack and shrink that pitch down to 100 microns or even a little bit smaller.
[06:34] I don't want to go too much smaller, but I could put this die on a die stack or on an interposer and give you a true co-ackage solution.
[06:45] What was really great about what we did is um this process flow was 100% within the our OSAT's design rules.
[06:55] We invented nothing.
[06:58] Um we made our design compliant to the design rules because I wanted to be sure that we could manufacture it as easy as possible.
[07:04] we had enough risk um downstream with regards to test and uh
[07:08] And fiber integration and board validation that I didn't want to complicate the assembly flow.
[07:15] So everything was straight by the books.
[07:18] Um, we used uh liac was our OSAT in Korea.
[07:22] Um, they provide us some great prototyping um opportunities, but this is straight up the wafer level processing flow that we used.
[07:30] Um, first we took the all of our individual dieses and we did wafer reconstitution.
[07:35] Um, our vixels and photo dodes, they have backside lenses.
[07:37] Um, so obviously I have to protect those and keep those clean.
[07:41] Um, but the benefit of a fan out wafer level package is that I'm doing a die uh backside down approach first.
[07:49] So I'm reconstituting the die with the pillars facing up.
[07:51] Um, so we place all the die where they need to be um in the final device.
[07:57] Um, we have placement accuracy of ballpark.
[07:59] The real data was about three microns.
[08:02] Um, relative to true to position.
[08:04] Um, not ideal.
[08:07] I I would prefer a micron or two shaved off of
[08:09] that.
[08:12] Um, the the tolerance stack was the nightmare here.
[08:16] Um, but uh, you know, we we managed to to sneak by.
[08:19] Um, mainly due to their them patting their specs a little bit, which I always appreciate, and I'm also familiar with that game um, having played it myself.
[08:26] Um, following that wafer reconstitution, we go ahead and overmold the entire thing.
[08:31] So, this is actually a picture through the carrier wafer.
[08:34] Um, if you were just to look at the the same same view as the the wafer recon picture, you basically just see a black circle.
[08:41] Um, so I fully envelop um all of these chips in an over material.
[08:43] And then what we do is we go ahead and do a back grind and we reveal the copper pillars from the back of the devices.
[08:52] Um and that is uh the third picture that the pillar reveals.
[08:55] So basically that's all the copper pillars on the dieback side coming through the mold material.
[08:59] Um from that we go through our RDL process uh two layers of lithography where we draw the uh the tracing the the routing
[09:10] and the VAS.
[09:15] Um again standard medium density design rules.
[09:17] It's actually one of the benefits of advanced packaging is the fact that you're not using the course design rules that go with substrates or PCB.
[09:22] Um, you're not quite at the density of of front-end fab, but I'm glad about that because front-end fab's a nightmare.
[09:29] Um, I specifically stayed in packaging on purpose.
[09:31] Um, I did not want to live the fab life.
[09:33] Um, following that, uh, we went and did the UBM.
[09:39] Uh, we did use a bit of a strange process flow here, um, at our OSAT.
[09:44] Um, normally I would just go ahead and do a wafer level ball attach or a wafer level uh bump plating.
[09:48] Um, however, we singulated next.
[09:50] Um, so then we basically ended up with our individual packages and then we did a sing a unit level but BGA attach.
[09:56] Um, and that again I've provided feedback that if they really wanted to uh to impress us, they would go ahead and get some wafer level um tools to do the uh to do the bumping
[10:11] at the wafer level because that would be uh we we certainly would have avoided some of our yield challenges.
[10:17] Um despite the fact that we were um compliant with their design rules, this was not an easy package to develop.
[10:25] Um largely due to the uh the aspect ratio that we used.
[10:28] This is the long skinny uh matchbook essentially.
[10:31] Um and that was not ideal for package warpage.
[10:37] So uh I was very thrilled.
[10:39] Um we we did race against the deadline here.
[10:41] Um we made we debuted this package at OFC this past year.
[10:44] Um and what this package is capable of it's um actually it's 12.8 uh t capable if all the devices were were going 6.4 4 up 6.4 down.
[10:56] Um there would be 80 active channels running at 50 gigabytes per second.
[11:04] Um and um this is really the the slow and wide uh this prototype.
[11:08] So I mean the picture on the quarter um demonstrates
[11:12] it well, but it's 17 1.5 x 5.6 mm.
[11:17] Um I actually I asked Chat GPT what was a reference point for these dimensions.
[11:20] It said a tic tac.
[11:22] You know what?
[11:24] I was at the store and I looked at Tic Tacs and it's a pretty big Tic Tac.
[11:26] Um, but it's still very very small.
[11:29] Um, I was going to bring the part with me, but I realized that no one would be able to see it while I if I if I held it up here, it would just be like I could hold up anything and I tell you it's the the chip.
[11:40] Um, so uh what's also very good about this, the bandwidth density is uh fantastic.
[11:45] Um, at greater than 1.5 terabs per second per millimeter.
[11:47] Um, we actually designed this specifically to hit a a very high shoreline density.
[11:53] Um, because if you had your um, you know, if you had your re your retical size die and had essentially four of these on each side, you would be able to put out a tremendous amount of data um, going through this.
[12:09] And then also, right, one of the great opportunities with um,
[12:14] Vixels is the low power consumption.
[12:18] Um this part even with the commercial driver and the commercial TIA was under two and a half uh pigles per bit.
[12:23] Um so we actually have a a low power solution that's capable of delivering um high bandwidth.
[12:31] So I'm already at my summary slide.
[12:35] You can tell that I was paranoid after my Optica webinar went over by about twice.
[12:38] Um that I was going to talk for uh entirely too long about this cuz uh uh if you've had the opportunity to talk to me about any packaging proc project in the past, I I literally can go on for um hours about it.
[12:53] Um so I was very uh cognizant of my time limit here.
[12:55] But essentially right, we all know that we need to make the transition to um optics to to meet the demand um coming from AI and HPC connectivity.
[13:09] Um and the thing is that this is a bit of the wild west where the solution isn't defined yet.
[13:11] Um
[13:14] And there's lots of technologies at play.
[13:16] Um be that vixels, silicon photonics, microLEDDs, uh TLFN as a modul.
[13:24] I mean, there's literally dozens of options out there and no one has settled on on the answer.
[13:28] And the benefit is is that the demand's so high is that there doesn't have to be one answer.
[13:34] Um there's lots of room in the marketplace for for different solutions and they're all different solutions for slightly different problems.
[13:42] But across the board, um, what's important is there are technologies out there that were developed for traditional semiconductors that work very well, um, that are extremely high yielding, that are efficient, that are cost- effective.
[13:55] And leveraging those technologies to optics, um, really provides an opportunity to really win and span both electrical and optical interconnect.
[14:08] um and and really provide solutions that work very well and um
[14:15] avoid a lot of the growing pains that that semiconductors have.
[14:21] Um you know, I did some of the early work on the fauxarose process um and figuring out how to stack a die on a wafer um and do TSV reveal.
[14:30] It was it was it was tough.
[14:32] It was a big it was a big challenge.
[14:34] So, we don't need to reinvent the wheel here.
[14:35] um we can design our our optics solutions for something that's compatible with a process flow that already exists and save ourselves um half of the um half of the challenges.
[14:46] and in fact that's what our vixelbased fan wafer level package does.
[14:48] Again, I straight up took a process flow uh from semiconductor and applied it to 35 devices um and uh simply dropped those in and I you know developed a compact optic engine.
[15:03] And then again I do think that this device also provides a you know this is a very real alternative to silicon phatonics.
[15:11] Um and it also is an alternative solution to an externally
[15:16] driven laser solution.
[15:19] Um the laser's right there in the package um in a nice compact form factor with it's capable of high bandwidth and low power.
[15:26] Um so yeah that's really what I want to talk about today.
[15:27] This was you know uh I I've been sitting on this for for quite a while and OFC was not a packaging conference.
[15:34] So I did not you know the the packaging was was second to the the performance of the device.
[15:39] So um I was thrilled to go into the uh guts of this thing a little bit.
[15:43] I was very proud of this package.
[15:44] Um, it was a it was a great first accomplishment at Lumenum.
[15:49] Um, and I'm really looking forward to uh maybe next year being able to talk about the next uh the next accomplishment I have up my sleeve.
[15:54] Um, sadly it doesn't exist yet, but I'll I'll get there.
[15:59] You definitely will. Thank you. Congratulations.
[16:04] So, Mac, from your like last statement, I see that you mentioned that this package is an alternative for the externally driven laser solutions.
[16:12] So you don't exclude them either for the future being or for whatever what do you
[16:17] think is the border or where the application when the full integration will be needed and where we can still and where are the uh applications where we still rely on the external laser sources.
[16:27] Well I do I mean obvious well obviously I'm not going to undercut our laser business because uh I I have a lot of stock options riding on that business continuing to be successful.
[16:37] Um so obviously there is very much a home for externally driven uh solutions.
[16:43] Um I think a lot of it it depends on the exact problem statement you're trying to do.
[16:47] Um the application will drive what the solutions work.
[16:50] Um vixels as an example they they will not work across kilometers.
[16:56] Um it's simply they don't have the reach.
[16:58] Um so I would never you know I would never try to sell someone a vixel solution for for scale across.
[17:06] Um but within rack I mean and if you specifically wanted a um a lower cost lower power lower reach solution vixels vixels are a great alternative to you.
[17:18] Um and if you're using a package um fan out wafer level packaging it's you know it is it has its place.
[17:23] It's relatively inexpensive.
[17:26] It's relatively fast to turn around.
[17:28] Um you know so if you're looking for a lower cost way to develop an optic engine something like this may be perfect.
[17:34] Um if you're looking for highest um performance uh lowest reach maybe lowest noise then yeah an externally driven laser solution is going to be for you.
[17:44] So it's really about understanding what your problem statement is and then getting the solution that solves your problem and meets as many of your boundary conditions as possible.
[17:52] It's a bit of the Goldilocks problem, right?
[17:54] is you have a bunch of boundary conditions that you're trying to meet.
[17:58] It's very unlikely that anyone's solution will hit all of your buttons.
[18:02] So, it's what solution can answer most of them and provide you the best overall solution while letting you make some compromises that you believe are are acceptable.
[18:13] Thank you so much.
[18:13] We have a comment from question from the tutori.
[18:16] Yeah.
[18:16] So, um yeah, nice talk. Thank you
[18:18] Very much, Matt.
[18:21] Um, I have a question about the, um, uh, specification for, um, Shortridge, um, multimote link.
[18:25] So what, what are the requirements of, uh, pixels in terms of, um, spectrum out of the power continuous wave or?
[18:37] I knew this was going to happen.
[18:38] So I will first, let me give a very strong caveat.
[18:40] I am through and through a packaging guy.
[18:42] Um, when I, I was very fortunately, when I started, when I started at Lmentum, I was very fortunate to be ignorant of what I did not know.
[18:48] Um, because otherwise I would have been very much more terrified my first week of work.
[18:51] Um, so yeah, I mean the, the main thing, um, that I can, you know, the part that I can, can answer well for you, um, it was really the power.
[19:02] We wanted to be specifically able to get, um, through, uh, 20 meters of fiber was really the, the key thing was making sure that we had the power to go through all the way, um, through that fiber to reach that within, you know, rackto-rack, um, distance.
[19:19] but the details of the laser power and yeah that's all magic to me at this point still.
[19:24] okay then I have a different question so you mentioned cost effective cost effective packaging so I I worked in um um surface semiconductor lasers um during my PhD time.
[19:35] So I'm I'm the fan of Vixos of course it's it's very appealing for for um effective packaging.
[19:43] Um so what about the optics micro optics?
[19:45] What kind of optics are you used?
[19:47] How do you pack them?
[19:49] Oh so the uh so we have a micro optics array on our PD fibers.
[19:55] Um the Vixel fibers they there's no optics necessary.
[19:57] There's backside lenses there.
[19:58] So we are sending out a columnated beam out of the back of the out of the vixel.
[20:03] Um but there were no optics necessary on on the vixel fibers.
[20:07] Um we considered it right.
[20:10] We we did do the analysis to see if that we'd get better coupling with um optics on on the fiber those but we found that we we had acceptable coupling without but we do have them on the back of the PD fibers.
[20:20] Um so it's all micro lens arrays on the
[20:21] on the back of the fiber arrays that
[20:23] we're using.
[20:24] >> So what is the coupling loss you're
[20:26] talking about here?
[20:27] per laser or
[20:29] >> uh well we were a little bit rough on
[20:31] the first generation. Um we we we've got
[20:33] a second rev going through the factory
[20:36] now. Uh we were under 2dB
[20:39] >> uh of loss with our coupling. So not
[20:41] great but not bad for our first
[20:43] generation device.
[20:44] >> Yeah. Okay. Great. Thank you.
[20:45] >> Thank you. Comment from Lyon. Question.
[20:47] >> Yeah. Actually covered what I wanted to
[20:49] ask. So about the alignment but uh so
[20:52] you answered that. I mean that was
[20:53] actually that that was by far the
[20:55] hardest part of of this device. Um we
[20:58] had looked at um we had looked our
[21:02] original goal was to have this passively
[21:03] aligned um to to enable that and we
[21:06] looked at a couple of um including a
[21:10] keying feature essentially in the fan
[21:11] out package. Um with the time we had we
[21:14] weren't able to locate um a a we weren't
[21:17] able to source something that was
[21:18] precise enough um to give us the key we
[21:20] wanted. So we did we were doing active
[21:22] alignment um of the fibers post
[21:25] assembly. Um that would be that you know
[21:28] I I will say that was probably one of
[21:30] the things that that kept me up the
[21:32] greatest was just um how I was going to
[21:35] align the fiber and how I was going to
[21:37] have something um keep the tolerances
[21:39] tight enough. Um so that way then you
[21:41] know I can you know with the fan out
[21:43] package okay maybe I can align you know
[21:46] channel one on die one but will channel
[21:48] 16 on die 16 still be aligned um that's
[21:52] been a bit of a nightmare our tolerance
[21:53] stack fortunately worked out um but uh I
[21:58] will say this did highlight one of the
[22:01] challenges of using a smaller um OSAT
[22:04] with perhaps last generation technology
[22:06] because I came in I I was at Intel and I
[22:09] was like oh Well, I can get one and a
[22:10] half microns of placement accuracy.
[22:12] Yeah, I I apparently can't get that
[22:14] everywhere.
[22:16] Um, so that was that was a bit humbling,
[22:19] but also again uh provided that feedback
[22:21] to them and and uh I told them how to
[22:24] change their process to to get better
[22:25] accuracy which will help the next
[22:27] generation device.
[22:29] >> And one more thing uh which wavelength
[22:31] do you use?
[22:31] >> Oh, this is 1080.
[22:34] >> Thank you Matt. There were three
[22:35] previous speakers commented that they
[22:37] are suffering from the lack of
[22:38] standards. are you affected?
[22:42] >> Yes, it would be nice. It would simplify
[22:45] things. Um, however, I I'm sort of
[22:48] approaching things whereas the standards
[22:50] will fall out pretty quickly. Um, right
[22:52] now there's so many different
[22:53] alternative technologies and solutions
[22:55] out there that it would be
[22:58] it would be a wasted effort to divine
[23:00] standards around everything at this
[23:02] point because there are going to be I'd
[23:03] say in the next uh year to 18 months a
[23:06] couple of very clear winners or losers.
[23:08] Well, losers is the wrong word, but
[23:09] there'll very clearly be winners uh as
[23:11] far as technology go. So, I I'm sort of
[23:14] more taking the wait and see approach,
[23:17] see what solutions rise to the top and
[23:19] then have the standards defined around
[23:20] those. Um so, that way then, you know,
[23:23] defining standards is not trivial. Um
[23:25] and it's a lot easier to define
[23:26] standards around two or three solutions
[23:28] as opposed to the halfozen that are
[23:30] floating out there today. Um so, yeah, I
[23:33] mean standards they're they're
[23:34] essential. um they are essential for our
[23:37] our tool suppliers um so that way they
[23:39] need to know what what specs they need
[23:40] to hit but it's something that will come
[23:42] with a little bit of maturity in the
[23:44] industry it's a it's a little bit early
[23:45] for those
[23:46] >> thank you thank you for coming all right
[23:48] with this let's thank the speaker
[23:51] >> thank you
[23:53] and we're having 45 minutes coffee break
[23:56] to continue the networking