# 74th ECTC 2024 Keynote

https://www.youtube.com/watch?v=gheyjvG-8No

[00:03] Good morning, please take your seats.
[00:06] Good morning.
[00:09] Everyone, my name is Carin Spock.
[00:12] On behalf of the ECTC executive committee, I'm serving as the general chair of ECTC this year.
[00:17] A warm welcome to the opening of the 74th ECTC, the flagship conference of the IEEE Electronic Packaging Society.
[00:28] Today marks the culmination of months of hard work and collaboration.
[00:33] We gather here today to express our sincere gratitude to all those who have made this event possible.
[00:39] First and foremost, I would like to extend a heartfelt thank you to our sponsors whose generous support has been instrumental in bringing this conference to fruition.
[00:51] Your commitment to our shared vision and your investment in our community has allowed us to create an enriching experience for all of us.
[01:04] Special appreciation goes to our exhibitors who showcase cutting edge technologies just around the corner.
[01:08] Yeah, please go there to see innovative products, groundbreaking solutions.
[01:17] Your presence, dear exhibitors, adds tremendous value to this conference, creating opportunities for engagement, networking, and collaboration.
[01:28] I want to express, express my deepest gratitude to our esteemed speakers and panelists who have traveled far and wide to share their expertise and insights.
[01:41] Your wells of knowledge, research, and experience will undoubtedly inspire and enlighten us all, setting the stage for meaningful discussions and profound learning.
[01:51] To the technical program committees volunteering here, more than 230, your tireless efforts in reviewing papers, organizing sessions, and ensuring
[02:04] The highest quality of content have been instrumental in creating an outstanding program for our attendees today and in the next days.
[02:13] And of course a warm thank you to each and every attendee.
[02:17] Thank you for being here.
[02:20] Thank you for supporting ectc.
[02:22] We are really grateful to you to keep our community alive.
[02:25] So your enthusiasm, engagement, and diverse perspectives will shape the conversations and interactions that take place over the next few days.
[02:33] You are actually the lifeblood of this conference.
[02:38] Thank you so much for being here.
[02:40] Last but not least, a call thank you to Lisa Reny and her conference organization and management team.
[02:48] They were shaping this conference for your best experience and convenience in so many aspects.
[02:54] So please enjoy the remarkable conference program now ahead.
[02:57] Some logistical items I would like to mention.
[03:00] Everyone, please be sure to
[03:06] install and use the W app ectc W app the.
[03:10] entire program will be up to date.
[03:12] information is in this app and it has a very nice messaging platform for networking.
[03:16] also we are conducting paper scoring for a number of awards through the app.
[03:21] so finally this is also important.
[03:24] after the keynote we will have the Q&A with our keynote speaker and we are collecting questions through the app.
[03:32] so please give it a try now without further Ado.
[03:36] it is my great honor to introduce our keynote speaker Professor Karen bman to you.
[03:41] Karen bman is the Charles bacheler professor of electrical engineering at Colombia University where she also serves as the faculty director of the Colombia Nano initiative.
[03:56] Karen burkman received the Bachelor of Science from Bucknell University in 1988 and the master of science in 1991 and her PhD in 1994 from MIT all in.
[04:09] electrical engineering at Colombia.
[04:13] She leads the LightWave research laboratory and encompassing multiple cross-disciplinary programs at the intersection of computing and photonics.
[04:23] Since 2023, Karen Burkman is the director of the center for ubiquitous connectivity (Cubic), a 5-year multi-university centered funded project by DARPA and the Semiconductor Research Corporation (SRC).
[04:39] Under the Joint University Microelectronics Program 2.0 (JUMP 2.0), Karen Burkman serves on the Leadership Council of the American Institute of Manufacturing (AIM) Photonics, leading projects that support the institute's Silicon Photonics manufacturing capabilities and Datacom applications.
[04:59] She is the recipient of the IEEE Photonics Engineering Award and is a fellow of Optica and IEEE.
[05:08] Karen Burkman's insights and expertise will undoubtedly
[05:11] set the tone for an exceptional conference filled with inspiration and Discovery.
[05:16] so ladies and Gentlemen please join me in warmly welcome our keynote speaker Professor Ken bman please.
[05:31] thank you.
[05:35] thank you so much uh good morning everyone and uh just a really warm thank you to uh Carl Hines and the committee of ectc.
[05:45] it's a real honor uh to be here today.
[05:49] I will talk about fonics and the application of the emerging field of silicon fonics uh specifically to to large scale Computing systems and the new generation of AI Computing.
[06:06] as many of you are I'm sure aware AI applications are
[06:13] dominating the Computing world uh in data centers today.
[06:17] the growth in these applications is unprecedented.
[06:23] six orders of magnitude in just the last six years.
[06:26] have you ever seen anything that grows by an order of magnitude per year?
[06:31] it's it's beyond our imagination for technology to grow so quickly.
[06:38] and it does not seem to be abating or slowing down in any way.
[06:40] today's systems are over can have parameters application sizes model sizes that are over 10 trillion parameters.
[06:55] and clearly exceed the memory capacity that's possible within a single compute socket.
[06:58] so how do we scale these very quickly growing computation applications at the same time it's very
[07:13] important to also note that there is a tremendous growth in the energy consumption associated with these uh applications.
[07:24] as you run these huge training models for example the amount of time that it takes to complete uh the training on a very very large data center actually consumes a tremendous amount of uh power energy and you can see here uh and I just want to point out that this is on a log scale.
[07:48] you can see here the energy consumption in megawatt hours versus the parameters that are being used in these large large models as as an example you see GP T4 you know all the way up there at the top right corner.
[08:02] so just to put this in a little bit of a frame of reference I drew a line This is the average power delivered to the entire city of New York in one
[08:14] hour 5500 megawatts during the summer when it gets very hot in New York City it can jump you know we've had power outages that's 32,000 approximately 32,000 Mega hours uh megawatts delivered in an hour so just to put that in perspective we're facing a significant energy energy is not something that scales very well as we all know and this has hit the front page news as I imagine many of you have already seen the global energy consumption of AI is beginning to really have have an impact uh data centers operating around around the world are actually impacting the power grid energy grid so how do we address this because we're not going to slow down these AI systems they're just
[09:16] as I showed you they're just growing so incredibly fast.
[09:21] we need to figure out a way and I will talk about photonics as really a mechanism for continuing to enable the performance scaling of AI but at the same time bending the energy curve.
[09:38] so the goal here is to continue to scale performance Maybe by another one or two orders of magnitude and hopefully more but we need to flatten or at least bend the energy consumption curve so it doesn't continue to grow exponentially as it has because we all know that the energy consumption does not scale.
[10:03] we cannot start to have nuclear power plants next to our next to our data centers.
[10:12] so the first part that I would like to discuss is what exists today in
[10:19] terms of connectivity Solutions and how do we bring photonics into this into these systems and of course a big part of that is a packaging problem which of of course this conference is focused on.
[10:32] so what you see here on this slide on your left hand side um is a is a curve that was actually developed by Dara uh program manager Gordon Dr Gordon Keeler a few years ago that initiated a Dara program called pipes which we had the privilege are part.
[10:55] of what this curve shows is on the Y Axis or the vertical axis is a metric a combined metric of bandwith density and energy consumption so the higher we are vertically the better this metric is the lower the energy consumption and the higher the bandwidth density and on the x-axis the horizontal.
[11:23] axis we see the reach of the interconnect.
[11:27] how how long can the signal propagate?
[11:30] so for very very short distances meaning within the chip on the chip Electronics is actually very very good.
[11:40] and this the folks here of course know that very well typically within the chip over 3D integration very short distances we can look at fto Jews per bit and very very high van with densities.
[11:56] so you see those uh green uh green squares and and and red circles they represent these state-of-the-art Electronics.
[12:07] however as soon as we move the data over any appreciable distance across the board maybe to external memory in the system that figure of Merit really starts to drop very very quickly because
[12:24] the energy consumption of moving the data goes up with distance.
[12:26] we we have losses.
[12:29] we have lots of losses in the electronic wave guide.
[12:33] and thereby the energy density the bandwidth density of course is reduced.
[12:40] and what you see at the far end the lower right hand side are some of the current state-of-the-art photonics.
[12:49] so those are the you can go and they're commercially available what we call the pluggable photonic technology that we see in data centers today.
[12:56] and the the reason we're using photonics there is because you know they can carry the signal over long distances over fibers.
[13:05] but they're not designed for Energy Efficiency.
[13:08] they're they they just use conventional semiconductor lasers and and some Optical modulators.
[13:17] they're just not designed to be very energy efficient because they're they that wasn't the goal there.
[13:21] and they're definitely not designed for bendwi
[13:25] density typically those pluga bles to today are about 400 gbit per second.
[13:32] maybe 800 gbit in the next in the very next generation not terabits per millimeter type densities that I will show you that we'll need.
[13:41] so what we want to do the goal here is to think about embedding photonics.
[13:49] there's a new generation of photonics integrated photonics and silicon and how do we bring that into the package in a closely integrated fashion.
[13:59] to actually get those two very important metrics simultaneously.
[14:06] I want to I want to emphasize that just getting an energy efficient link is not enough.
[14:12] we need both Energy Efficiency and B with density together and that's really the challenge.
[14:17] so you can see the picture the kind of the vision for this potentially heterogeneously integrated future.
[14:26] package that has a photonic if you will chiplet IO chiplet it's part of this ecosystem and it connects can connect to memory can connect to the processors GPU etc.
[14:40] so what what let's go back and look etc so what what let's go back and look at the systems today on on the other side the compute socket and what are the numbers that we need to to actually achieve.
[14:54] right if we look inside the socket the B B width densities the bandwidth that's that's in there is tremendous for example uh some of you can see some of the uh uh key industry uh commercial uh packages that can have terabytes multiple terabytes of of data communication within this is within that package typically from the GPU to memory and so forth so this these are very very
[15:27] high bandwidth densities and as I showed you the the metric there is very good F.
[15:31] Jews per bit uh kind of uh energy consumption within the board it's a little bit less because now we're going over slightly longer distances we might be going through something like an envy switch or an or an infinity infinity fabric and so on and so the bths drop down a little bit uh maybe by another factor or 10 but it's still quite High.
[16:01] but dramatically as soon as we take that data outside of the socket across the system and this is about communicating over maybe multiple meters to maybe up to a couple of kilometers across the entire data center the bandwidth this is when we start to use those pluggable photonics like infinity band uh that are 400 maybe 800 gbits per per line and so we we can
[16:29] have as much as two orders of of magnitude maybe even more of available bandwidth density as we start to go over those longer distances
[16:41] and the energy consumption is not is not very good either because again those those pluga bles are just not designed for for that for that application
[16:49] so in this new world of AI systems we really need to rethink how photonics can be used really within the compute the compute system itself
[17:04] so we have a world of silicon photonics this is a technology that has really emerged in the last almost couple of decades now uh
[17:14] and today we have multiple fabrication capabilities around the world Asia Europe in the US and and some of the many of the top uh companies in the world are now now emerging
[17:30] themselves in into silicon photonics um and running 300 mm Fabs you know routinely uh and many companies are looking into um fabricating silicon photonics you can see some of the uh devices we can basically now make you know all the key components of a link including the data modulation uh data multiplexing filtering and data reception with the exception of the laser and I'll talk about the laser this is one of the key differences between working in the optical domain versus working in the electronic domain electronic you can just have a voltage source it's just right there in your circuit with Optics you have to think about where the laser is coming from and I just want to make it very clear we don't have a laser in Silicon silicon is not a direct Bend Gap and so it just does not work to make a laser in Silicon.
[18:34] and so we typically have lasers that are in three five uh semiconductors and we have to somehow think about how does the laser fit into our our package.
[18:44] there are many different uh techniques for that.
[18:49] okay so I want to talk a little bit about how photonics is at least today being thought of.
[18:54] how is it integrated into into the package into the chip.
[18:56] we have 2 and a half D integration approaches.
[18:59] uh you can kind of see an example of that here where we have an interposer um and an electronic chip that's used to to uh be the interface to the optical chip um the photonic chip the pi if you will and then the interconnect is going through an interposer and you can see a picture of that implementation um.
[19:22] so this is uh a pretty good technology because it's very flexible.
[19:28] we can think about putting other chips in this 2 and 1/ 12d package um it allows for some amount of thermal
[19:36] isolation and so forth but you can see below that it it really doesn't achieve the bandwidth densities that we want because we are you know we have to put the electronics in some place adjacent to the photonics and so the area that we have and and the kind of density that we can achieve is really on the order of a few hundred gigabits per millimeter which is actually similar to what Electronics can can achieve today so we're not really extracting the bwith densities that we want to have out of photonics with this with this geometry and the energy consumption is is okay but not very good it's a few PJs per bit we can think about monolithic integration this is a really interesting technology so this is a technology um that is you have a uh a Foundry with a with a process and you can actually design and
[20:36] fabricate Electronics electronic devices
[20:39] electronic transistors as well as
[20:42] photonic devices all in the same process
[20:46] so you get out one wafer you get out a
[20:48] die and it already has monolithically
[20:52] integrated electronic drivers electronic
[20:54] receivers as well as the fonic devices
[20:57] so this is from a packaging perspective
[21:00] this is almost an ideal
[21:03] approach uh and one one uh this is a
[21:07] kind of a picture of one one of the
[21:08] Technologies commercial Technologies
[21:10] available that that does
[21:12] that uh and it's it has minimal
[21:15] parasitics simplifies really importantly
[21:17] really simplifies the the
[21:20] packaging
[21:22] however the bandwidth densities that you
[21:25] can achieve again are limited why
[21:28] because we live in this two-dimensional
[21:31] world with the monolithic integration
[21:33] right you think about the photonic
[21:35] devices that you have to place there and
[21:38] then we need to put the electronic
[21:41] transmitter you know driver circuitry
[21:43] typically in RF speeds you know 10 20
[21:48] sometimes 50 gigahertz driving those
[21:51] those photonic devices we have to have
[21:53] the receiver Electronics next to it and
[21:57] you want to keep those those distances
[21:59] very short to minimize parasitics and so
[22:02] it limits your layout limits you know
[22:05] how much you can put on on that surface
[22:09] and so the kind of bandwidth densities
[22:10] that we end up getting from these type
[22:12] of approaches are again on the on the
[22:15] order of a few hundred gigabits per
[22:17] millimeter and that's that's it we're
[22:19] limited to that there's not there's not
[22:21] really capable of scaling beyond that
[22:24] because we St we have to lay out the
[22:26] electronics near that so that that's a
[22:29] limitation another limitation is that
[22:32] unfortunately there's very few
[22:35] foundaries in the world that offer this
[22:37] kind of process um one of course very
[22:40] good one of course is global foundaries
[22:42] um it's a great process uh but but it it
[22:46] doesn't let you uh separately
[22:49] optimize the electronics and the
[22:52] photonics right you're stuck with the
[22:53] process that that you're given so you
[22:56] can't for example use the most Advanced
[22:59] Electronics process and then combine it
[23:03] with the photonics but again I want to
[23:04] go back and say one of the biggest
[23:07] challenges for photonics is the package
[23:10] and so the monolithic approach is you
[23:14] know it's big big plus is that it solves
[23:16] the packaging problem very very
[23:19] well okay and
[23:21] then the third approach that I'd like to
[23:25] talk about which is um the work that my
[23:29] lab uh is is mostly focused on is the 3D
[23:33] integration so this is this is an
[23:35] approach where we basically fabricate
[23:38] the photonics in a photonic optimized
[23:42] process which as I mentioned there are
[23:44] multiple foundaries in the world that
[23:46] will do that and then we can fabricate
[23:49] the electronics in another
[23:51] process um and basically we can then uh
[23:57] either uh combine the photonic you know
[24:00] at a wafer scale or at the Die Level
[24:02] different approaches in a 3D
[24:05] integration uh to to to combine the
[24:09] electronics and the photonics and this
[24:12] approach gives us the best possible
[24:16] density bandwidth density because we can
[24:19] pack the photonics as dense as we can on
[24:22] the photonic chip and we can pack the
[24:24] electronics to match that and then we
[24:27] can with the 3D integration obviously we
[24:30] minimize the parasitics uh tremendously
[24:33] right because that's the shortest uh
[24:35] distance between the
[24:36] two um but you know the downside of
[24:40] course is that it's a complex packaging
[24:42] process it's a 3D uh packaging process
[24:46] needs to be developed and another
[24:49] another uh important issue is the
[24:52] thermal uh if you have an
[24:54] Electronics uh uh uh chip that's running
[24:58] very hot that can affect the photonic
[25:00] chip and so forth so we have to look at
[25:02] the thermal characteristics uh uh very
[25:05] very
[25:07] closely on the on the metrics you know
[25:10] where we want to get the performance
[25:12] this is really the best approach from
[25:14] that point of view right we can actually
[25:16] get multiple terabits per millimeter
[25:19] Edge bandwidth
[25:21] density and approach subpole per bit for
[25:26] the communication distance and hopefully
[25:29] I convinced you from looking at the
[25:31] requirements from the from the uh
[25:35] compute socket as you recall we saw
[25:38] terabytes of communication bandwidth and
[25:41] very very very very low energy
[25:43] consumption so I will make the the case
[25:46] here that this approach the 3D approach
[25:49] is really the only way the only way to
[25:53] successfully insert photonics that
[25:56] actually meets the performance
[25:59] requirements that's needed from the
[26:01] compute socket perspective so this is
[26:03] the approach that we need to go to for
[26:05] AI
[26:08] systems okay so how do we get
[26:11] there one of the there there are some
[26:14] really great advantages to Optics and
[26:17] also some great disadvantages to Optics
[26:20] one of the great disadvantages to Optics
[26:22] is that it's very difficult to do
[26:25] processing signal you know processing in
[26:28] the Optical domain we don't have an
[26:30] equivalent
[26:32] nonlinear element like the transistor to
[26:35] do that there is of course a lot of
[26:38] research in the domain of optical
[26:40] Computing but in
[26:42] general I will make the case that it's
[26:44] really not anything that's that's on the
[26:46] horizon at the
[26:48] moment but what's really good about
[26:50] photonics is that we can communicate
[26:52] with extreme bandwidth densities because
[26:55] we can combine multiple signals in the
[26:57] same wave gide
[26:59] by putting those signals on different
[27:01] wavelengths right they're not going to
[27:03] interfere with each other uh if we
[27:05] combine multiple electrical signals in
[27:08] the same wire obviously that's not going
[27:10] to work due to interference and cross
[27:12] talk in the optical domain we can do
[27:15] that very
[27:17] easily so the approach is to put data on
[27:22] on multiple wavelength channels and then
[27:25] combine all those wavelength channels
[27:27] into one
[27:28] pin one
[27:30] interconnect and that gets us and then
[27:32] of course have multiple of those uh
[27:35] photonic
[27:36] wires and that gets us very to to
[27:38] achieve very very high bandwidth
[27:41] densities in Silicon
[27:43] photonics the way that we achieve
[27:46] modulation on different wavelengths is
[27:48] using devices that you see here they
[27:50] look like these discs they're are disk
[27:54] modulators and what they do is they
[27:57] basically
[27:58] do two functions at the same time they
[28:01] select a wavelength and then you can
[28:04] drive them electronically to modulate
[28:06] the data onto that Optical
[28:09] channel so in this
[28:11] picture what we have is we have a laser
[28:14] source and I will talk a little bit more
[28:17] about the Laser Source the Laser Source
[28:19] comes into this
[28:21] chip the Laser Source actually contains
[28:26] multiple Optical wavelengths all at the
[28:29] same time so imagine it's a comb what we
[28:32] call we call it a comb Laser Source so
[28:35] it's a comb of different uh wavelengths
[28:37] that are coming into this
[28:40] chip and the separate discs that you see
[28:44] on the transmitter
[28:46] side immediately select the specific
[28:49] wavelength that's coming from the comb
[28:51] that's tune to them puts data onto that
[28:56] wavelength and then it can couple out
[28:59] propagate through a fiber as you see in
[29:01] the
[29:02] picture on the receiver side the
[29:06] opposite happens instead of modulating
[29:09] the data we have similarly looking discs
[29:14] but they are filters they basically
[29:17] filter out that particular wavelength
[29:20] Channel and then we go into an optical
[29:23] detector and and the back end of the
[29:25] receiver that's the that's the
[29:26] architecture
[29:30] because we are using multiple channels
[29:33] right we have a very interesting design
[29:35] space here let's say I want to have a
[29:38] terabit link right a single link that
[29:41] runs a terabit I can I can do it
[29:44] multiple ways I can I can go to one
[29:48] extreme and have one Optical Channel
[29:51] modulated at a terahertz obviously
[29:54] that's not a good solution it's very
[29:56] hard to do it also will consume a lot of
[29:58] energy right the higher the frequency
[30:00] the higher the energy I can have 10
[30:03] channels at 100 GB per second per
[30:06] Channel okay that's that's possible but
[30:10] 100 gbit per second per Channel leads to
[30:14] pretty high energy per bit it's going to
[30:16] be multiple Pico Jewels per bit if I if
[30:19] I have to operate at 100 gbit per
[30:22] second but I can just add more channels
[30:25] let's say I have 64 ch channels of
[30:29] wavelengths now I can go down to 16
[30:32] gbits per second per per
[30:34] Channel and that design space enables me
[30:37] to now reduce the energy per bit while
[30:41] keeping the same overall band withd
[30:44] right this is the magic or the really
[30:47] you know important design space of
[30:51] photonics once I have that then with an
[30:54] energy consumption
[30:55] achieved a very important Point here is
[30:58] that the optical wire or the fiber is
[31:02] extremely low loss right fibers have a
[31:04] loss of about2 DBS per kilometer per
[31:08] kilometer so once I've generated that
[31:11] data I can move over very long distances
[31:14] it's distance independent unlike in
[31:17] electronics you know as soon as I get
[31:19] out of the chip as soon as I go across
[31:21] the board I experience a tremendous
[31:23] amount of loss on my on my signal but
[31:26] that's the basic concept okay okay I'm
[31:28] going to talk about a really important
[31:29] key enabling technology which is this
[31:32] com Laser Source and I was I want to
[31:35] mention that uh together with um you can
[31:39] see there are two names here uh
[31:42] Professor Alex gaeda and Professor mikal
[31:45] Lipson my my colleagues at Colombia we
[31:48] also have uh a company called Escape
[31:52] fonics um that's commercializing this
[31:55] this technology as well as the Link
[31:56] Technology that I will show today um so
[31:59] this is a a unique Laser Technology that
[32:02] we've been developing where we can
[32:04] generate any number of optical channels
[32:09] across a very wide spectrum you can see
[32:11] here 70 channels of Optics and the comb
[32:15] generates those those wavelengths very
[32:18] very precisely in fact in other
[32:20] applications it's can be used for
[32:22] Metrology and clocking and things like
[32:24] that so it's extremely precise um you
[32:27] can see a little pi of the package of
[32:29] that laser so it's it's basically a chip
[32:31] it's sitting on a chip the same similar
[32:34] silicon chip that where we have the rest
[32:37] of the link but we typically think of
[32:39] the laser as being outside of of the
[32:42] main
[32:43] package primarily because we want to
[32:46] separately uh uh have you know we don't
[32:49] want the thermal effects of the laser to
[32:51] affect the rest of the Chip And that's
[32:54] actually a good thing we can you know
[32:56] that we don't want to have it
[32:57] necessarily
[32:58] co-integrated uh on on on the same WF
[33:00] for as the
[33:01] links so we start with this very
[33:04] important comb Laser
[33:06] Technology and then this is a little bit
[33:09] a lot of details on the photonic design
[33:11] but I just want to kind of give you the
[33:13] flavor of um when you design the
[33:16] photonics in in these different
[33:18] processes these different foundaries
[33:20] that are out there there is pretty
[33:23] extensive design that goes into the
[33:25] photonics um and what we been doing is
[33:29] really optimizing co-optimizing the the
[33:32] design of the photonic side with the
[33:34] electrical side for the purpose of
[33:37] minimizing the
[33:39] energy it's important to note that
[33:41] because it's not something that's been
[33:43] done in the past in Optics in general
[33:45] it's been used primarily for Telecom
[33:47] applications and the energy consumption
[33:49] per bit was not a primary goal
[33:52] necessarily but here it is and so for
[33:57] this is a little bit detail for maybe
[33:59] the folks that are more Optics inclined
[34:02] here but we use uh what's known as a
[34:05] vertical Junction uh doped uh modulator
[34:09] it's a dis modulator and the reason we
[34:11] do we go through all that uh work is to
[34:15] to be able to get a very high-speed
[34:17] modulator that only requires A8 volt
[34:20] swing voltage that's compatible with
[34:23] Advanced
[34:25] semos you you might hear photonic and
[34:28] silicon
[34:29] photonics sometimes you look under the
[34:31] hood and you see oh wow this photonics
[34:33] requires you know 1 and 1 12 volts two
[34:36] volts but that's not really really
[34:40] compatible with Advanced nodes so we
[34:42] need to be this is very important part
[34:44] of the design
[34:46] space we also have what we refer to as a
[34:50] scalable link architecture you so this
[34:52] comb laser can generate maybe hundreds
[34:55] of lines potentially we want to be a
[34:57] able to have an architecture that can
[34:59] really scale into the future Beyond a
[35:01] terabit per link maybe 2 terabit maybe
[35:04] 10 terabit per link this is all possible
[35:07] with the scalable architecture uh design
[35:10] that that we have where we can separate
[35:13] the modulators into different different
[35:14] banks and different uh different
[35:19] buses so just a a little bit of an
[35:21] example um that's again important with
[35:25] these so we we have this comb generates
[35:28] a lot of wavelengths we have these discs
[35:30] that are modulating those those
[35:32] wavelengths and then we have another set
[35:34] of discs that are filtering those
[35:37] wavelengths on on the backand on the
[35:39] receiver so you might ask hey you know
[35:42] how are you getting old this these
[35:44] different wavelengths aligned to each
[35:46] other you know you know how do you get
[35:48] the the bank of the modulators the bank
[35:50] of the receivers you know how is this
[35:52] all working and staying staying stable
[35:55] and and functional so one one of the
[35:58] other kind of under the hood uh design
[36:01] elements that I want to point out is
[36:03] that uh some other designs use what are
[36:07] known as uh micro ring resonator
[36:10] modulators and filters and the reason we
[36:13] use
[36:14] diss as opposed to Rings just as a small
[36:17] detail is that uh besides the fact that
[36:21] the discs require much less voltage to
[36:23] operate they're also much more robust so
[36:26] we can design them at a specific
[36:28] wavelength and they're very close to
[36:30] staying at that
[36:32] wavelength and so they're fabrication
[36:34] robust because they only have one Edge a
[36:38] dis only has one Edge a ring has two
[36:40] edges and it's much harder to control so
[36:43] all these kind of process versus
[36:46] fabrication variations versus the
[36:49] voltage versus uh you know the amount of
[36:52] energy that requires you know all of
[36:54] this code design is a really important
[36:56] component of of this technology that I
[36:59] really want to emphasize it's not just
[37:01] fabricate photonics fabricate
[37:02] electronics and stick it
[37:06] together and so this is an example of a
[37:08] recent some recent work where we had
[37:11] again these multiple buses 64 channels
[37:14] and you can see here the the gist of
[37:17] this is that we designed these these to
[37:19] line up with the comb lines and and they
[37:23] come out you know very very close to to
[37:25] the design uh very highly
[37:29] robust we we've been very fortunate I
[37:32] I'm I'm at a university uh at Columbia
[37:35] University and so typically you know
[37:37] University we work with multi-project
[37:39] wafer runs
[37:41] npws but we've been very fortunate to
[37:44] get access to full reticle runs and I
[37:47] like to say that now that my students
[37:49] are used to designing a full reticle
[37:51] which is a lot of work but also gives us
[37:54] a tremendous amount of
[37:55] flexibility they they don't want to go
[37:57] back to
[37:58] npws you know it's like flying first
[38:01] class you know once you do that it's
[38:02] hard to go back to coach um so we've
[38:06] been able to very fortunate to do 300
[38:09] millimeter Fab runs we do them we've
[38:11] done them at multiple places uh but our
[38:14] primary place is at a photonics which is
[38:17] in alany New York it's a an Institute a
[38:19] manufacturing Institute um and you can
[38:22] see the the advantage of doing it is
[38:24] that we can have many many designs we
[38:26] can iterate um
[38:28] and and we can make a lot of progress so
[38:30] this was our first wafer we had a second
[38:33] wafer that we called Oak and and so on
[38:37] and then we even have a third wafer
[38:38] right now that's currently in the Fab
[38:41] right so what all of this enables us to
[38:43] do is collect first of all collect a lot
[38:45] of data be able to iterate on the on the
[38:48] process and the designs um which are
[38:51] really critical to all of this
[38:52] development and and this has been what
[38:55] I'm showing you is multiple years of of
[38:57] of development here that's that's behind
[39:01] us in addition uh We've also been very
[39:04] fortunate to get so how do you do all
[39:07] the testing right how do you do all the
[39:09] characterization now that you have full
[39:11] Wafers you know with many many devices
[39:14] uh so we have a wafer scale prober
[39:16] automated prober I like to say that this
[39:19] replaces about you know five or six PhD
[39:22] students more or less it can it can run
[39:25] all night can collect a lot of dat
[39:29] um and uh and so um I just want to show
[39:33] that importantly here is that it can do
[39:35] both electronic and Optical uh
[39:38] characterization
[39:40] simultaneously and uh you can see here
[39:42] we're very uh concerned about or really
[39:45] pay a lot of attention to the thermo
[39:47] optic uh characterization so
[39:50] on and now we can collect statistics and
[39:53] we can show that our designs are robust
[39:55] or not robust you know all the
[39:57] fabrication variations so it's not about
[40:00] anymore about you know one single device
[40:02] one single uh idea but really about
[40:05] thinking about it from the system level
[40:07] and actually developing these massively
[40:10] integrated uh
[40:12] components uh this is just an
[40:14] interesting uh addition that we've made
[40:17] which is it's called an undercut and it
[40:20] actually improves the thermal efficiency
[40:23] of of these
[40:24] devices um so this is a pro a wafer
[40:28] scale process that we co-developed with
[40:30] the Air Force lab and and the aim
[40:34] Institute so now we get to uh some of
[40:37] the results and so we have achieved this
[40:41] goal of the 3D integrated uh electronic
[40:45] photonic uh chiplet and you can see here
[40:49] sort of the um uh the the bonding
[40:52] between the eic's on the top the pick is
[40:54] on the
[40:55] bottom and this particular chip has 80
[41:00] transmitters each running at 10 gbit per
[41:03] second and you can see all the eye
[41:06] diagrams that we
[41:08] accumulated
[41:10] and while all of those transmitters are
[41:13] running at 10 gbit per second each the
[41:16] total amount of energy per bit is 50 fem
[41:19] jewles 50 F jewles on the receiver side
[41:24] the energy is just under 70 f jewles
[41:28] so about 120 fjs for this for this
[41:31] chip and this is a picture of the
[41:34] chip so this
[41:36] is uh a chip that expends 120 fto for
[41:41] the entire transceiver and it has a
[41:44] density of 5.3 terabits per millimeter
[41:49] squared um and this is just the
[41:52] beginning we can run the modulators
[41:55] faster uh we can can we can in this
[41:58] particular work we actually use just a
[42:01] 28 nanometer EIC so it's not even that
[42:04] advanced we can there's a lot of room to
[42:06] improve on the energy and improve on the
[42:08] on the bandwidth
[42:11] density the this is the energy
[42:14] consumption of the entire link where we
[42:16] include we have to include not just the
[42:19] transceiver but also the thermal control
[42:21] and the laser and it's just under a half
[42:25] a PJ per bit and I want to emphasize
[42:27] that this half a pel is able to carry
[42:30] that data almost any distance within the
[42:33] system this is not this almost distance
[42:36] independent this is a picture again of
[42:39] that and a summary of the
[42:42] approach another very important part is
[42:46] how do you couple the light in and out
[42:48] of this chip I know this is a a topic
[42:50] that is is very hot right now in in
[42:55] photonics so you can see on the left
[42:58] side the size of the fiber is typically
[43:00] about 10 microns in diameter single mode
[43:03] fiber and the size of the wave guide in
[43:06] the Silicon chip is typically about a
[43:08] half a micron so it's a big
[43:10] mismatch and what we what we typically
[43:14] use to couple the light into the fiber
[43:16] is we use something we call an inverse
[43:18] taper it's almost counterintuitive but
[43:20] we make we make a tip of the wave guide
[43:23] and that actually matches the mode into
[43:26] into the fiber you can see how it's
[43:28] fabricated here but this is you know
[43:31] this is a very complex uh design and
[43:35] it's also very very sensitive to
[43:37] misalignment we also use other
[43:39] techniques to match the mode such as
[43:41] substrate removal so again this goes
[43:44] into some of the packaging challenges
[43:46] associated with connecting the fiber IO
[43:49] to the
[43:50] chip um this is just a quick video we
[43:54] have to do epoxy I want to thank Tindle
[43:57] Institute in Ireland for this there
[44:00] there're really some of the packaging
[44:03] Frontiers an active you know this kind
[44:05] of fiber coupling to the chip requires
[44:09] what we call Active
[44:11] alignment so something that comes to
[44:14] mind as soon as you see this expensive
[44:16] expensive expensive right right how do
[44:20] we solve this right one really promising
[44:23] approach and this is again uh led by uh
[44:26] Tindle
[44:27] we collaborate with is to use micr
[44:30] lenses and actually cumate the
[44:32] light and I'll just show you a quick so
[44:35] this is on the you'll see a little video
[44:37] so this allows you to have a completely
[44:39] pluggable array of fibers into the chip
[44:43] and you can see that he can unplug and
[44:45] plug back that fiber array and the
[44:48] losses the power
[44:51] remains so now we have this notion of
[44:54] photonic
[44:55] connectivity and we want to bring it
[44:57] into the system right we want to bring
[44:59] that photonic connectivity perhaps to
[45:02] the memory to enable a system with this
[45:04] aggregated memory and and be able to uh
[45:08] not just have the fibers as they are
[45:11] today with the plug bles connected to
[45:13] the to the server but really connected
[45:15] all the way into the socket right and
[45:18] that enables us to improve uh not just
[45:22] the energy consumption associated with
[45:24] the data movement but improve the energy
[45:27] of the entire
[45:29] system and what I mean by that
[45:32] is uh let me just skip through that
[45:35] because this is a little bit about the 2
[45:36] and a2d integration that we use in our
[45:39] system level experiments you can see a
[45:41] nice picture of the interposer with the
[45:44] with the EIC and the pick I thought i'
[45:46] put a lot of packaging pictures for you
[45:48] guys today make it interesting so as
[45:51] much as possible but basically the the
[45:53] the story with the with the system level
[45:56] is that we want to think about how we
[45:58] put the photonic connectivity at the
[46:00] system level
[46:01] systemwide and the idea here is to not
[46:05] just improve the energy consumption and
[46:08] bandwidth of the interconnect but
[46:10] improve the energy consumption of the
[46:12] entire system right to bend that curve
[46:15] and the way we do that is by using the
[46:19] photonics to connect only to the
[46:22] resources that are needed for the
[46:25] application at the time
[46:27] and uh this is this is the approach that
[46:29] we're using you can see something we
[46:32] call Flex seatack where we have flexible
[46:35] connectivity at the system level and
[46:37] I'll skip that and I'll just show you
[46:40] some kind of final results here that
[46:44] what the flexible photonic conductivity
[46:46] can do now that we have it at the system
[46:49] level is it accelerates that entire AI
[46:53] application by several factors right if
[46:57] I can run my entire application three
[47:00] times five times
[47:01] faster I reduce those megawatts per hour
[47:05] significantly in addition to reducing
[47:07] the energy of the data movement so this
[47:10] is where we're going um at the system
[47:13] level so with that um just want to thank
[47:17] um the people that actually do all the
[47:19] work this is uh our group and our
[47:22] sponsors and I want to especially thank
[47:25] um SRC and the sponsor companies of of
[47:28] the uh jump two Center so thank you so
[47:31] [Applause]
[47:37] much so thank you so much for this
[47:40] really fantastic cre thank you uh very
[47:42] inspiring talk so and I think uh you
[47:45] will join me in um yeah thinking about
[47:49] this topic will be one of the demanding
[47:51] topics in the next years for our
[47:52] community so thank you so much for
[47:55] building this bridge to our community
[47:57] coming here from the device level and I
[47:59] think the packaging Community has
[48:01] understood the task now no we have to
[48:03] work together for this really
[48:05] challenging approaches uh mentioned in
[48:07] your great talk thank you so much and
[48:09] may I invite you to go to the chairs and
[48:12] um then we start now uh the
[48:17] Q&A so I see already one question has
[48:20] been a long time actually in the VA app
[48:23] and if you if you agree I think we may
[48:25] actually choose the one which has the
[48:27] most likes absolutely and I would read
[48:29] it to you um so in
[48:32] 2024 year one for co- packaged Optics
[48:35] question mark could you maybe comment on
[48:39] that give us your thoughts about that
[48:41] please yeah um I I think I think this is
[48:45] definitely I would say the beginning of
[48:47] C- package Optics obviously there are
[48:49] many people many companies as well as
[48:52] research uh groups that are that are
[48:54] working on on co- package Optics and I I
[48:57] alluded to some of the some of the key
[48:58] challenges right what are what are
[49:00] really the big
[49:01] challenges uh specifically you know in
[49:04] this in this domain of co- packaged
[49:06] Optics putting it into into the system
[49:09] into the real uh ecosystem of of the uh
[49:14] of of manufacturing and and Industry
[49:17] and there's there's two big things right
[49:20] one is the laser you know we need to
[49:23] have a source of photons right so how is
[49:27] that laser uh packaged you know within
[49:30] the system there are definitely some
[49:32] really good approaches and it also has
[49:35] to be the right laser that can generate
[49:38] you know the number of wavelengths you
[49:39] know all the things that we need uh and
[49:41] the energy consumption and then the
[49:43] second big part is how do you put that
[49:47] photonic chip into into the the package
[49:51] into the
[49:52] ecosystem with the optical IO right we
[49:55] can silicon phot IC chip is fine no
[49:57] problem we we can put it on the wafer we
[49:59] can assemble it there's many techniques
[50:02] for uh you know everything from wafer
[50:04] bonding to assembly you know that's all
[50:07] good but how do you get that Optical IO
[50:09] right it has to connect to a fiber I
[50:11] started to talk about some of the
[50:13] challenges there those are the key key
[50:15] challenges for really getting
[50:17] co-packaged Optics um I you know in into
[50:21] into our into our future so is 2024 the
[50:25] year I think it's the beginning and I
[50:27] will also add optimistically that we
[50:31] will not be able to get to where we want
[50:34] to be with these systems especially the
[50:36] AI systems that are dominating the world
[50:39] without co-packaged Optics so we need it
[50:42] we need to get there yeah thank you very
[50:45] much um just to tell you if you put a
[50:48] question into W app you can also vote
[50:50] for us questions so you can push them up
[50:52] and we will look on who gots the most
[50:55] votes to select little game so you may
[50:58] check and then agree on the questions if
[51:00] you like and you put your own question
[51:02] the next which is maybe Rosen up now
[51:04] with the most likes would be the next
[51:06] one would you agree that we choose this
[51:09] together yes that sounds good okay then
[51:12] also there's a Live question later yeah
[51:14] ah let me see I didn't see that so maybe
[51:16] we mix then first the Live question and
[51:18] then the next from the vaa please sir
[51:20] please introduce yourself and post your
[51:22] question uh Ravi Mahajan Intel Karen
[51:25] that's an excellent talk yesterday when
[51:28] the idea of co- package photonics was
[51:31] discussed with system Architects they
[51:33] pointed out that the energy price of
[51:36] conversion in seris is the real killer
[51:39] in energy do you have any thoughts on
[51:41] how we can make wide and slow viable so
[51:44] that we get rid of the seris conversion
[51:46] completely and then how do we
[51:48] standardize the wide and
[51:50] slow yeah I absolutely in fact that was
[51:53] exactly you know our our approach
[51:57] um that I'm a big champion of right um
[52:00] so I I come from a background of um sort
[52:04] of at the intersection I'm always at the
[52:06] intersection of computing and photonics
[52:08] and I I really like to look at things
[52:11] from the system side and in the past you
[52:14] know folks in the optical world you know
[52:16] they they work on very very fast
[52:18] modulators for example 100 gigabit
[52:21] modulators wonderful you can get a nice
[52:24] you know uh research paper and and it
[52:26] might be very useful for like Long Haul
[52:28] Telecom applications but it doesn't work
[52:31] in the Computing because you know that
[52:34] that um that interface you know if you
[52:36] look at the at the electronic side of
[52:38] the interface we have many many parallel
[52:41] as as we all know very well right so
[52:43] what is that impedance matching from the
[52:46] optical side and it's in the wavelength
[52:49] domain we have another domain for the
[52:52] future that we're working on I just want
[52:54] to mention which is the modal domain you
[52:56] you can also get orthogonal spatial
[52:58] modes of Optics on top of the
[53:01] wavelengths so there there's even room
[53:03] for scaling but let let's stick with the
[53:05] wavelengths and so I think the key here
[53:08] is you know the dense wavelength domain
[53:12] and then what you can do is you can dial
[53:14] down the data rate per Channel that's
[53:17] that's where we're going um and if you
[53:20] dial down the data rate per Channel you
[53:22] know you can find an Optimum where as as
[53:25] we've shown where the energy consumption
[53:28] is is really minimized and you get you
[53:30] don't need to have the CIS it's a c less
[53:33] essentially transceiver um very
[53:36] different than some of the mindset and
[53:38] some of where the Telecom folks are
[53:42] right and it's if you go to one of our
[53:44] conferences like ofc you know there's
[53:46] almost like two different communities
[53:48] that are trying to get together there's
[53:50] the Telecom Community there you know I
[53:52] want to go fast I want to have you know
[53:55] lithium Nate you you know thin fill
[53:57] modulators but it's never that
[54:00] technology will never solve the AI
[54:02] problem it will never solve the AI
[54:04] problem um to to get inside the AI
[54:08] socket you need to have wide slow
[54:11] relatively slow ciles uh transmission
[54:14] and necessarily requires dense wdm which
[54:19] leads us to the com Laser Technology
[54:21] that's why I mentioned it's it's so
[54:22] critical uh to to that so so a followup
[54:26] then is the dense laser comb technology
[54:29] ready for prime time or do you think it
[54:31] has still some time before it becomes
[54:33] mature yes I believe that it's um
[54:37] obviously you know I I have some bias
[54:39] because I have a company uh Escape
[54:41] fonics that that's developing that we
[54:44] feel that you know we we started the
[54:46] companies because we feel so strongly
[54:48] that this is this is the direction that
[54:50] we need to move in um and and so that
[54:53] that's one technology there there are
[54:55] other companies out there that are also
[54:58] developing this technology and uh it
[55:02] it's
[55:03] a it's absolutely necessary now in terms
[55:07] of you know the you know I'm not a I'm
[55:10] not a marketer but you know what I know
[55:13] about the market is that currently the
[55:16] point where at least uh you know
[55:20] customers and so forth companies want
[55:22] want the the the comb is around the 6
[55:26] Channel Mark and very soon I believe
[55:29] it's going to go to the 32 Channel Mark
[55:31] and yes those Technologies are
[55:34] commercializable today absolutely thank
[55:36] you
[55:40] yeah so thank you very much yeah it's
[55:43] just a little organizational thing um so
[55:45] thank you very much for your question
[55:47] now let's give others a chance to to ask
[55:49] further and I think we have a rising
[55:52] Champion here in the question it's now
[55:53] got 13 votes oh wow should we take this
[55:55] now sounds good good then I read it uh
[55:58] so thank you very much can you please
[56:01] highlight the key techn technical
[56:03] barriers that this community can help
[56:05] solve yeah where should the focus to
[56:08] drive successful adaptation of
[56:10] co-packaged photonics should go for or
[56:13] should be yeah yeah excellent question
[56:16] and thank you thank you for for asking
[56:18] that um I think that you know this is
[56:23] this is a this is a very difficult it's
[56:26] a difficult challenge right um it's
[56:28] there's a bit of a um you know chicken
[56:31] and egg if you will because some of the
[56:35] large you know
[56:37] packaging uh uh companies out there um
[56:42] want to get into the fonics you know to
[56:45] the co- package uh fonics business but
[56:48] at the same
[56:50] time that business is not quite there
[56:53] right it's still it's still as I as I
[56:55] showed you know there's still this
[56:56] active alignment there's a lot of
[56:58] different standards and and uh you know
[57:02] you can't like say okay turn on you know
[57:05] and here you go there's a manufacturing
[57:07] of a photonic chiplet you know photonic
[57:09] IH and we're not quite there yet and and
[57:12] so what we and and in addition to all of
[57:15] that you know this is not a problem
[57:17] that's going to be solved by the fonics
[57:19] community and it's not a problem that's
[57:21] going to be solved by the electronics
[57:23] community and it's not a problem that's
[57:25] going to be solved by the pack packaging
[57:26] you know Community it has to be solved
[57:28] by really all of those
[57:31] multidisciplinary uh communities working
[57:33] really closely together so there's a
[57:36] challenge out there about getting this
[57:38] ecosystem uh to fruition and so I think
[57:42] that what we need to do as a community
[57:45] is is is really uh start to do some of
[57:49] these um real prototyping real pilot
[57:53] lines you know prototyping where there's
[57:56] tremendous available tools and
[57:59] Technologies on on the back end on the
[58:01] packaging that that are out there I know
[58:03] because you know we've had access to
[58:05] some of them uh fortunately um but
[58:08] they're not you know they're working at
[58:09] the way for scale and they're not
[58:12] quite developed to you know so that they
[58:16] accommodate some of what's needed from
[58:18] from from packaging co- packaging the
[58:20] photonic chips as well so as as an
[58:23] example you know a very a very exciting
[58:28] uh you know fiber IO package right is to
[58:31] actually bring you know bring the fiber
[58:34] from the top into what we call an
[58:36] evanescent coupling into the chip and
[58:38] that it can have very low losses can be
[58:41] done at high densities and so forth but
[58:43] what we need to do that is we need to
[58:45] have access you know etch access to the
[58:48] optical wave guide just a kind of a
[58:50] small detailed example so we need the
[58:54] fabrication of the photonic
[58:56] wafer to work you know to work into this
[59:00] ecosystem in a way that can can open up
[59:04] that photonic wave guide and can and can
[59:06] develop the the packaging technology for
[59:08] that so it's um unfortunately I don't
[59:11] have an easy answer for that other than
[59:14] to say that you know we really need to
[59:16] have concentrated effort you know to to
[59:19] start to build some of these prototype
[59:21] packages uh so that they become a
[59:23] standard and can develop into into real
[59:26] manufacturing
[59:28] ecosystem yeah thank you very much I
[59:30] should mention this question has been
[59:32] asked by raii Mahan mahayan and the
[59:34] first by Michael Leo now let's look um
[59:37] is there any um additional question in
[59:41] there's a second yeah please so now we
[59:43] take an or question from the auditorium
[59:45] here over the microphone
[59:47] please please introduce yourself and
[59:49] then thank you Krishna Chri from corvo
[59:53] so adding a chiplets with different
[59:57] functionality on the 3D stacking sounds
[01:00:00] very
[01:00:01] fascinating and you mentioned some of
[01:00:03] the challenges there but uh in general I
[01:00:06] see one additional challenge is the uh
[01:00:10] doing so we are running out of the real
[01:00:13] estate uh uh real estate margin right we
[01:00:17] already have a very high density of VR
[01:00:20] which are connecting from one one layer
[01:00:23] to the another layer so
[01:00:26] do you still think that this approach
[01:00:29] could be
[01:00:30] scalable and and my follow-up question
[01:00:35] is um do you have a timeline in your
[01:00:37] mind where this technique can be um more
[01:00:43] uh ready and mature to be commercialized
[01:00:46] thank
[01:00:47] you yeah uh so the the first part is on
[01:00:50] the the real estate right uh of that's
[01:00:53] that's the the footprint that that's
[01:00:55] available in in in the 3D
[01:00:58] package uh if if if I'm uh if I'm
[01:01:01] correct and um yeah this is uh certainly
[01:01:05] you know this is
[01:01:06] a this is an an important problem uh and
[01:01:10] challenge the the way that I would at
[01:01:12] least the way I'm thinking about it is
[01:01:14] in a more of a chiplet ecosystem right
[01:01:17] and I think that if we can bring the
[01:01:20] photonic IO right as a as a separate
[01:01:23] chiplet initially right it's a separate
[01:01:26] chiplet provides very very high
[01:01:29] bandwidth density to take the that
[01:01:31] bandwidth outside of that package so
[01:01:35] it's not necessarily the technology
[01:01:36] that's going to be used you know within
[01:01:39] you know the other 3D stack that you
[01:01:40] have there with the memory the gpus and
[01:01:42] all of that but it's just being used you
[01:01:45] know for taking the data out out of that
[01:01:49] uh package um so uh I think that you
[01:01:53] know that that's at least what I think
[01:01:55] is May be the initial you know very
[01:01:57] promising approach that still does not
[01:01:59] infringe on you know some of the real
[01:02:01] estate some of the other aerial um
[01:02:05] important uh you know that you that you
[01:02:08] need to have some of the other
[01:02:09] components occupied um and so that's
[01:02:13] where I see the first that that's why I
[01:02:14] keep saying it's going to be photonics
[01:02:17] to the socket right to that package not
[01:02:19] necessarily all the way inside the the
[01:02:22] 3D stack um maybe in the future the
[01:02:25] there'll be other other approaches that
[01:02:27] bring it even within within the 3D stack
[01:02:30] honestly I don't think it I don't think
[01:02:32] photonics necessarily wins there because
[01:02:35] you know the electronic density and the
[01:02:37] electronic energy consumption is
[01:02:39] actually quite good um so that's the
[01:02:42] first part the second part on the
[01:02:44] maturity of of the
[01:02:46] ecosystem um you know
[01:02:49] optimistically the if you look almost at
[01:02:52] every major company of course you know
[01:02:54] Global is is a very important important
[01:02:56] component of that ecosystem there's a
[01:02:58] lot of investment um and a lot of effort
[01:03:01] that's being put into um photonics in in
[01:03:05] in general and and companies some
[01:03:07] companies already have very large
[01:03:08] programs others are just getting into it
[01:03:11] um and so I think
[01:03:13] that the maturity of the ecosystem with
[01:03:16] all this investment that's going in will
[01:03:19] will evolve um I see you know that curve
[01:03:23] starting to bend in about 20 27 that's
[01:03:27] sort of my at least from everything that
[01:03:29] I've seen all all the different aspects
[01:03:32] you know sort of in the in the two
[01:03:34] threee time frame you know I think
[01:03:36] that's really when we're going to see
[01:03:38] you know larger scale commercial
[01:03:41] commercializing and and shipments
[01:03:42] product shipments uh with the with the
[01:03:45] uh co- package
[01:03:48] fonics thank you yeah thank you very
[01:03:50] much um now we could maybe have a look
[01:03:52] to the vaa app again there's one
[01:03:54] actually going up with 12 vs the others
[01:03:56] are already marked as answered um should
[01:03:59] we take this yes how can advancements in
[01:04:02] termal management techniques mitigate
[01:04:05] the impact of heat on the optical
[01:04:07] performance of silicon photonics devices
[01:04:10] and what are the current
[01:04:12] limitations the question has been asked
[01:04:15] by raii PARTA
[01:04:18] zarati thank you yeah thanks uh very
[01:04:20] very good question thank you uh thank
[01:04:22] you for asking that one uh so thermal so
[01:04:25] let me start by saying that
[01:04:27] photonics no matter what it is is
[01:04:30] thermally
[01:04:32] sensitive um right you you change the
[01:04:35] temperature the index of refraction of
[01:04:37] the photonic material will change for
[01:04:41] the most part and that will affect the
[01:04:43] performance of the photonic chip now it
[01:04:45] can
[01:04:46] be uh more sensitive or less sensitive
[01:04:49] and that's that's a lot what of what we
[01:04:51] work with um so when you have as I've
[01:04:54] shown you some of the resonator
[01:04:56] technology that we have in general is
[01:05:00] very sensitive to temperature because
[01:05:01] it's a resonator so you change the index
[01:05:04] a little bit and there's a resonator
[01:05:05] effect and that can that can change um
[01:05:08] you know the the wavelength and so forth
[01:05:10] what we do to combat that is we can
[01:05:14] actually design the devices themselves
[01:05:17] to be robust to temperature variations
[01:05:22] to some extent we can also design them
[01:05:24] to be more and more a thermal um so for
[01:05:28] example by combining materials that are
[01:05:31] changed in One Direction with with
[01:05:33] temperature versus another Direction
[01:05:35] with temperatures and that's all that's
[01:05:37] all kind of areas where this community
[01:05:40] can be tremendously tremendously um you
[01:05:43] know can contribute tremendously to to
[01:05:45] all of those uh efforts so that's in
[01:05:48] general what's happening at the physical
[01:05:49] air on in the photonics there's also
[01:05:52] device geometries that can be done to
[01:05:54] make them again more robust less less
[01:05:56] thermal in addition to all of that um we
[01:06:00] have active control of the link um
[01:06:04] that's that's a something that is
[01:06:05] actually already done it's you know
[01:06:08] relatively simple circuitry that's used
[01:06:10] to control and maintain the link and
[01:06:12] we've shown that even Even in our
[01:06:14] research groups we can maintain the link
[01:06:16] over as much as 80 degrees you know
[01:06:18] change in temperature um but nonetheless
[01:06:21] you know I think that you know paying
[01:06:23] attention to the thermal environment
[01:06:26] uh is is a really key area a really key
[01:06:29] challenging area that needs to continue
[01:06:31] uh to be Advanced and and of course with
[01:06:34] uh cooling Technologies I I I'll just
[01:06:37] make one last comment which is you know
[01:06:39] we designed the photonic chiplet to be
[01:06:41] very low energy right by by Design so
[01:06:44] for example in that transceiver that I
[01:06:47] showed you that's 120 fjs for the entire
[01:06:50] thing right it's it's the entire thing
[01:06:53] is turned on constantly running dat
[01:06:56] and it's 120 F per bit that chip is not
[01:06:59] hot you know that that chip is running
[01:07:02] quite cool and we can we can keep it uh
[01:07:05] in in the you know operating uh over a
[01:07:08] long long periods of time without any
[01:07:10] issues the problem is going to be when
[01:07:12] we bring those hot gpus nearby and and
[01:07:15] other you know other components within
[01:07:17] the package and that's uh that's going
[01:07:19] to be you know part of all the uh
[01:07:20] thermal management that we're already
[01:07:22] doing in in the packaging environment
[01:07:27] yeah thank you very much then I think
[01:07:30] there is a next uh um person there to
[01:07:33] question at the microphone please
[01:07:35] introduce yourself and post your
[01:07:36] question thank you for your presentation
[01:07:39] Massi barani University of British
[01:07:41] Columbia um so the way I look at this is
[01:07:44] uh the enabler technology is the low VP
[01:07:47] of this modulator Which is less than one
[01:07:50] volt and what enabled that is the
[01:07:52] vertical Junction that you used so it's
[01:07:55] it's very good greatly done but doesn't
[01:07:58] that limit us to a certain um foundaries
[01:08:00] that provide that vertical Junction the
[01:08:02] rest of the industry typical silicon
[01:08:05] bonics they're lateral and so um can you
[01:08:09] please comment on that maybe
[01:08:10] Technologies like these would push the
[01:08:12] Silicon photonic F to go all vertical
[01:08:16] so yeah so on on the bandwidth of the
[01:08:18] vertical Junction modulators um we've
[01:08:21] been able to it's really more of uh the
[01:08:23] contact design the r of contact design
[01:08:26] uh so we've been able to run it easily
[01:08:28] up to 32 gig um in the vertical Junction
[01:08:32] uh we can probably push it uh we have
[01:08:35] some Next Generation designs can
[01:08:37] probably go to 64 you know pretty
[01:08:39] readily you're you're correct that some
[01:08:41] of the lateral Junction designs can go
[01:08:44] even obviously been shown to go even
[01:08:46] faster but I would contend that you know
[01:08:49] we don't necessarily you know so there's
[01:08:51] a design space for sure there's always
[01:08:53] going to be you know pluses and minuses
[01:08:55] you know do we want to go to 100 gbit
[01:08:58] modulator and because on the back end of
[01:09:01] that you have to have not not just the
[01:09:03] driver circuitry but you have to have
[01:09:06] the receiver circuitry with enough
[01:09:08] sensitivity and that that's where you
[01:09:10] get a lot of the power consumption so
[01:09:12] you know this is that that design space
[01:09:15] we want to you know we need to really
[01:09:17] push down the total energy of the link
[01:09:20] including the laser to under you know
[01:09:23] way under pel hopefully under half P Jew
[01:09:26] and even less and it's really hard to
[01:09:28] see how you get there with you know 100
[01:09:31] gigabit modulators even if you you know
[01:09:33] whatever technology you use to make them
[01:09:35] mhm thank you yeah yeah thank you also
[01:09:38] from my side um then the V app now
[01:09:41] presents us again A Champion with 10
[01:09:43] votes would you like to have the
[01:09:45] question answered on on reliability yeah
[01:09:48] so it's short and it means can you
[01:09:51] comment on reliability please absolutely
[01:09:54] so
[01:09:55] uh let let me start by saying this is
[01:09:57] not my area of expertise I'm not a
[01:09:59] reliability expert uh it's not something
[01:10:02] that uh you know we we we do a lot of in
[01:10:06] the academic world um but you know uh of
[01:10:11] course in in the industry world this is
[01:10:13] this is uh really really important uh so
[01:10:16] the photonic you know the photonic chip
[01:10:19] itself right the Silicon fonic chip the
[01:10:21] reliability
[01:10:22] is uh you know there's certainly
[01:10:25] companies that have been shipping uh
[01:10:27] silicon photonic transceivers you know
[01:10:30] you know and and the the reliability is
[01:10:33] certainly been uh addressed there and
[01:10:36] it's it's you know similar to basically
[01:10:39] you know other other silicon chips the
[01:10:41] issue with photonics is going to be on
[01:10:45] the laser you know that's where um you
[01:10:48] know some of the reliability questions
[01:10:50] you know come up and we have lasers that
[01:10:53] have been qualified for Telecom ation
[01:10:55] and of course you know with lots of
[01:10:57] reliability data there for you know long
[01:10:59] long-term
[01:11:00] operation um
[01:11:03] and if the you know the new Laser
[01:11:05] Technology as it's being developed for
[01:11:08] the Datacom application you know within
[01:11:09] the AI systems um that needs to to be uh
[01:11:14] to be addressed now as I mentioned there
[01:11:17] are different approaches for for example
[01:11:19] the com Laser Technology the com laser
[01:11:22] that I mentioned that we're that we're
[01:11:24] developing
[01:11:26] uh this very Broadband comb with lots
[01:11:28] and lots of wavelengths it's actually
[01:11:30] being driven right the comb is driven by
[01:11:34] a telecom laser so kind of the the
[01:11:38] reliability of that system is already
[01:11:41] baked in it's already it's already
[01:11:42] proven to be reliable because it's a
[01:11:44] it's a highly reliable te Telecom Laser
[01:11:47] Source um you know other
[01:11:49] approaches uh have you know lasers that
[01:11:52] for example are are you know Quantum do
[01:11:55] laser lasers that are grown on top of
[01:11:56] the Silicon wafer the reliability of
[01:11:59] those still needs to be um shown and
[01:12:02] proven and worked out uh for for for
[01:12:05] longer term and again so it depends on
[01:12:07] the specific technology and the specific
[01:12:09] approach uh that's being used where you
[01:12:11] know where we are in the reliab
[01:12:14] reliability road map for the different
[01:12:16] photonic
[01:12:18] Technologies thank you very much uh this
[01:12:20] question has been asked by E asosi and I
[01:12:24] think now we are coming to an end of our
[01:12:26] session and to the end of the Q&A uh I
[01:12:30] would like to thank you Cally again for
[01:12:32] this really fantastic performance and
[01:12:34] thank you for being here to prge to our
[01:12:36] community please join me and and you
[01:12:38] have not to hesitate you can be loud to
[01:12:40] thank her and uh to connect her to our
[01:12:43] community thank you very much K thank
[01:12:45] [Applause]
[01:12:48] you thank you